VPOL16A-12-SIP

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## **SERIES:** VPOL16A-12-SIP **DESCRIPTION:** POINT OF LOAD CONVERTER **│** 

## **FEATURES** 

- industry standard pin out 

- high efficiency to 94% 

- 300 KHz switching frequency 

- 9.0-14 VDC input range 

- 0.75-5.0 VDC wide output range 

- over temperature protection 

- continuous short circuit protection 

- remote on/off 

- cost-efficient open frame design 

- UL/C-UL 60950 (E222736) certified 

|**MODEL**|**input**<br>**voltage**|**input**<br>**voltage**|**output**<br>**voltage**|**output**<br>**current**|**output**<br>**power**|**ripple**<br>**and noise1**|**efficiency**|
|---|---|---|---|---|---|---|---|
||**typ**|**range**||**max**|**max**|**max**|**typ**|
||(Vdc)|(Vdc)|(Vdc)|(A)|(W)|(mVp-p)|(%)|
|||9.0~14|0.75||9.0|75|77|
|||9.0~14|1.2||14.4|75|83|
|||9.0~14|1.5||18.0|75|86|
|VPOL16A-12-SIP|12|9.0~14<br>9.0~14|1.8<br>2.0|16|21.6<br>24.0|75<br>75|88<br>89|
|||9.0~14|2.5||30.0|75|90|
|||9.0~14|3.3||39.6|75|92|
|||9.0~14|5.0||60.0|75|94|



- Notes: 1. Ripple and noise are measured at 20 MHz BW by “parallel cable” method with 1 µF ceramic and 10 µF electrolytic capacitors on the output. 

## **PART NUMBER KEY** 

## **VPOL16A - 12 - XX - XX** 

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Base Number Input Voltage Output Voltage Packaging Style<br>SIP<br>**----- End of picture text -----**<br>


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|**INPUT**||
|---|---|
|**parameter**|**conditions/description**<br>**min**<br>**typ**<br>**max**<br>**units**|
|operating input voltage|9.0<br>12.0<br>14.0<br>Vdc|
|input under-voltage lockout|turn-on voltage treshold<br>turn-of voltage treshold<br>lockout hysteresis voltage<br>8.0<br>7.7<br>0.3<br>Vdc<br>Vdc<br>Vdc|
|input current|0~14 Vdc<br>11<br>A|
|no load input current|0.75 output<br>1.2 output<br>1.5 output<br>1.8 output<br>2.0 output<br>2.5 output<br>3.3 output<br>5.0 output<br>40<br>50<br>50<br>60<br>60<br>65<br>75<br>75<br>mA<br>mA<br>mA<br>mA<br>mA<br>mA<br>mA<br>mA|
|of converter input current|shutdown input idle current<br>10<br>mA|
|inrush current|0.1<br>A2s|
|input refected-ripple current|P-P thru 1µH inductor, 5Hz to 20MHz<br>300<br>mA|
|**OUTPUT**||
|**parameter**|**conditions/description**<br>**min**<br>**typ**<br>**max**<br>**units**|
|capacitive load|low ESR<br>8,000<br>µF|
|output voltage set point|at nominal input<br>±1.5<br>Vdc|
|trim adjustment range|selected by an external resistor<br>0.75<br>5.0<br>Vdc|
|line regulation|low to high<br>±0.2<br>%|
|load regulation|10~100% load<br>±0.5<br>%|
|operating current range|0<br>16<br>A|
|transient response deviation|50% load step change<br>200<br>mV|
|switching frequency|300<br>kHz|
|remote on/of|positive logic<br>logic low (module of)<br>logic high (module on)<br>or open circuit<br>0<br>0.4<br>Vdc|
||negative logic<br>logic low (module of)<br>logic high (module on)<br>or open circuit<br>0<br>2.8<br>0.4<br>Vdc|
|leakage current|1<br>mA|
|start-up time|3.5<br>ms|
|rise time|3.5<br>ms|
|**PROTECTIONS**||
|**parameter**|**conditions/description**<br>**min**<br>**typ**<br>**max**<br>**units**|
|over current protection|continuous|
|short circuit protection|continuous|
|over temperature protection|130<br>°C|
|**SAFETY AND COMPLIANCE**||



|**parameter**|**conditions/description**|**min**|**typ**|**max**|**units**|
|---|---|---|---|---|---|
|safety approvals|60950: UL/cUL|||||
|MTBF|as per MIL-HDBK-217F @ 25°C|980,000|||hours|
|RoHS|yes|||||



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|**ENVIRONMENTAL**||||||
|---|---|---|---|---|---|
|**parameter**|**conditions/description**|**min**|**typ**|**max**|**units**|
|operating temperature|see derating curve|-40||85|°C|
|storage temperature||-55||125|°C|



## **DERATING CURVES** 

## **Figure 1** 

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## **MECHANICAL** 

|**MECHANICAL**||||||
|---|---|---|---|---|---|
|**parameter**|**conditions/description**|**min**|**typ**|**max**|**units**|
|dimensions|50.8 x 13.0 x 8.3 [2.00 x 0.512 x 0.327 inch]||||mm|
|weight|||10||g|



## **MECHANICAL DRAWING** 

units: inches [mm] tolerance: x.xx ±0.02 [±0.5], x.xxx ±0.010 [0.25] 

|PIN CONNECTIONS|PIN CONNECTIONS|
|---|---|
|Pin|Function|
|1|+Vo|
|2|+Vo|
|3|+Sense|
|4|+Vo|
|5|Common|
|6|Common|
|7|+Vin|
|8|+Vin|
|9|No pin|
|10|Trim|
|11|REM|



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## **EFFICIENCY CURVES** 

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## **EFFICIENCY CURVES (CONTINUED)** 

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## **THEORY OF OPERATION** 

A block diagram of the VPOL16A-12-SIP Series converter is shown in Figure 2. Extremely high efficiency power conversion is achieved through the use of synchronous rectification and drive techniques. Essentially, the powerful VPOL16A-12-SIP series topology is based on a non-isolated synchronous buck converter. The control loop is optimized for unconditional stability, fast transient response and a very tight line and load regulation. In a typical pre-bias application the VPOL16A-12-SIP series converters do not draw any reverse current at start-up. The output voltage can be adjusted from 0.75 to 5.0vdc, using the TRIM pin with a external resistor. The converter can be shut down via a remote ON/OFF input that is referenced to ground. This input is compatible with popular logic devices; a 'positive' logic input is supplied as standard. Positive logic implies that the converter is enabled if the remote ON/OFF input is high (or floating), and disabled if it is low. The converter is also protected against over-temperature conditions. If the converter is overloaded or the ambient temperature gets too high, the converter will shut down to protect the unit. 

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Figure 2<br>**----- End of picture text -----**<br>


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## **TYPICAL APPLICATION CIRCUITS** 

The VPOL16A-12-SIP converters must be connected to a low AC source impedance. To avoid problems with loop stability source inductance should be low. Also, the input capacitors should be placed close to the converter input pins to de-couple distribution inductance. However, the external input capacitors are chosen for suitable ripple handling capability. Low ESR polymers are a good choice. They have high capacitance, high ripple rating and low ESR (typical <100mΩ). Electrolytic capacitors should be avoided. Circuit as shown in Figure 3 represents typical measurement methods for ripple current. Input reflected-ripple current is measured with a simulated source Inductance of 1µH. Current is measured at the input of the module. 

**Figure 3 Input Reflected-Ripple Test Setup** 

The basic test set-up to measure parameters such as efficiency and load regulation is shown in Figure 4. Things to note are that this converter is non-isolated, as such the input and output share a common ground. These grounds should be connected together via low impedance ground plane in the application circuit. When testing a converter on a bench set-up, ensure that -Vin and -Vo are connected together via a low impedance short to ensure proper efficiency and load regulation measurements are being made. When testing the CUI INC's VPOL16A-12-SIP series under any transient conditions please ensure that the transient response of the source is sufficient to power the equipment under test. We can calculate the Efficiency, Load regulation and Line regulation. 

The value of efficiency is defined as: 

The value of load regulation is defined as: 

Note:   Vo is output voltage, Io is output current, Vin is input voltage, Iin is input current. 

Note:   VFL is the output voltage at full load. VNL is the output voltage at no load. 

The value of line regulation is defined as: 

Note:    VHL is the output voltage of maximum input voltage at full load. 

VLL is the output voltage of minimum input voltage at full load. 

**Figure 4 VPOL5A-12-SIP Series Test Setup** 

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## **TYPICAL APPLICATION CIRCUITS (CONTINUED)** 

The output Voltage of the VPOL16A-12-SIP can be adjusted in the range 0.75V to 5.0V by connecting a single resistor on the motherboard (shown as Rtrim) in Figure 5. When Trim resistor is not connected the output voltage defaults to 0.75V 

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Figure 5<br>Trim-up Voltage Setup<br>**----- End of picture text -----**<br>


The value of Rtrim-up defined as: 

To give an example of the above calculation, to set a voltage of 3.3 Vdc. Rtrim is given by: 

Note:    Rtrim-up is the external resistor in Ω, Vo is the desired output voltage Note:    Rtrim = 3117 Ω 

For various output values various resistors are calculated and provided in Table 1 for convenience: 

**Table 1 Trim Resistor Values** 

|Vo,set(V)|Rtrim(kΩ)|
|---|---|
|0.75|open|
|1.20|22.33|
|1.50|13.0|
|1.80|9.0|
|2.00|7.4|
|2.50|5.0|
|3.30|3.12|
|5.0|1.47|



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## **TYPICAL APPLICATION CIRCUITS (CONTINUED)** 

## **Remote on/off** 

**Figure 6 Positive Remote on/off Input Drive Circuit** 

**Figure 7 Negative Remote On/Off Input Drive Circuit** 

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## **REMOTE SENSE COMPENSATION** 

Remote Sense regulates the output voltage at the point of load. It minimizes the effects of distribution losses such as drops across the connecting pin and PCB tracks (see Figure 8). Please note however, the maximum drop from the output pin to the point of load should not exceed 500mV for remote compensation to work. The amount of power delivered by the module is defined as the output voltage multiplied by the output current (VO x IO). When using TRIM UP, the output voltage of the module will increase which, if the same output current is maintained, increases the power output by the module. Make sure that the maximum output power of the module remains at or below the maximum rated power. When the Remote Sense feature is not being used, leave sense pin disconnected. 

**Figure 8 Circuit Configuration for Remote Sense Operation** 

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## **OUTPUT RIPPLE AND NOISE MEASUREMENT** 

The test set-up for noise and ripple measurements is shown in Figure 9 a coaxial cable with a 50Ω termination was used to prevent impedance mismatch reflections disturbing the noise readings at higher frequencies. 

## **Figure 9 Output Voltage Ripple and Noise Measurement Set-up** 

## **Output Capacitance** 

CUI INC's VPOL16A-12-SIP series converters provide unconditional stability with or without external capacitors. For good transient response low ESR output capacitors should be located close to the point of load. For high current applications point has already been made in layout considerations for low resistance and low inductance tracks. Output capacitors with its associated ESR values have an impact on loop stability and bandwidth. CUI INC's converters are designed towork with load capacitance up-to 8,000µF. It is recommended that any additional capacitance, Maximum 8,000µF and low ESR, be connected close to the point of load and outside the remote compensation point. 

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## **REVISION HISTORY** 

|**rev.**|**description**|**date**|
|---|---|---|
|1.0|initial release|08/01/2007|
|1.01|datasheet updated to a new template|11/05/2021|



The revision history provided is for informational purposes only and is believed to be accurate. 

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