LTM8060FEV#PBF

Non Isolated POL DC/DC Converter, Industrial & Medical, PSGA-165, Micro Module, 800 mV, 8 V, 4 A

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Manufacturer: ANALOG DEVICES
Product type: DC / DC Non Isolated Board Mount Converters - Adjustable Output
SVHC: Lead (04-Feb-2026)
Depth: 16mm
Width: 11.9mm
Height: 2.9mm
Product Range: LTM8060 Series
Output Power Max: -
Output Current Max: 4A
Output Voltage Max: 8V
Output Voltage Min: 800mV
Input Voltage DC Max: 40V
Input Voltage DC Min: 3V
DC / DC Converter Type: PSGA-165, Micro Module
Power Supply Applications: Industrial & Medical
DC / DC Converter Output Type: Adjustable
Delivery and price
Units per pack	336
Price	31.16 €
Current stock	10+
Lead time	30 days
Datasheet
**Data Sheet** 

**LTM8060F** 

Quad 40VIN, 3A Silent Switcher μModule Regulator with Package-Level EMI Shield 

## **FEATURES** 

- Package-Level EMI Shielding 

   - Minimize Near-Field Electric Field Noise 

   - Reduce Near-Field Magnetic Field Noise 

- Pin-to-Pin Compatible with the _LTM8060_ 

- Four Complete 3A (4A peak) Step-Down Switching Power Supplies 

- Low Noise Silent Switcher Architecture 

- Compliant with CISPR22 Class B/CISPR25 Class 5 

- Wide Input Voltage Range: 3V to 40V 

- Wide Output Voltage Range: 0.8V to 8V 

- 4A Continuous Output Current per Channel at 12VIN, 

   - 3.3VOUT, fSW = 2MHz, TA = 60°C 

- Multiphase or Multi-module Parallelable for Increased Output Current 

- Low Thermal Resistance, θJA = 8.4°C/W, 

   - θJCtop = 4.6°C/W, θJCbot = 1°C/W 

- Selectable Switching Frequency: 200kHz to 3MHz 

- Available in a Compact _165-Pin, 16mm × 11.9mm × 2.9mm, Pre-Soldered Grid Array (PSGA)_ Package 

## **APPLICATIONS** 

## **GENERAL DESCRIPTION** 

The _LTM8060F_ is a quad 40VIN, 3A (4A peak) step-down Silent Switcher® power μModule® (micromodule) regulator with package-level Electromagnetic interference (EMI) shield. The package-level EMI shield enables the Faraday cage to be applied directly to the LTM8060F package, and the EMI shield is electrically connected to the GND pins, providing a compact and effective near-field EMI reduction. The EMI shield eliminates all electric field noise, and a 10dB reduction is achieved on magnetic field noise. The _Silent Switcher_ architecture minimizes EMI while delivering high efficiency. 

Included in the package are the controllers, the power switches, the inductors, and the support components. Operating over a wide input voltage range, the LTM8060F supports output voltages from 0.8V to 8V and a switching frequency range of 200kHz to 3MHz, each set by a single resistor. Only the bulk input and the output filter capacitors are needed to finish the design. The LTM8060F outputs can be paralleled in an array for up to 12A (16A peak) capability (see _Figure 1_ ). 

- Automated Test Equipment 

- Industrial Supplies 

- Medical Equipment 

**==> picture [241 x 50] intentionally omitted <==**

**----- Start of picture text -----**<br>
3A, 4A PK<br>6A, 8A PK 6A, 8A PK<br>3A, 4A PK 9A, 12A PK<br>12A, 16A PK<br>3A, 4A PK 3A, 4A PK<br>6A, 8A PK<br>~a 3A, 4A PK e 3A, 4A PK ; 3A, 4A PK t bf i<br>001<br>**----- End of picture text -----**<br>


_**Figure 1. Configurable Output Array**_ 

The LTM8060F is packaged in a compact, 165-pin, 16mm × 11.9mm × 2.9mm, pre-soldered grid array (PSGA) package suitable for automated assembly by standard surface mount equipment. The LTM8060F is a pin-to-pin compatible with the LTM8060. The LTM8060F is RoHS-compliant. 

DOCUMENT FEEDBACK **TECHNICAL SUPPORT** Tel: 781.329.4700 | ©2024 Analog Devices, Inc. All rights reserved. 

Rev. 0 

One Analog Way, Wilmington, MA 01887-2356, U.S.A. 

**LTM8060F** 

**Data Sheet** 

## **TYPICAL APPLICATION** 

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VIN VIN1 BIAS12AUX1<br>8.5V TO 40V RUN1<br>VOUT1<br>27.4kΩ VOUT1<br>fSW = 1.2MHz RT12 FB1 47.5kΩ 47µF 5VUP TO 3A*(4A PK)<br>SYNC12<br>VOUT2<br>VOUT2<br>VIN2 FB2 78.7kΩ 47µF 3.3VUP TO 3A*(4A PK)<br>RUN2 LTM8060F GND<br>VIN34<br>BIAS34 EXTERNAL 5V<br>RUN3<br>fSW64.9kΩ = 600kHz RUN4RT34 VOUT3FB3 287kΩ 100µF×2 V1.5VUP TO 4A*OUT3<br>SYNC34<br>PINS NOT USED: VOUT4<br>AUX234,   VOUT4<br>TRSS1234,SHARE1234,PG1234,   4.7µF×4 FB4 1MΩ 100µF×2 1VUP TO 4A*<br>   CLKOUT1234 GND 002<br>**----- End of picture text -----**<br>


_**Figure 2. Quad 3A (4A Peak) Output from 8.5V to 40V Input**_ 

* The output current capability (transient peak or continuous) in _Figure 2_ is subject to environmental factors such as ambient temperature, airflow, or other cooling techniques. For different VIN, VOUT, 

and TA conditions, see the notes section (Note _3_ ) of the _Electrical Characteristics_ table and the derating curves in the _Applications Information_ section. 

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115<br>NOISE FLOOR<br>LTM8060<br>105<br>LTM8060F<br>95<br>85<br>75<br>65<br>55<br>45<br>35<br>0 100 200 300 400 500 600 700 800 900 1000<br>FREQUENCY (MHz)<br>Figure 3. Near-Field E Field, 100% Reduction,<br>All Near-Field Electric Field Noise removed,<br>from 1MHz to 1GHz<br>155<br>NOISE FLOOR<br>LTM8060<br>135 LTM8060F<br>115<br>95<br>75<br>55<br>35<br>0 100 200 300 400 500 600 700 800 900 1000<br>FREQUENCY (MHz)<br>AMPLITUDE (dBµV)<br>AMPLITUDE (dBµV)<br>003<br>004<br>**----- End of picture text -----**<br>


_**Figure 3. Near-Field E Field, 100% Reduction, All Near-Field Electric Field Noise removed, from 1MHz to 1GHz**_ 

_**Figure 4. Near-Field H Field, 10db Reduction, Less Near-Field Electric Field Noise, from 1MHz to 1GHz**_ 

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**LTM8060F** 

**Data Sheet** 

## **TABLE OF CONTENTS** 

Features ................................................................................................................................................................................................. 1 Applications .......................................................................................................................................................................................... 1 General Description .............................................................................................................................................................................. 1 Typical Application ............................................................................................................................................................................... 2 Revision History .................................................................................................................................................................................... 4 Specifications ........................................................................................................................................................................................ 5 Absolute Maximum Ratings .................................................................................................................................................................. 7 Thermal Resistance ............................................................................................................................................................................... 8 Electrostatic Discharge (ESD) ........................................................................................................................................................... 8 ESD Ratings ....................................................................................................................................................................................... 8 ESD Caution ...................................................................................................................................................................................... 8 Pin Configurations and Function Descriptions .................................................................................................................................... 9 Pin Descriptions ................................................................................................................................................................................ 9 Typical Performance Characteristics ................................................................................................................................................. 13 Theory of Operation ............................................................................................................................................................................ 21 LTM8060F Overview ........................................................................................................................................................................ 21 Applications Information .................................................................................................................................................................... 23 Set Output Voltage ......................................................................................................................................................................... 23 Capacitor Selection Considerations .............................................................................................................................................. 23 Frequency Selection ....................................................................................................................................................................... 24 Operating Frequency Trade-Offs.................................................................................................................................................... 24 BIASn Pin Considerations ............................................................................................................................................................... 25 Maximum Load ............................................................................................................................................................................... 25 Power Derating ............................................................................................................................................................................... 26 Load Sharing ................................................................................................................................................................................... 29 Burst Mode Operation .................................................................................................................................................................... 29 Minimum Input Voltage .................................................................................................................................................................. 29 Output Voltage Tracking and Soft Start ......................................................................................................................................... 29 Prebiased Output ........................................................................................................................................................................... 30 Frequency Foldback ....................................................................................................................................................................... 30 Synchronization .............................................................................................................................................................................. 30 Shorted Input Protection ............................................................................................................................................................... 30 PCB Layout ...................................................................................................................................................................................... 31 Hot-Plugging Safely ........................................................................................................................................................................ 32 

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**LTM8060F** 

**Data Sheet** 

Thermal Considerations ................................................................................................................................................................. 32 Typical Applications ....................................................................................................................................................................... 34 Related Parts................................................................................................................................................................................... 39 Outline Dimensions ............................................................................................................................................................................. 40 Ordering Guide .................................................................................................................................................................................... 41 Selector Guide ..................................................................................................................................................................................... 42 Package Photos .............................................................................................................................................................................. 42 Design Resources ............................................................................................................................................................................ 42 

## **REVISION HISTORY** 

**10/2024 - Rev. 0: Initial Release.** 

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**LTM8060F** 

**Data Sheet** 

## **SPECIFICATIONS** 

## **Table 1. Electrical Characteristics** 

(TA = 25°C, VINn = 12V, RUNn = 2V unless otherwise noted. **[1, 2]** ) 

|(TA= 25°C, VINn= 12V, RUNn|= 2V unless ot|herwise noted.**1, 2** )||||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**CONDITIONS**|**COMMENTS**|**MIN**|**TYP**|**MAX**|**UNITS**|
|Minimum VIN1Input<br>Voltage|VINn||–40°C ≤ TJ≤<br>125°C|||3.0|V|
|Minimum VIN34Input<br>Voltage|VINn||–40°C ≤ TJ≤<br>125°C|||3.0|V|
|Minimum VIN2Input<br>Voltage|VINn|VIN1= 3V|–40°C ≤ TJ≤<br>125°C|||2.0|V|
|Output DC Voltage|VOUT|FBn open|||0.8||V|
|||FBn = 21.5kΩ|||10||V|
|Maximum Output DC<br>Current|IOUT(MAX)|**3**||||6|A|
|Quiescent Current into<br>VINn|IQ(VIN)|RUNn = 0||||8|μA|
|||BIASn = 5V, SYNCn = 3.3V,<br>no load|||7||mA|
|Current into BIASn|IBIASn|RUNn = 0,BIASn = 5V||||0.5|μA|
|||BIASn = 5V, SYNCn = 3.3V,<br>no load|||18||mA|
|Line Regulation|VLINEREG|5V < VINn< 40V,IOUTn= 1A|||0.05|0.3|%|
|Load Regulation|VLOADREG|12VINn,0.1A < IOUTn< 4A|||0.1|0.5|%|
|Output RMS Ripple|VRIPPLE|3.3VOUTn,IOUTn= 4A|||10||mV|
|FBn Voltage|VFB|||792|800|808|mV|
||||–40°C ≤ TJ≤<br>125°C|784|800|816|mV|
|Current out of FBn|IFB|VOUTn= 1V,FBn = 0V|||4||μA|
|Minimum BIASn for<br>Proper Operation|IBIAS|||||3.2|V|
|Switching Frequency|fSW|RTn= 200kΩ|||200||kHz|
|||RTn= 35.7kΩ|||1||MHz|
|||RTn= 8.06kΩ|||3||MHz|
|RUNn Threshold|VRUN(ON)||||0.74||V|
|RUNn Input Current|IRUN|RUNn = 0V||||100|nA|
|PGn Threshold at FBn|VFBL|Lower threshold|||740||mV|
||VFBH|Upper threshold|||860||mV|
|PGn Output Sink Current|IPG|PGn = 0.1V||100|||μA|
|CLKOUTn VOL|VOL(CLK)||||0.2||V|
|CLKOUTn VOH|VOH(CLK)||||3.2||V|
|SYNCn Input High<br>Threshold|VINH(SYNC)|||1.5|||V|
|SYNCn Input Low<br>Threshold|VINL(SYNC)|||||0.8|V|



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**LTM8060F** 

**Data Sheet** 

(TA = 25°C, VINn = 12V, RUNn = 2V unless otherwise noted. **[1, 2]** ) 

|(TA= 25°C, VINn= 12V, RUNn|= 2V unless ot|herwise noted.**1, 2** )||||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**CONDITIONS**|**COMMENTS**|**MIN**|**TYP**|**MAX**|**UNITS**|
|SYNCn Threshold to<br>Enable Spread Spectrum|VEN(SYNC)|||2.8||4.0|V|
|SYNCn Current|ISYNC|SYNCn = 6V|||60||μA|
|TRSSn Source Current|ITRSS|TRSSn = 0V|||2||μA|
|TRSSn Pull-Down<br>Resistance|RTRSS|Fault condition, TRSSn =<br>0.1V|||200||Ω|



The LTM8060FE is guaranteed to meet performance specifications from 0°C to 125°C internal. Specifications over the full –40°C to 125°C internal operating temperature range are assured by design, characterization, 

- 1 and correlation with statistical process controls. The LTM8060FI is guaranteed to meet specifications over the full –40°C to 125°C internal operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 

- 2 The n represents each individual channel. Four outputs are tested separately, and the same testing condition is applied to each output. 

- The maximum current out of any channel may be limited by the internal temperature of the LTM8060F. For 

- 3 different VIN, VOUT, and TA conditions, see the output current derating curves in the _Applications Information_ section. 

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**LTM8060F** 

**Data Sheet** 

## **ABSOLUTE MAXIMUM RATINGS** 

TA = 25°C unless otherwise specified. 

## **Table 2. Absolute Maximum Ratings** 

|**Table 2. Absolute Maximum Ratings**||
|---|---|
|**PARAMETER**|**RATING**|
|VINn,RUNn,PGn|42V|
|VOUTn,BIASn,AUXn|10V|
|FBn,TRSSn,SHAREn,RTn|4V|
|SYNCn|6V|
|Maximum Internal Temperature|125°C|
|Storage Temperature|–55°C to 125°C|
|Peak Solder Reflow Package BodyTemperature|245°C|



Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 

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**LTM8060F** 

**Data Sheet** 

## **THERMAL RESISTANCE** 

Thermal performance is directly linked to Printed circuit board (PCB) design and operating environment. Close attention to PCB thermal design is required. 

## **Electrostatic Discharge (ESD)** 

The following ESD information is provided for handling of ESD-sensitive devices in an ESD protected area only Human body model (HBM) per ANSI/ESDA/JEDEC JS-001 Field induced charged device model (FICDM) and charged device model (CDM) per ANSI/ESDA/JEDEC JS-002. International Electrotechnical Commission (IEC) electromagnetic compatibility: Part 4-2 (IEC) per IEC 61000-4-2. Machine model (MM) per ANSI/ESD STM5.2. MM voltage values are for characterization only. 

## **ESD Ratings** 

**Table 3. LTM8060F ESD Ratings ESD MODEL WITHSTAND THRESHOLD (V) CLASS** HBM ±4000 3A CDM ±1250 C3 ~~—_———TS~~ **ESD Caution ESD (electrostatic discharge) sensitive device.** Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of ~~Bo~~ functionality. 

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**LTM8060F** 

**Data Sheet** 

## **PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS** 

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TOP VIEW<br>**----- End of picture text -----**<br>


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SYNC12 RUN2 RUN1 FB1 RT12 TRSS2 TRSS1<br>11<br>BANK4 BANK6<br>CLKOUT12 PG2 DNC VIN2 VIN1 FB2 AUX2 BIAS12 AUX1<br>10<br>BANK3 BANK8<br>VOUT2 PG1 SHARE2 VOUT1<br>9<br>SHARE1<br>8<br>7<br>BANK2 GND<br>6<br>5<br>SHARE3<br>4<br>SHARE4 PG3<br>3<br>BANK1 BANK7<br>VOUT3 AUX3 BIAS34 AUX4 FB4 DNC PG4 CLKOUT34 VOUT4<br>2<br>TRSS3 TRSS4 RT34 FB3 BANK5 VIN34 RUN3 RUN4 SYNC34<br>1<br>A B C D E F G H J K L M N P R<br>PSGA PACKAGE<br>165-PIN (16mm × 11.9mm × 2.9mm)<br>TJMAX = 125°C; θJA = 8.4°C/W;<br>θJC_top = 4.6°C/W; θJC_bottom = 1°C/W; WEIGHT = 1.89g<br>θ VALUES ARE DETERMINED BY SIMULATION PER JESD51 CONDITIONS.<br>θJA VALUE IS OBTAINED WITH DEMO BOARD.<br>SEE THE TYPICAL PERFORMANCE CHARACTERISTICS SECTION FOR LAB MEASURED DERATING CURVES. 005<br>**----- End of picture text -----**<br>


_**Figure 5. Pinout Configuration**_ 

**==> picture [249 x 31] intentionally omitted <==**

## **Pin Descriptions** 

**Table 4. Pin Descriptions** 

|**PIN**|**NAME**|**DESCRIPTION**|
|---|---|---|
|**CFG 1**|||
|Bank<br>2|GND|Connect these GND pins to a local ground plane below the LTM8060F and the circuit<br>components. In most applications, the bulk of the heat flow out of the LTM8060F is<br>through these pads, so the printed circuit board (PCB) design has a large impact on<br>the thermal performance of the device. See the_PCB Layout_and_Thermal_<br>_Considerations_sections for more details. Return the feedback divider (RFB) to this<br>net.|



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**LTM8060F** 

**Data Sheet** 

|**PIN**|**NAME**|**DESCRIPTION**|
|---|---|---|
|**CFG 1**|||
|Bank<br>4|VIN2|Input Power for the Channel 2 Regulator. Decouple VIN2to ground with an external<br>low Equivalent series resistance (ESR) capacitor. See_Table 6_for recommended<br>values.|
|Bank<br>5|VIN34|Input Power for the Channel 3 and Channel 4 Regulator. The VIN34bank powers the<br>internal control circuitry for both Channel 3 and Channel 4 and is monitored by<br>undervoltage lockout circuitry. The VIN34voltage must be greater than 3V for either<br>Channel 3 or Channel 4 of the LTM8060F to operate. Decouple VIN34to ground with<br>an external low-ESR capacitor. See_Table 6_for recommended values.|
|Bank<br>6|VIN1|Input Power for the Channel 1 Regulator. The VIN1powers the internal control<br>circuitry for Channel 1 and Channel 2 and is monitored by undervoltage lockout<br>circuitry. The VIN1voltage must be greater than 3V for either Channel 1 or Channel 2<br>of the LTM8060F to operate. Decouple VIN1to ground with an external low-ESR<br>capacitor. See_Table 6_for recommended values.|
|Banks<br>8, 3, 1,<br>7|VOUT1−OUT4|Power Output for Channel 1, through Channel 4, respectively. Apply the output filter<br>capacitor and the output load between these pins and the GND plane.|
|C10,<br>N2|CLKOUT12, 34|Synchronization Output. When SYNC12, 34 > 2.8V, the CLKOUT12, 34 pins provide a<br>waveform about 90° out-of-phase with Channel 1 and Channel 3, respectively. This<br>allows synchronization with other regulators with up to four phases. When an<br>external clock is applied to the SYNC12, 34 pins, the CLKOUT12, 34 pins will output a<br>waveform with about the same phase, duty cycle, and frequency as the SYNC12, 34<br>waveform. In Burst Mode® operation, the CLKOUT12, 34 pins will be internally<br>grounded. Float these pins if the CLKOUT12, 34 function is not used. Do not drive<br>thesepins.|
|C11,<br>N1|SYNC12, 34|External Clock Synchronization Input. Ground these pins for low ripple Burst Mode<br>operation at low output loads; this will also disable the CLKOUT function. Apply a<br>DC voltage between 2.8V and 4V for forced continuous mode (FCM) operation with<br>spread spectrum modulation. Float the SYNCn pin for FCM operation without spread<br>spectrum modulation. Apply a clock source to the SYNCn pin for synchronization to<br>an external frequency. The LTM8060F will be in FCM when an external frequency is<br>applied.|
|E9,<br>D10,<br>L3, M2|PG1−PG4|The PGn pins are the open-drain output of an internal comparator. The PGn pin<br>remains low until the FBn pin is within ±7.5% of the final regulation voltage, and<br>until there are no fault conditions. The PGn pin is pulled low during VINnUVLO,<br>thermal shutdown,or when the RUNnpins are low.|
|E10,<br>L2|DNC|Do not connect these pins.|
|E11,<br>D11,<br>L1, M1|RUN1−RUN4|The corresponding channel of the LTM8060F is shut down when these pins are low<br>and active when these pins are high. Connect to VINnif the shutdown feature is not<br>used. An external resistor divider from VINncan be used to program a VINnthreshold<br>below which the corresponding channel of the LTM8060F will shut down. Do not<br>float thesepins.|



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**LTM8060F** 

**Data Sheet** 

|**PIN**|**NAME**|**DESCRIPTION**|
|---|---|---|
|**CFG 1**|||
|K8,<br>K9,<br>F4, F3|SHARE1−SHARE4|Channel 1 through Channel 4 Current Sharing Control. Connect SHAREn together<br>when paralleling outputs. The LTM8060F can also share current between modules.<br>See the_Typical Applications_section for current sharing between channels and<br>current sharingbetween modules.|
|K11,<br>K10,<br>F1,F2|FB1−FB4|The LTM8060F regulates the FBn pin to 800mV. Connect the feedback resistor to<br>these pins to set the output voltage.|
|L11,<br>E1|RT12, 34|Connect a resistor between RTn and ground to set the switching frequency. Do not<br>drive thesepins.|
|M10,<br>D2|BIAS12, 34|The internal regulator will draw current from BIASn instead of VIN1or VIN34when<br>BIASn is connected to a voltage higher than 3.2V. For output voltages of 3.3V and<br>above, these pins should be connected to VOUTn. If these pins are connected to a<br>supplyother than VOUTn,use a local bypass capacitor on thesepins.|
|N10,<br>L10,<br>C2, E2|AUX1−AUX4|Low Current Voltage Source for BIAS. In many designs, the BIAS pin is simply<br>connected to VOUTvia the AUX pin. The AUXn pins are internally connected to VOUTn<br>and placed adjacent to the BIASn pins to ease printed circuit board routing.<br>Although these pins are internally connected to VOUT, they are not intended to<br>deliver a higher current, so do NOT connect these pins to the load. If these pins are<br>not connected to BIAS,leave them floating.|
|N11,<br>M11|TRSS1, 2|Output Tracking and Soft Start Pins. These pins allow the user to control the output<br>voltage ramp rate during startup. A TRSSn voltage below 0.8V forces the LTM8060F<br>to regulate the FBn pin to equal the TRSSn pin voltage. When TRSSn is above 0.8V,<br>the tracking function is disabled, and the internal reference resumes control of the<br>error amplifier. An internal 2μA pull-up current on these pins allow a capacitor to<br>program output voltage slew rate. These pins are pulled to ground during shutdown<br>and fault conditions; use a series resistor if driving from a low impedance output.<br>Thesepins maybe left floatingif the soft start feature is not beingused.|



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**LTM8060F** 

**Data Sheet** 

**Table 5. LTM8060F Pinout (Sorted by Pin Number)** 

|**PIN**|**PIN NAME**|**PIN**|**PIN NAME**|**PIN**|**PIN NAME**|**PIN**|**PIN NAME**|
|---|---|---|---|---|---|---|---|
|**A1–D11**||||||||
|A1|VOUT3|B1|VOUT3|C1|TRSS3|D1|TRSS4|
|A2|VOUT3|B2|VOUT3|C2|AUX3|D2|BIAS34|
|A3|VOUT3|B3|VOUT3|C3|GND|D3|GND|
|A4|VOUT3|B4|VOUT3|C4|GND|D4|GND|
|A5|GND|B5|GND|C5|GND|D5|GND|
|A6|GND|B6|GND|C6|GND|D6|GND|
|A7|GND|B7|GND|C7|GND|D7|GND|
|A8|VOUT2|B8|VOUT2|C8|GND|D8|GND|
|A9|VOUT2|B9|VOUT2|C9|GND|D9|GND|
|A10|VOUT2|B10|VOUT2|C10|CLKOUT12|D10|PG2|
|A11|VOUT2|B11|VOUT2|C11|SYNC12|D11|RUN2|
|**E1–H11**||||||||
|E1|RT34|F1|FB3|G1|VIN34|H1|VIN34|
|E2|AUX4|F2|FB4|G2|VIN34|H2|VIN34|
|E3|GND|F3|SHARE4|G3|GND|H3|GND|
|E4|GND|F4|SHARE3|G4|GND|H4|GND|
|E5|GND|F5|GND|G5|GND|H5|GND|
|E6|GND|F6|GND|G6|GND|H6|GND|
|E7|GND|F7|GND|G7|GND|H7|GND|
|E8|GND|F8|GND|G8|GND|H8|GND|
|E9|PG1|F9|GND|G9|GND|H9|GND|
|E10|DNC|F10|VIN2|G10|VIN2|H10|VIN1|
|E11|RUN1|F11|VIN2|G11|VIN2|H11|VIN1|
|**J1–M11**||||||||
|J1|VIN34|K1|VIN34|L1|RUN3|M1|RUN4|
|J2|VIN34|K2|VIN34|L2|DNC|M2|PG4|
|J3|GND|K3|GND|L3|PG3|M3|GND|
|J4|GND|K4|GND|L4|GND|M4|GND|
|J5|GND|K5|GND|L5|GND|M5|GND|
|J6|GND|K6|GND|L6|GND|M6|GND|
|J7|GND|K7|GND|L7|GND|M7|GND|
|J8|GND|K8|SHARE1|L8|GND|M8|GND|
|J9|GND|K9|SHARE2|L9|GND|M9|GND|
|J10|VIN1|K10|FB2|L10|AUX2|M10|BIAS12|
|J11|VIN1|K11|FB1|L11|RT12|M11|TRSS2|
|**N1–R11**||||||||
|N1|SYNC34|P1|VOUT4|R1|VOUT4|||
|N2|CLKOUT34|P2|VOUT4|R2|VOUT4|||
|N3|GND|P3|VOUT4|R3|VOUT4|||
|N4|GND|P4|VOUT4|R4|VOUT4|||
|N5|GND|P5|GND|R5|GND|||
|N6|GND|P6|GND|R6|GND|||
|N7|GND|P7|GND|R7|GND|||
|N8|GND|P8|VOUT1|R8|VOUT1|||
|N9|GND|P9|VOUT1|R9|VOUT1|||
|N10|AUX1|P10|VOUT1|R10|VOUT1|||
|N11|TRSS1|P11|VOUT1|R11|VOUT1|||



Rev. 0 12 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

## **TYPICAL PERFORMANCE CHARACTERISTICS** 

TA = 25°C, operating per _Table 6_ , unless otherwise noted. 

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**----- Start of picture text -----**<br>
NO SWITCH NODE<br>SWITCH NODE<br>COUPLED<br>COUPLED<br>20mV/DIV<br>100mV/DIV<br>1µs/DIV 1µs/DIV<br>36VIN, 5VOUT 006a 36VIN, 5VOUT<br>**----- End of picture text -----**<br>


## **(a) LTM8060 without EMI Shielding** 

**(b) LTM8060F with EMI Shielding** 

_**Figure 6. LTM8060F  vs. LTM8060 SW Noise Comparison**_ 

**==> picture [470 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
90 4 90 4<br>EFFICIENCY<br>EFFICIENCY<br>80 3 80 3<br>a<br>70 2 70 2<br>12V24V36VINININ 12V24V36VINININ<br>60 1 60 1<br>POWER LOSS POWER LOSS<br>50 0 50 0<br>0 1 2 3 4 0 1 2 3 4<br>LOAD CURRENT (A) LOAD CURRENT (A)<br>EFFICIENCY (%) POWER LOSS (W)<br>007<br>EFFICIENCY (%) POWER LOSS (W)<br>008<br>**----- End of picture text -----**<br>


_**Figure 7. Efficiency vs. Power Loss, VOUT = 0.8V, BIAS = 5V, Burst Mode Operation**_ 

_**Figure 8. Efficiency vs. Power Loss, VOUT = 1V, BIAS = 5V, Burst Mode Operation**_ 

Rev. 0 13 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [221 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
90 4<br>EFFICIENCY<br>80 3<br>70 2<br>12VIN<br>24VIN<br>36VIN<br>60 1<br>POWER LOSS<br>50 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>EFFICIENCY (%) POWER LOSS (W)<br>009<br>**----- End of picture text -----**<br>


_**Figure 9. Efficiency vs. Power Loss, VOUT = 1.2V, BIAS = 5V, Burst Mode Operation**_ 

**==> picture [219 x 368] intentionally omitted <==**

**----- Start of picture text -----**<br>
95 4<br>EFFICIENCY<br>85 3<br>75 2<br>12VIN<br>24VIN<br>36VIN<br>65 1<br>POWER LOSS<br>55 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 11. Efficiency vs. Power Loss, VOUT = 1.8V, BIAS = 5V, OUT = 1.8V, BIAS = 5V,  = 1.8V, BIAS = 5V,<br>Burst Mode Operation<br>95 4<br>EFFICIENCY<br>85 3<br>75 2<br>12VIN<br>24VIN<br>36VIN<br>65 1<br>POWER LOSS<br>55 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>EFFICIENCY (%) POWER LOSS (W)<br>013<br>011<br>EFFICIENCY (%) POWER LOSS (W)<br>**----- End of picture text -----**<br>


_**Figure 11. Efficiency vs. Power Loss, VOUT = 1.8V, BIAS = 5V, OUT = 1.8V, BIAS = 5V,  = 1.8V, BIAS = 5V, Burst Mode Operation**_ 

_**Figure 13. Efficiency vs. Power Loss, VOUT = 2.5V, BIAS = 5V, Burst Mode Operation**_ 

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**----- Start of picture text -----**<br>
95 4<br>EFFICIENCY<br>85 3<br>75 2<br>12VIN<br>24VIN<br>36VIN<br>65 1<br>POWER LOSS<br>55 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>EFFICIENCY (%) POWER LOSS (W)<br>010<br>**----- End of picture text -----**<br>


_**Figure 10. Efficiency vs. Power Loss, VOUT = 1.5V, BIAS = 5V,**_ 

_**Burst Mode Operation**_ 

**==> picture [220 x 367] intentionally omitted <==**

**----- Start of picture text -----**<br>
95 4<br>EFFICIENCY<br>85 3<br>75 2<br>12VIN<br>24VIN<br>36VIN<br>65 1<br>POWER LOSS<br>55 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 12. Efficiency vs. Power Loss, VOUT = 2V, BIAS = 5V,  OUT = 2V, BIAS = 5V,   = 2V, BIAS = 5V,<br>Burst Mode Operation<br>100 4<br>EFFICIENCY<br>90 3<br>80 2<br>12VIN<br>24VIN<br>36VIN<br>70 1<br>POWER LOSS<br>60 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>EFFICIENCY (%) POWER LOSS (W)<br>014<br>EFFICIENCY (%) POWER LOSS (W)<br>012<br>**----- End of picture text -----**<br>


_**Figure 12. Efficiency vs. Power Loss, VOUT = 2V, BIAS = 5V,  OUT = 2V, BIAS = 5V,   = 2V, BIAS = 5V, Burst Mode Operation**_ 

_**Figure 14. Efficiency vs. Power Loss, VOUT = 3.3V, BIAS = 5V, Burst Mode Operation**_ 

Rev. 0 14 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [219 x 581] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 4<br>EFFICIENCY<br>90 3<br>80 2<br>12VIN<br>24VIN<br>36VIN<br>70 1<br>POWER LOSS<br>60 0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 15. Efficiency vs. Power Loss, VOUT = 5V, BIAS = 5V,  OUT = 5V, BIAS = 5V,   = 5V, BIAS = 5V,<br>Burst Mode Operation<br>0.4<br>12VIN<br>24VIN<br>36VIN<br>0.3<br>0.2<br>0.1<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 17. Input vs. Load Current, VOUT = 0.8V, BIAS = 5V,  OUT = 0.8V, BIAS = 5V,   = 0.8V, BIAS = 5V,<br>Burst Mode Operation<br>0.6<br>12VIN<br>24VIN<br>36VIN<br>0.4<br>0.2<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>017<br>INPUT CURRENT (A)<br>019<br>INPUT CURRENT (A)<br>EFFICIENCY (%) POWER LOSS (W)<br>015<br>**----- End of picture text -----**<br>


_**Figure 15. Efficiency vs. Power Loss, VOUT = 5V, BIAS = 5V,  OUT = 5V, BIAS = 5V,   = 5V, BIAS = 5V,**_ 

_**Figure 17. Input vs. Load Current, VOUT = 0.8V, BIAS = 5V,  OUT = 0.8V, BIAS = 5V,   = 0.8V, BIAS = 5V,**_ 

_**Figure 19. Input vs. Load Current, VOUT = 1.2V, BIAS = 5V,**_ 

_**Burst Mode Operation**_ 

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**----- Start of picture text -----**<br>
100 4<br>EFFICIENCY<br>90 3<br>12VIN<br>80 24VIN 2<br>36VIN<br>70 1<br>POWER LOSS<br>60 0<br>0 1 2 3 4<br>LOAD CURRENT (A) 016<br>EFFICIENCY (%) POWER LOSS (W)<br>**----- End of picture text -----**<br>


_**Figure 16. Efficiency vs. Power Loss, VOUT = 8V, BIAS = 5V,**_ 

_**Burst Mode Operation**_ 

**==> picture [215 x 367] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.6<br>12VIN<br>24VIN<br>36VIN<br>0.4<br>0.2<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 18. Input vs. Load Current, VOUT = 1V, BIAS = 5V,  OUT = 1V, BIAS = 5V,   = 1V, BIAS = 5V,<br>Burst Mode Operation<br>0.8<br>12VIN<br>24VIN<br>36VIN<br>0.6<br>0.4<br>0.2<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>018<br>INPUT CURRENT (A)<br>INPUT CURRENT (A)<br>020<br>**----- End of picture text -----**<br>


_**Figure 18. Input vs. Load Current, VOUT = 1V, BIAS = 5V,  OUT = 1V, BIAS = 5V,   = 1V, BIAS = 5V, Burst Mode Operation**_ 

_**Figure 20. Input vs. Load Current, VOUT = 1.5V, BIAS = 5V, Burst Mode Operation**_ 

Rev. 0 15 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [214 x 593] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.8<br>12VIN<br>24VIN<br>36VIN<br>0.6<br>0.4<br>0.2<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 21. Input vs. Load Current, VOUT = 1.8V, BIAS = 5V,  OUT = 1.8V, BIAS = 5V,   = 1.8V, BIAS = 5V,<br>Burst Mode Operation<br>1.2<br>12VIN<br>24VIN<br>36VIN<br>0.9<br>0.6<br>0.3<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 23. Input vs. Load Current, VOUT = 2.5V, BIAS = 5V, OUT = 2.5V, BIAS = 5V,  = 2.5V, BIAS = 5V,<br> Burst Mode Operation<br>2.0<br>12VIN<br>24VIN<br>36VIN<br>1.5<br>1.0<br>0.5<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>INPUT CURRENT (A)<br>025<br>INPUT CURRENT (A)<br>021<br>INPUT CURRENT (A)<br>023<br>**----- End of picture text -----**<br>


_**Figure 21. Input vs. Load Current, VOUT = 1.8V, BIAS = 5V,  OUT = 1.8V, BIAS = 5V,   = 1.8V, BIAS = 5V,**_ 

_**Figure 23. Input vs. Load Current, VOUT = 2.5V, BIAS = 5V, OUT = 2.5V, BIAS = 5V,  = 2.5V, BIAS = 5V, Burst Mode Operation**_ 

_**Figure 25. Input vs. Load Current, VOUT = 5V, BIAS = 5V, Burst Mode Operation**_ 

**==> picture [211 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.8<br>12VIN<br>24VIN<br>36VIN<br>0.6<br>0.4<br>0.2<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>022<br>INPUT CURRENT (A)<br>**----- End of picture text -----**<br>


_**Figure 22. Input vs. Load Current, VOUT = 2V, BIAS = 5V, Burst Mode Operation**_ 

**==> picture [215 x 380] intentionally omitted <==**

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1.6<br>12VIN<br>24VIN<br>36VIN<br>1.2<br>0.8<br>0.4<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 24. Input vs. Load Current, VOUT = 3.3V, BIAS = 5V,  OUT = 3.3V, BIAS = 5V,   = 3.3V, BIAS = 5V,<br>Burst Mode Operation<br>3.2<br>12VIN<br>24VIN<br>36VIN<br>2.4<br>1.6<br>0.8<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A) 026<br>INPUT CURRENT (A)<br>INPUT CURRENT (A)<br>024<br>**----- End of picture text -----**<br>


_**Figure 24. Input vs. Load Current, VOUT = 3.3V, BIAS = 5V,  OUT = 3.3V, BIAS = 5V,   = 3.3V, BIAS = 5V, Burst Mode Operation**_ 

_**Figure 26. Input vs. Load Current, VOUT = 8V, BIAS = 5V, Burst Mode Operation**_ 

Rev. 0 16 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [201 x 154] intentionally omitted <==**

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18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>027<br>**----- End of picture text -----**<br>


_**Figure 27. Derating, VOUT = 0.8V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

**==> picture [200 x 155] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>029<br>**----- End of picture text -----**<br>


_**Figure 29. Derating, VOUT = 1.2V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

**==> picture [199 x 155] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>031<br>**----- End of picture text -----**<br>


_**Figure 31. Derating, VOUT = 1.8V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

**==> picture [200 x 366] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 28. Derating, VOUT = 1V, BIAS = 5V, DC2820A-B  OUT = 1V, BIAS = 5V, DC2820A-B   = 1V, BIAS = 5V, DC2820A-B<br>Demo Board, TJ = 120°C, Burst Mode Operation,  J = 120°C, Burst Mode Operation,   = 120°C, Burst Mode Operation,<br>All Channels at the same Load<br>18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24VIN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>028<br>030<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>**----- End of picture text -----**<br>


_**Figure 28. Derating, VOUT = 1V, BIAS = 5V, DC2820A-B  OUT = 1V, BIAS = 5V, DC2820A-B   = 1V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation,  J = 120°C, Burst Mode Operation,   = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

_**Figure 30. Derating, VOUT = 1.5V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode, All Channels at the same Load**_ 

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**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>032<br>**----- End of picture text -----**<br>


_**Figure 32. Derating, VOUT = 2V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

Rev. 0 17 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [200 x 367] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24VIN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 33. Derating, VOUT = 2.5V, BIAS = 5V,  OUT = 2.5V, BIAS = 5V,   = 2.5V, BIAS = 5V,<br>DC2820A-B Demo Board, TJ = 120°C, Burst Mode  J = 120°C, Burst Mode   = 120°C, Burst Mode<br>Operation, All Channels at the same Load<br>18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>033<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>035<br>**----- End of picture text -----**<br>


_**Figure 33. Derating, VOUT = 2.5V, BIAS = 5V,  OUT = 2.5V, BIAS = 5V,   = 2.5V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode  J = 120°C, Burst Mode   = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

_**Figure 35. Derating, VOUT = 3.3V, fSW = 2MHz, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

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**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C) 037<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>**----- End of picture text -----**<br>


_**Figure 37. Derating, VOUT = 5V, fSW = 2MHz, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

**==> picture [202 x 367] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 34. Derating, VOUT = 3.3V, BIAS = 5V,  OUT = 3.3V, BIAS = 5V,   = 3.3V, BIAS = 5V,<br>DC2820A-B Demo Board, TJ = 120°C, Burst Mode  J = 120°C, Burst Mode   = 120°C, Burst Mode<br>Operation, All Channels at the same Load<br>18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>034<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>036<br>**----- End of picture text -----**<br>


_**Figure 34. Derating, VOUT = 3.3V, BIAS = 5V,  OUT = 3.3V, BIAS = 5V,   = 3.3V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode  J = 120°C, Burst Mode   = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

_**Figure 36. Derating, VOUT = 5V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

**==> picture [200 x 155] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>0LFM<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>12VIN<br>2 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>038<br>**----- End of picture text -----**<br>


_**Figure 38. Derating, VOUT = 8V, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation, All Channels at the same Load**_ 

Rev. 0 18 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [207 x 158] intentionally omitted <==**

**----- Start of picture text -----**<br>
55<br>4535 |TATA<br>25 iaa|<br>15 mo eee<br>NOISE FLOOR<br>5 FIXED FREQUENCY<br>SPREAD SPECTRUM<br>–5 rl CLASS B PEAK LIMIT<br>0 200 400 600 800 1000<br>FREQUENCY (MHz)<br>AMPLITUDE (dBuV/m)<br>039<br>**----- End of picture text -----**<br>


**==> picture [440 x 157] intentionally omitted <==**

**----- Start of picture text -----**<br>
5040 po<br>|TATA | S|<br>30<br>iaa| OE<br>20<br>mo eee Leia re<br>NOISE FLOOR 10<br>FIXED FREQUENCY CLASS 5 PEAK LIMIT<br>SPREAD SPECTRUM SPREAD SPECTRUM<br>rl CLASS B PEAK LIMIT 0 vi FIXED FREQUENCY<br>200 400 600 800 1000 0 200 400 600 800 1000<br>FREQUENCY (MHz) 039 FREQUENCY (MHz)<br>AMPLITUDE (dBuV/m)<br>040<br>**----- End of picture text -----**<br>


_**Figure 39. CISPR22 Class B Emissions, DC2820A-B Demo Board, VIN = 24V, VOUT = 5V, fSW = 1.2MHz, All Channels Paralleled, IOUT = 10A**_ 

_**Figure 40. CISPR25 Radiated Emission with Class 5 Peak Limit, DC2820A-B Demo Board, VIN = 14V, VOUT = 5V, fSW = 1.2MHz, All Channels Paralleled, IOUT = 12A**_ 

**==> picture [238 x 81] intentionally omitted <==**

**----- Start of picture text -----**<br>
5mV/DIV<br>AC-COUPLED<br>500ns/DIV 041<br>**----- End of picture text -----**<br>


_**Figure 41. Output Voltage Ripple, DC2820A-B Demo Board, VIN = 12V, VOUT = 3.3V, IOUT = 3A, fSW = 1MHz**_ 

**==> picture [201 x 158] intentionally omitted <==**

**----- Start of picture text -----**<br>
25<br>20<br>15<br>10<br>5<br>0<br>0 1 2 3<br>SWITCHING FREQUENCY (MHz)<br>BIAS CURRENT (mA)<br>043<br>**----- End of picture text -----**<br>


_**Figure 43. BIAS Current vs. Frequency, 12VIN to 3.3VOUT, FCM**_ 

**==> picture [206 x 363] intentionally omitted <==**

**----- Start of picture text -----**<br>
60<br>NOISE FLOOR<br>NORMALIZED OUTPUT NOISE<br>40 Seal<br>20 UeUMAalll<br>0<br>eT<br>–20 aal|| © ma<br>–40–60 tim aE LTTE EEE ET TI<br>0.01 0.1 1 10 100 1k<br>FREQUENCY (MHz)<br>Figure 42. Output Noise Spectrum, DC2820A-B Demo<br>Board, VIN = 24V, VOUT = 5V, IOUT = 3A, fSW = 1.2MHz IN = 24V, VOUT = 5V, IOUT = 3A, fSW = 1.2MHz  = 24V, VOUT = 5V, IOUT = 3A, fSW = 1.2MHz OUT = 5V, IOUT = 3A, fSW = 1.2MHz  = 5V, IOUT = 3A, fSW = 1.2MHz OUT = 3A, fSW = 1.2MHz  = 3A, fSW = 1.2MHz SW = 1.2MHz  = 1.2MHz<br>1.6<br>BURST MODE OPERATION<br>FCM<br>1.2 TS<br>0.8<br>YY<br>0.4<br>0 ae<br>0 2 4 6<br>LOAD CURRENT (A)<br>OUTPUT NOISE (dBμV/Hz)<br>042<br>044<br>DROPOUT VOLTAGE (V)<br>**----- End of picture text -----**<br>


_**Figure 42. Output Noise Spectrum, DC2820A-B Demo Board, VIN = 24V, VOUT = 5V, IOUT = 3A, fSW = 1.2MHz IN = 24V, VOUT = 5V, IOUT = 3A, fSW = 1.2MHz  = 24V, VOUT = 5V, IOUT = 3A, fSW = 1.2MHz OUT = 5V, IOUT = 3A, fSW = 1.2MHz  = 5V, IOUT = 3A, fSW = 1.2MHz OUT = 3A, fSW = 1.2MHz  = 3A, fSW = 1.2MHz SW = 1.2MHz  = 1.2MHz**_ 

_**Figure 44. Dropout Voltage vs. Load Current**_ 

Rev. 0 19 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

**==> picture [204 x 154] intentionally omitted <==**

**----- Start of picture text -----**<br>
2000<br>1500<br>1000<br>500<br>0<br>5 10 15 20 25 30 35 40<br>VIN (V)<br>INPUT CURRENT (mA)<br>045<br>**----- End of picture text -----**<br>


_**Figure 45. Input Current vs. VIN, VOUT Short-Circuited**_ 

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**----- Start of picture text -----**<br>
7<br>0LFM<br>6<br>5<br>4<br>3<br>2<br>1 12VIN<br>24VIN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 47. Single Channel Derating, VOUTOUT = 3.3V CH1 ON,<br>CH2 to CH4 OFF, BIAS = 5V, DC2820A-B Demo Board,<br>TJ = 120°C, Burst Mode Operation J = 120°C, Burst Mode Operation  = 120°C, Burst Mode Operation<br>7<br>0LFM<br>6<br>5<br>4<br>3<br>2<br>12VIN<br>1 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>LOAD CURRENT PER CHANNEL (A)<br>049<br>LOAD CURRENT PER CHANNEL (A)<br>047<br>**----- End of picture text -----**<br>


_**Figure 47. Single Channel Derating, VOUTOUT = 3.3V CH1 ON, CH2 to CH4 OFF, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation J = 120°C, Burst Mode Operation  = 120°C, Burst Mode Operation**_ 

_**Figure 49. Dual Channel Derating, VOUT = 1.5V CH1/CH3 ON, CH2/CH4 OFF, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation**_ 

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7<br>0LFM<br>6<br>5<br>4<br>3<br>2<br>1 12VIN<br>24VIN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C) 046<br>LOAD CURRENT PER CHANNEL (A)<br>**----- End of picture text -----**<br>


_**Figure 46. Single Channel Derating, VOUT = 1.5V CH1 ON, CH2 to CH4 OFF, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation**_ 

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7<br>0LFM<br>6<br>5<br>4<br>3<br>2<br>1 12V IN<br>24VIN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>LOAD CURRENT PER CHANNEL (A)<br>048<br>**----- End of picture text -----**<br>


_**Figure 48. Single Channel Derating, VOUT = 5V CH1 ON, CH2 to CH4 OFF, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation**_ 

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7<br>0LFM<br>6<br>5<br>4<br>3<br>2<br>12VIN<br>1 24V IN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>LOAD CURRENT PER CHANNEL (A)<br>050<br>**----- End of picture text -----**<br>


_**Figure 50. Dual Channel Derating, VOUT = 3.3V CH1/CH3 ON, CH2/CH4 OFF, BIAS = 5V, DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation**_ 

Rev. 0 20 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

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7<br>0LFM<br>6<br>5<br>4<br>3<br>2<br>1 12VIN<br>24VIN<br>36VIN<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>LOAD CURRENT PER CHANNEL (A)<br>051<br>**----- End of picture text -----**<br>


_**Figure 51. Dual Channel Derating, VOUT = 5V CH1/CH3 ON, CH2/CH4 OFF, BIAS = 5V,**_ 

_**DC2820A-B Demo Board, TJ = 120°C, Burst Mode Operation**_ 

## **THEORY OF OPERATION** 

## **LTM8060F Overview** 

The LTM8060F is a quad standalone non-isolated step-down switching dc-to-dc power supply that can deliver a peak current of up to 4A per channel. The continuous current is determined by the internal operating temperature. It provides a precisely regulated output voltage programmable through one external resistor from 0.8V to 8V. The input voltage range for VIN1 and VIN34 is 3V to 40V, while the input voltage range for VIN2 is 2V to 40V. 

Given that the LTM8060F is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. The LTM8060F has a fixed fSW peak current mode architecture which supports reliable clock interleaving. See _Figure 52_ for the Simplified Block Diagram. 

The LTM8060F contains current mode controllers, power switching elements, power inductors, and a modest amount of input and output capacitance. The LTM8060F is a fixed frequency pulse-width modulation (PWM) regulator. The switching frequency is set by simply connecting the appropriate resistor value from the RTn pin to GND. 

Internal regulators provide power to the control circuitries. Bias regulators normally draw power from the VINn pin, but if the BIASn pin is connected to an external voltage higher than 3.2V, bias power is drawn from the external source (typically the regulated output voltage). This improves efficiency. Connect BIASn to GND if it is not used. 

To enhance efficiency, the LTM8060F automatically switches to Burst Mode operation in light or no-load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to just a few µA. 

The TRSSn node acts as an auxiliary input to the error amplifier. The voltage at FBn servos to the TRSSn voltage until TRSSn goes above 0.8V. Soft start is implemented by generating a voltage ramp at the TRSSn pin using an external capacitor, which is charged by an internal 2μA constant current. Alternatively, driving the TRSSn pin with a signal source or resistive network provides a tracking function. Do not drive the TRSSn pin with a low-impedance voltage source. See the _Applications Information_ section for more details. 

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**LTM8060F** 

**Data Sheet** 

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**----- Start of picture text -----**<br>
VIN1<br>HOUSEKEEPING AUX1<br>RUN1 10nF CURRENT MODE 1.5µH CIRCUITRY VOUT1<br>CONTROLLER<br>TRSS1 249kΩ 10pF 0.1µF<br>FB1<br>VIN2<br>AUX2<br>RUN2 10nF CURRENT MODE 1.5µH VOUT2<br>CONTROLLER<br>TRSS2 249kΩ 10pF 0.1µF<br>FB2<br>VIN34<br>HOUSEKEEPING AUX3<br>RUN3 10nF CURRENT MODE 1.5µH CIRCUITRY VOUT3<br>CONTROLLER<br>TRSS3 249kΩ 10pF 0.1µF<br>FB3<br>AUX4<br>RUN4 CURRENT MODE 1.5µH VOUT4<br>CONTROLLER<br>TRSS4 249kΩ 10pF 0.1µF<br>FB4<br>Figure 52. LTM8060F Simplified Block Diagram<br>RT12 RT34 SYNC12 SYNC34 CLKOUT12 CLKOUT34 BIAS12 BIAS34 SHARE1 SHARE2 SHARE3 SHARE4 PG1 PG2 PG3 PG4<br>052<br>**----- End of picture text -----**<br>


The LTM8060F contains power good comparators that trip when the FBn pin is at about ±8% of its regulated value. The PGn output is an open-drain transistor that is off when the output is in regulation, allowing an external resistor to pull the PGn pin high. 

The LTM8060F is equipped with a thermal shutdown that inhibits power switching at high junction temperatures. The activation threshold of this function is above the maximum temperature rating to avoid interfering with normal operation, so prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. 

Rev. 0 22 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

## **APPLICATIONS INFORMATION** 

For most applications, the design process is straightforward, and summarized as follows. 

1. See _Table 6_ and find the row with the desired input range and output voltage. 

2.  Apply the recommended CIN, COUT, RFB, and RT values. 

3.  Connect BIAS as indicated. 

When using the LTM8060F with different output voltages, the higher frequency recommended by _Table 6_ will usually result in the best operation. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load, and environmental conditions. Bear in mind that the maximum output current is limited by the junction temperature, the relationship between the input and output voltage magnitude as well as other factors. See the graphs in the _Typical Performance Characteristics_ section for guidance. 

The maximum frequency (and attendant RT value) at which the LTM8060F should be allowed to switch is given in _Table 6_ in the Maximum fSW column, while the recommended frequency (and RT value) for optimal efficiency over the given input condition is given in the fSW column. There are additional conditions that must be satisfied if the synchronization function is used. See the _Synchronization_ section for details. 

## **Set Output Voltage** 

The output voltage is programmed with a FB resistor, as shown in _Figure 53_ . Choose the resistor value according to Equation _1_ . 

**==> picture [139 x 34] intentionally omitted <==**

A 1% resistor is recommended to maintain output voltage accuracy. 

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**----- Start of picture text -----**<br>
CURRENT MODE<br>CONTROLLER<br>1.5µH VOUT<br>0.8V<br>0.1µF 249kΩ 10pF<br>FB<br>RFB<br>053<br>**----- End of picture text -----**<br>


_**Figure 53. Set Output Voltage with a FB Resistor**_ 

## **Capacitor Selection Considerations** 

The CIN and COUT capacitor values in _Table 6_ are the minimum recommended values for the associated operating conditions. Applying capacitor values below those indicated in _Table 6_ is not recommended and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system’s line, load, and environmental conditions. 

The ceramic capacitors are small, robust, and have very low ESR. However, not all ceramic capacitors are suitable. The X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types, 

Rev. 0 23 of 43 

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**LTM8060F** 

**Data Sheet** 

including Y5V, and Z5U have very large temperature and voltage coefficients of capacitance. In an application circuit, they may have only a small fraction of their nominal capacitance, resulting in a much higher output voltage ripple than expected. The ceramic capacitors are also piezoelectric. In Burst Mode operation, the LTM8060F’s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. Since the LTM8060F operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this audible noise is unacceptable, use a high-performance electrolytic capacitor at the output. It may also be a paralleled combination of a ceramic capacitor and a low-cost electrolytic capacitor. 

A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8060F. A ceramic input capacitor combined with trace or cable inductance forms a high-Q (underdamped) tank circuit. If the LTM8060F circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation can be avoided easily; see the _Hot-Plugging Safely_ section. 

**Table 6. Recommended Component Values and Configuration (TA = 25°C)** 

|**VIN** 1 <br>**(V)**|**VOUT**<br>**(V)**|**RFB**<br>**(Ω)**|**CIN **2 <br>**(μF)**|**COUT**<br>**(μF)**|**BIAS**|**CFF**<br>**(pF)**|**fSW**<br>**(Hz)**|**RT**<br>**(kΩ)**|**MAX fSW**<br>**(Hz)**|**MIN RT**<br>**(kΩ)**|
|---|---|---|---|---|---|---|---|---|---|---|
|3 to 40|0.8|Open|4.7 50V X5R 1206|2 × 100 4V X5R 0805|3.2 to 10|100|400k|100|600k|64.9|
|3 to 40|1|1M|4.7 50V X5R 1206|2 × 100 4V X5R 0805|3.2 to 10|100|400k|100|725k|52.3|
|3 to 40|1.2|499k|4.7 50V X5R 1206|2 × 100 4V X5R 0805|3.2 to 10|68|500k|76.8|875k|42.2|
|3.2 to 40|1.5|287k|4.7 50V X5R 1206|2 × 100 4V X5R 0805|3.2 to 10|–|600k|64.9|1M|35.7|
|3.5 to 40|1.8|200k|4.7 50V X5R 1206|1 × 100 4V X5R 0805|3.2 to 10|–|650k|59|1.3M|25.5|
|3.5 to 40|2|165k|4.7 50V X5R 1206|1 × 100 4V X5R 0805|3.2 to 10|–|700k|54.9|1.4M|23.2|
|4.2 to 40|2.5|118k|4.7 50V X5R 1206|1 × 47 4V X5R 0805|3.2 to 10|–|800k|46.4|1.7M|18.2|
|5.5 to 40|3.3|78.7k|4.7 50V X5R 1206|1 × 47 6.3V X5R 0805|3.2 to 10|–|1M|35.7|2.2M|12.7|
|8.5 to 40|5|47.5k|4.7 50V X5R 1206|1 × 47 6.3V X5R 1206|3.2 to 10|–|1.2M|27.4|3M|8.06|
|11 to 40|8|27.4k|4.7 50V X5R 1206|1 × 47 10V X5R 1206|3.2 to 10|–|1.6M|19.6|3M|8.06|



1     The LTM8060F may be capable of the operating at lower input voltages but may skip switching cycles. 2     A bulk input capacitor is required. 

## **Frequency Selection** 

The LTM8060F uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to 3MHz by using a resistor connected from the RT pin to ground. _Table 7_ provides a list of RT resistor values and their resultant frequencies. The resistors in _Table 7_ are standard 1% E96 values. 

## **Operating Frequency Trade-Offs** 

It is recommended that the user apply the optimal RT value given in _Table 7_ for the input and output operating conditions. When using the LTM8060F with different output voltages, the higher frequency recommended by _Table 7_ will usually result in the best operation. System level or other considerations, however, may necessitate another operating frequency. While the LTM8060F is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. A frequency that is too high can reduce efficiency, generate excessive heat, or even damage the LTM8060F if the output is overloaded or short-circuited. A frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. 

## **Table 7. Switching Frequency vs. RT Value** 

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**LTM8060F** 

**Data Sheet** 

|**fSW**<br>**(MHz)**|**RT**<br>**(kΩ)**|
|---|---|
|0.2|200|
|0.3|137|
|0.4|100|
|0.5|76.8|
|0.6|64.9|
|0.7|54.9|
|0.8|46.4|
|0.9|41.2|
|1.0|35.7|
|1.2|27.4|
|1.4|23.2|
|1.6|19.6|
|1.8|16.9|
|2.0|14.7|
|2.2|12.7|
|2.4|11.3|
|2.6|10.2|
|2.8|9.09|
|3.0|8.06|



## **BIASn Pin Considerations** 

The BIASn pin provides drive power for the internal power switching stage and operates other internal circuitry. For proper operation, it must be powered by at least 3.2V. If the output voltage is programmed to 3.2V or higher, BIASn may be simply connected to VOUTn. If VOUTn is less than 3.2V, BIASn can be connected to VINn or some other voltage source. If the BIASn pin voltage is too high, the efficiency of the LTM8060F may suffer. The optimum BIASn voltage is dependent upon many factors, such as load current, input voltage, output voltage, and switching frequency. In all cases, ensure that the maximum voltage at the BIASn pin is less than 10V. If BIASn power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. A 1µF ceramic capacitor works well. The BIASn pin may also be connected to GND at the cost of a small degradation in efficiency. 

## **Maximum Load** 

The maximum practical continuous load that the LTM8060F can drive per channel, while rated at 3A (4A peak), depends upon both the internal current limit and the internal temperature. The internal current limit is designed to prevent damage to the LTM8060F in the case of overload or short-circuit. The internal temperature of the LTM8060F depends upon operating conditions such as the ambient temperature, the power delivered, and the heat-sinking capability of the system. For example, if VOUT1 of LTM8060F is configured to regulate at 1.5V, and the other three channels are turned off, VOUT1 may continuously deliver 4A from 24VIN if the ambient temperature is controlled to less than 60°C. This is much higher than the 3A (4A peak) rating. See the _Typical Performance Characteristics_ section. Similarly, if all four channels of the LTM8060F are delivering 3.3VOUT and the ambient temperature is 100°C, each channel will deliver at most 1.5A from 24VIN, which is less than the 3A (4A peak) rating. 

Rev. 0 25 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

## **Power Derating** 

_Figure 54_ through _Figure 56_ , power loss curves, can be used in coordination with the load current derating curves ( _Figure 57_ through _Figure 65_ ) for calculating an approximate θJA thermal resistance for the LTM8060F with airflow conditions. The power loss curves are taken at room temperature, and are increased with a 1.35 to 1.4 multiplicative factor at 125°C. These factors come from the fact that the power loss of the regulator increases by about 45% from 25°C to 150°C, thus a 45% spread over 125°C delta equates to ~0.35%/°C loss increase. A 125°C maximum junction minus 25°C room temperature equates to a 100°C increase. This 100°C increase multiplied by 0.35%/°C equals a 35% power loss increase at the 125°C junction, thus the 1.35 multiplier. 

The derating curves are plotted with four VOUTn at the same operating condition starting at 16A of total load current and low ambient temperature. The derating curves with the airflow are measured at output voltages of 1.5V, 3.3V and 5V. These are chosen to include the lower and higher output voltage ranges to correlate the thermal resistance. Thermal models are derived from several temperature measurements in a controlled temperature chamber, along with thermal finite element analysis (FEA) modeling. 

The junction temperatures are monitored while ambient temperature is increased with and without airflow. The power loss increases with ambient temperature change and is factored into the derating curves. The junction temperatures are maintained at ~120°C maximum while lowering output current or power while increasing the ambient temperature. The decreased output current will decrease the internal module loss as ambient temperature is increased. 

The derived thermal resistances in _Table 8_ through _Table 10_ for the various conditions can be multiplied by the calculated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. Room temperature power loss can be derived from the power loss curves and adjusted with the above ambient temperature multiplicative factors. The printed circuit board is a 1.6mm thick 6-layer board with two-ounce copper (50μm) for all the layers. 

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4<br>12VIN<br>24VIN<br>36VIN<br>3<br>2<br>1<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 54.  1.5VOUT Power Loss Curves<br>POWER LOSS (W)<br>054<br>**----- End of picture text -----**<br>


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4<br>12VIN<br>24VIN<br>36VIN<br>3<br>2<br>1<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>POWER LOSS (W)<br>055<br>**----- End of picture text -----**<br>


_**Figure 55.  3.3VOUT Power Loss Curves**_ 

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**LTM8060F** 

**Data Sheet** 

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4<br>12VIN<br>24VIN<br>36VIN<br>3<br>2<br>1<br>0<br>0 1 2 3 4<br>LOAD CURRENT (A)<br>Figure 56.  5VOUT Power Loss Curves<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>200LFM<br>2<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 58.  24VIN to 1.5VOUT Derating with Airflow<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C) 060<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>POWER LOSS (W)<br>056<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>058<br>**----- End of picture text -----**<br>


_**Figure 60.  12VIN to 3.3VOUT Derating with Airflow**_ 

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**----- Start of picture text -----**<br>
18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 57.  12VIN to 1.5VOUT Derating with Airflow<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 59.  36VIN to 1.5VOUT Derating with Airflow<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>061<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>059<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>057<br>**----- End of picture text -----**<br>


_**Figure 61.  24VIN to 3.3VOUT Derating with Airflow**_ 

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**LTM8060F** 

**Data Sheet** 

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**----- Start of picture text -----**<br>
18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 62.  36VIN to 3.3VOUT Derating with Airflow<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>062<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>064<br>**----- End of picture text -----**<br>


_**Figure 64.  24VIN to 5VOUT Derating with Airflow**_ 

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**----- Start of picture text -----**<br>
18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>Figure 63.  12VIN to 5VOUT Derating with Airflow<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>0LFM<br>2 200LFM<br>400LFM<br>0<br>0 25 50 75 100 125<br>AMBIENT TEMPERATURE (°C)<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>065<br>063<br>MAXIMUM TOTAL LOAD CURRENT (A)<br>**----- End of picture text -----**<br>


_**Figure 65.  36VIN to 5VOUT Derating with Airflow**_ 

**Table 8. 1.5V Output** 

|**Table 8. 1.5V Output**||||||
|---|---|---|---|---|---|
|**DERATING CURVE**|**VIN**<br>**(V)**|**POWER LOSS**<br>**CURVES**|**AIRFLOW**<br>**(LFM)**|**HEAT SINK**|**θJA (°C/W)**|
|_Figure 57_, _Figure 58_, _Figure 59_|12,24,36|_Figure 54_|0|None|9|
|_Figure 57_, _Figure 58_, _Figure 59_|12,24,36|_Figure 54_|200|None|7.5|
|_Figure 57_, _Figure 58_, _Figure 59_|12,24,36|_Figure 54_|400|None|6.5|



**Table 9. 3.3V Output** 

|**Table 9. 3.3V Output**||||||
|---|---|---|---|---|---|
|**DERATING CURVE**|**VIN**<br>**(V)**|**POWER LOSS**<br>**CURVES**|**AIRFLOW**<br>**(LFM)**|**HEAT SINK**|**θJA (°C/W)**|
|_Figure 60_, _Figure 61_, _Figure 62_|12,24,36|_Figure 55_|0|None|9|
|_Figure 60_, _Figure 61_, _Figure 62_|12,24,36|_Figure 55_|200|None|7.5|
|_Figure 60_, _Figure 61_, _Figure 62_|12,24,36|_Figure 55_|400|None|6.5|



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**analog.com** 

**LTM8060F** 

**Data Sheet** 

**Table 10. 5V Output** 

|**Table 10. 5V Output**||||||
|---|---|---|---|---|---|
|**DERATING CURVE**|**VIN**<br>**(V)**|**POWER LOSS**<br>**CURVES**|**AIRFLOW**<br>**(LFM)**|**HEAT SINK**|**θJA (°C/W)**|
|_Figure 63_, _Figure 64_, _Figure 65_|12,24,36|_Figure 56_|0|None|9|
|_Figure 63_, _Figure 64_, _Figure 65_|12,24,36|_Figure 56_|200|None|7.5|
|_Figure 63_, _Figure 64_, _Figure 65_|12,24,36|_Figure 56_|400|None|6.5|



## **Load Sharing** 

The four LTM8060F channels may be paralleled to produce higher currents. To do this on two or more LTM8060F modules, connect the VINn, VOUTn, FBn, and SHAREn pins of all the paralleled channels/modules together. To ensure that paralleled channels startup together, the TRSSn pins may be all connected together, as well. If it is inconvenient to connect the TRSSn pins together, ensure that the same value soft start capacitors are used for each µModule regulator. When load sharing among n units and using a single RFB resistor, the value of the resistor is given by Equation _2_ . 

**==> picture [215 x 25] intentionally omitted <==**

Examples of load-sharing applications are given in _Figure 70_ through _Figure 73_ in the _Typical Applications_ section. 

## **Burst Mode Operation** 

To enhance efficiency at light loads, the LTM8060F automatically switches to Burst Mode operation, which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LTM8060F delivers single-cycle bursts of current to the output capacitor followed by sleep periods where most of the internal circuitry is powered off, and energy is delivered to the load by the output capacitor. During the sleep time, VINn and BIASn quiescent currents are greatly reduced, so, as the load current decreases towards a no-load condition, the percentage of time that the LTM8060F operates in sleep mode increases and the average input current is greatly reduced, resulting in higher light load efficiency. 

The Burst Mode operation is enabled by tying SYNC to GND. 

## **Minimum Input Voltage** 

The LTM8060F is a step-down converter, therefore, a minimum amount of headroom is required to keep the output in regulation. Keep the input above 3V to ensure proper operation. Voltage transients or ripple valleys that cause the input to fall below 3V may turn off the LTM8060F. 

The VIN1 must be above 3V for Channel 1 and Channel 2 to operate. If VIN1 is above 3V, Channel 2 will operate if VIN2 is above 2V. 

The VIN34 must be above 3V for Channel 3 and Channel 4 to operate. 

## **Output Voltage Tracking and Soft Start** 

The LTM8060F allows the user to adjust its output voltage ramp rate using the TRSSn pin. An internal 2μA pulls up the TRSSn pin to about 2.4V. Putting an external capacitor on TRSSn enables the soft starting the output to reduce current surges on the input supply. During the soft start ramp the output voltage will proportionally track the TRSSn pin voltage. For output tracking applications, TRSSn can be externally driven by another voltage source. From 0V to 0.8V, the TRSSn voltage will override the internal 0.8V reference input to the error amplifier, thus regulating the FBn pin voltage to that of the TRSSn pin. When TRSSn is above 0.8V, tracking is disabled, and the 

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**Data Sheet** 

feedback voltage will be regulated to the internal reference voltage. The TRSSn pin may be left floating if the function is not needed. 

An active pull-down circuit is connected to the TRSSn pin, which will discharge the external soft start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. Fault conditions that clear the soft start capacitor are the RUNn pin transitioning low, VINn voltage falling too low, or thermal shutdown. 

## **Prebiased Output** 

As discussed in the _Output Voltage Tracking and Soft Start_ section, the LTM8060F regulates the output to the FBn voltage determined by the TRSSn pin whenever TRSSn is less than 0.8V. If the LTM8060F output is higher than the target output voltage, and SYNCn is not held below 0.8V, the LTM8060F will attempt to regulate the output to the target voltage by returning a small amount of energy back to the input supply. If nothing is loading the input supply, its voltage may rise. Take care that it does not rise so high that the input voltage exceeds the absolute maximum rating of the LTM8060F. If SYNC is grounded, the LTM8060F will not return current to the input. 

## **Frequency Foldback** 

The LTM8060F is equipped with frequency foldback, which acts to reduce the thermal and energy stress on the internal power elements during a short circuit or output overload condition. If the LTM8060F detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. This in turn limits the amount of energy that can be delivered to the load under fault. During the startup time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. When a clock is applied to the SYNCn pin, the SYNCn pin is floated or held high, the frequency foldback is disabled, and the switching frequency will slow down only during overcurrent conditions. 

## **Synchronization** 

To select low ripple Burst Mode operation, connect the SYNCn pin below about 0.8V (this can be ground or a logic low output). To synchronize the LTM8060F oscillator to an external frequency, connect a square wave (with about 20% to 80% duty cycle) to the SYNCn pin. The square wave amplitude should have valleys that are below 0.8V and peaks above 1.5V. 

The LTM8060F may be synchronized over a 200kHz to 3MHz range. The LTM8060F will not enter Burst Mode operation at light output loads while synchronized to an external clock. The RT resistor should be chosen to set the switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher, the RT should be selected for 500kHz or lower. 

The LTM8060F features spread-spectrum operation to further reduce electromagnetic interference/electromagnetic interference compatibility (EMI/EMC) emissions. To enable spread-spectrum operation, apply between 2.8V and 4V to the SYNCn pin. In this mode, triangular frequency modulation is used to vary the switching frequency between the value programmed by RT to about 20% higher than that value. The modulation frequency is about 7kHz. For example, when the LTM8060F is programmed to 2MHz, the frequency will vary from 2MHz to 2.4MHz at a 7kHz rate. When spread-spectrum operation is selected, the Burst Mode operation is disabled, and the part may run in discontinuous-conduction mode. 

## **Shorted Input Protection** 

Care needs to be taken in systems where the output is held high when the input to the LTM8060F is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode OR’ed with the LTM8060F’s output. If the VINn pin is allowed to float and the RUNn pin is held high (either by a logic signal or because it is connected to VINn), then the LTM8060F’s internal circuitry pulls its quiescent current 

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**Data Sheet** 

through its internal power switch. This is fine if your system can tolerate a few milliamps in this state. If you ground the RUNn pin, the internal current drops to zero. However, if the VINn pin is grounded while the output is held high, parasitic diodes inside the LTM8060F can pull large currents from the output through the VINn pin. _Figure 66_ shows a circuit that runs only when the input voltage is present, and that protects against a shorted or reversed input. 

**==> picture [153 x 85] intentionally omitted <==**

**----- Start of picture text -----**<br>
VIN VIN<br>LTM8060F<br>RUN<br>066<br>**----- End of picture text -----**<br>


## _**Figure 66.  The Input Diode Prevents a Shorted Input from Discharging a Backup Battery Connected to the Output. It also Protects the Circuit from a Reversed Input, the LTM8060F Runs only when the Input is Present**_ 

## **PCB Layout** 

Most of the headaches associated with PCB layout design have been alleviated or even eliminated by the high level of integration of the LTM8060F. The LTM8060F is nevertheless a switching power supply, and care must be taken to minimize EMI and ensure proper operation. Even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See _Figure 67_ for a suggested layout. Ensure that the grounding and heat sinking are acceptable. 

A few rules to keep in mind are: 

1.  Place the RFB and RT resistors as close as possible to their respective pins. 

2.  Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8060F. 

3.  Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8060F. 

4.  Place the CIN and COUT capacitors such that their ground current flows directly adjacent to or underneath the LTM8060F. 

5.  Connect all the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8060F. 

6.  Use vias to connect the GND copper area to the board’s internal ground planes. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the PCB. Pay attention to the location and density of the thermal vias in _Figure 67_ . The LTM8060F can benefit from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to their proximity to internal power handling components. The optimum number of thermal vias depends upon the PCB design. For example, a board might use very small via holes. It should employ more thermal vias than a board that uses larger holes. 

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**Data Sheet** 

**==> picture [260 x 191] intentionally omitted <==**

**----- Start of picture text -----**<br>
CIN1 CIN2<br>RT12<br>COUT2 COUT1<br>COUT3 COUT4<br>CIN34 CIN34<br>RT34<br>067<br>**----- End of picture text -----**<br>


_**Figure 67.  Layout Showing Suggested External Components, GND Plane, and Thermal Vias**_ 

## **Hot-Plugging Safely** 

The small size, robustness, and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8060F. However, these capacitors can cause problems if the LTM8060F is plugged into a live supply (Refer to the _Application Note 88_ for a complete discussion). The low-loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the VINn pin of the LTM8060F can ring to more than twice the nominal input voltage, possibly exceeding the LTM8060F’s rating and damaging the part. If the input supply is poorly controlled or the LTM8060F is hot-plugged into an energized supply, the input network should be designed to prevent this overshoot. This can be accomplished by installing a small resistor in series to VINn, but the most popular method of controlling input voltage overshoot is adding an electrolytic bulk cap to the VINn net. This capacitor’s relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low-frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. 

## **Thermal Considerations** 

The LTM8060F output current may need to be derated if it is required to operate in a high ambient temperature. The amount of current derating is dependent upon the input voltage, output power, and ambient temperature. The derating curves shown in the _Typical Performance Characteristics_ section can be used as a guide. These curves were generated by the LTM8060F mounted to a 104cm[2] 6-layer FR4 PCB. Boards of other sizes and layer counts can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load, and environmental operating conditions. 

For increased accuracy and fidelity to the actual application, many designers use FEA or computational fluid dynamics (CFD) to predict thermal performance. To that end, the pin configuration typically gives three dominant thermal coefficients: 

1.  θJA – Thermal resistance from junction to ambient. 

2.  θJCbot – Thermal resistance from the junction to the bottom of the product case. 

3.  θJCtop – Thermal resistance from the junction to the top of the product case. 

While the meaning of each of these coefficients may seem to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in JESD5112 and are quoted or paraphrased as follows. 

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1.  θJA is the natural convection junction-to-ambient air thermal resistance measured in one cubic foot sealed enclosure. This environment is sometimes referred to as “still air,” although natural convection causes the air to move. This value is determined with the part mounted to a JESD519-defined test board, which does not reflect an actual application or viable operating condition. 

2.  θJCbot is the junction-to-board thermal resistance with all the component power dissipation flowing through the bottom of the package. In the typical µModule regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may be useful for comparing packages, but the test conditions do not generally match the user’s application. 

3.  θJCtop is determined with nearly all the component power dissipation flowing through the top of the package. As the electrical connections of the typical µModule regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbot, this value may be useful for comparing packages, but the test conditions do not generally match the user’s application. 

Given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a µModule regulator. Thus, none of them can be individually used to accurately predict the thermal performance of the product. Likewise, it would be inappropriate to attempt to use anyone coefficient to correlate to the junction temperature vs. load graphs given in the product’s datasheet. The only appropriate way to use the coefficients is when running a detailed thermal analysis, such as FEA, which considers all the thermal resistances simultaneously. 

A graphical approximation of these dominant thermal resistances is shown in _Figure 68_ . Some thermal resistance elements, such as heat flowing out the side of the package, are not defined by the JEDEC standard, and are not shown. The blue resistances are contained within the µModule regulator, and the green is outside. 

The die temperature of the LTM8060F must be lower than the maximum rating, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8060F. The bulk of the heat flow out of the LTM8060F is through the bottom of the package and the pads into the PCB. Consequently, a poor PCB design can cause excessive heating, resulting in impaired performance or reliability. See the _PCB Layout_ section for a design suggestion. 

**==> picture [405 x 147] intentionally omitted <==**

**----- Start of picture text -----**<br>
µModule DEVICE θJA JUNCTION-TO-AMBIENT RESISTANCE<br>θJCtop JUNCTION-TO-CASE CASE (TOP)-TO-AMBIENT<br>(TOP) RESISTANCE RESISTANCE<br>JUNCTION AMBIENT<br>θJCbot JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD BOARD-TO-AMBIENT<br>(BOTTOM) RESISTANCE RESISTANCE RESISTANCE<br>**----- End of picture text -----**<br>


**==> picture [4 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
068<br>**----- End of picture text -----**<br>


_**Figure 68. Graphical Representation of Thermal Coefficients, Including the JESD5112 Terms**_ 

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**Data Sheet** 

## **Typical Applications** 

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**----- Start of picture text -----**<br>
VIN VIN1 BIAS12<br>8.5V TO 40V RUN1 AUX1<br>VOUT1<br>14.7kΩ RT12 47.5kΩ 47µF V5VOUT1<br>fSW = 2MHz FB1 UP TO 3A*(4A PK)<br>SYNC12<br>VOUT2<br>VOUT2<br>78.7kΩ 47µF 3.3V<br>FB2 UP TO 3A*<br>VIN2 (4A PK)<br>GND<br>RUN2 LTM8060F<br>VIN34 BIAS34<br>AUX3<br>RUN3<br>RUN4 VOUT3<br>PINS NOT USED:AUX2, AUX4, TRSS1 14.7kΩ RT34 47.5kΩ 47µF V5VOUT3<br>TRSS2, TRSS3, TRSS4,SHARE1, SHARE2, fSW = 2MHz FB3 UP TO 3A*(4A PK)<br>SHARE3, SHARE4, SYNC34<br>PG1, PG2, PG3, VOUT4<br>PG4, CLKOUT12, VOUT4<br>CLKOUT34 78.7kΩ 47µF 3.3V<br>FB4 UP TO 3A*<br>(4A PK)<br>4.7µF<br>4×<br>069<br>**----- End of picture text -----**<br>


_**Figure 69. 8.5V to 40V Input to 5V at 3A (4A Peak), 3.3V at 3A (4A Peak), 5V at 3A (4A Peak), and 3.3V at 3A (4A Peak)**_ 

*Output current capability (transient peak or continuous) is subject to environmental factors such as ambient temperature, airflow, or other cooling techniques. For different VIN, VOUT, and TA conditions, see the notes section (Note _3_ ) of the _Electrical Characteristics_ table and the derating curves in the _Applications Information_ section. 

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VIN12 VIN1 TRSS1<br>5.5V TO 40V C4<br>RUN1 TRSS2 1nF<br>VOUT1<br>35.7kΩ<br>39.2kΩ<br>RT12<br>fSW12 = 1MHz FB1<br>FB2<br>SYNC12<br>VOUT2<br>VOUT12<br>47µF 3.3V<br>×2 UP TO 6A*<br>VIN2 GND (8A PK)<br>4.7µF RUN2 LTM8060F SHARE1<br>×2<br>SHARE2<br>VIN34 VIN34 TRSS3<br>3.2V TO 40V C5<br>4.7µF RUN3 TRSS4 1nF<br>×2 RUN4 VOUT3<br>64.9kΩ<br>143kΩ<br>RT34<br>fSW34 = 600kHz FB3<br>FB4<br>SYNC34<br>VOUT4<br>VOUT34<br>100µF 1.5V<br>×2 UP TO 8A*<br>PINS NOT USED: GND<br>AUX1, AUX2, AUX3, AUX4, SHARE3<br>BIAS12, BIAS34<br>PG1, PG2, PG3, SHARE4<br>PG4, CLKOUT12,<br>CLKOUT34 070<br>**----- End of picture text -----**<br>


_**Figure 70. 5.5V to 40V Input to Paralleled 3.3V at 6A (8A Peak), 3.2V to 40V Input to Paralleled 1.5V at 8A**_ 

*Output current capability (transient peak or continuous) is subject to environmental factors such as ambient temperature, airflow, or other cooling techniques. For different VIN, VOUT, and TA conditions, see the notes section (Note _3_ ) of the _Electrical Characteristics_ table and the derating curves in the _Applications Information_ section. 

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**Data Sheet** 

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**----- Start of picture text -----**<br>
C5<br>VIN VIN1 1nF<br>3V TO 40V RUN1<br>VOUT1<br>100kΩ<br>RT12<br>fSW12 = 400kHz<br>SYNC12<br>VOUT2<br>249kΩ<br>FB1<br>VIN2<br>FB2<br>RUN2<br>LTM8060F FB3<br>FB4<br>VIN34 CLKOUT12<br>SYNC34<br>RUN3<br>4.7µF<br>×4 RUN4 VOUT3<br>100kΩ<br>RT34<br>fSW34 = 400kHz<br>VOUT4<br>VOUT<br>100µF 1V<br>PINS NOT USED: ×4 UP TO 16A*<br>AUX1, AUX2, AUX3, AUX4, GND<br>BIAS12, BIAS34,<br>PG1, PG2, PG3, PG4,<br>CLKOUT34<br>TRSS1 TRSS2 TRSS3 TRSS4<br>SHARE1 SHARE2 SHARE3 SHARE4<br>071<br>**----- End of picture text -----**<br>


_**Figure 71.  3V to 40V Input to Paralleled 1V at 16A**_ 

*Output current capability (transient peak or continuous) is subject to environmental factors such as ambient temperature, airflow, or other cooling techniques. For different VIN, VOUT, and TA conditions, see the notes section (Note _3_ ) of the _Electrical Characteristics_ table and the derating curves in the _Applications Information_ section. 

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**Data Sheet** 

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C4<br>VIN VIN1 VIN1 4.7nF<br>3V TO RUN1 RUN1<br>40V<br>VOUT1 VOUT1<br>100kΩ 100kΩ<br>RT12 RT12<br>fSW12 = 400kHz fSW12 = 400kHz<br>SYNC12<br>VOUT2 VOUT2<br>CLKOUT34 SYNC12 249kΩ<br>FB1<br>VIN2 FB1 249kΩ VIN2 FB2<br>RUN2 RUN2<br>LTM8060F FB2 LTM8060F FB3<br>FB3 FB4<br>FB4 CLKOUT12<br>VIN34 CLKOUT12 VIN34 SYNC34<br>RUN3 SYNC34 RUN3<br>4.7µF<br>×4 RUN4 VOUT3 4.7µF4× RUN4 VOUT3<br>100kΩ 100kΩ<br>RT34 RT34<br>fSW34 = 400kHz fSW34 = 400kHz<br>VOUT4 VOUT4<br>VOUT<br>100µF 100µF 1V<br>GND 4× GND ×4 UP TO 32A*<br>PINS NOT USED:<br>AUX, AUX2, AUX3, AUX4,<br>BIAS12, BIAS34<br>PG1, PG2, PG3, PG4<br>TRSS1 TRSS2 TRSS3 TRSS4 TRSS1 TRSS2 TRSS3 TRSS4<br>SHARE1 SHARE2 SHARE3 SHARE4 SHARE1 SHARE2 SHARE3 SHARE4<br>**----- End of picture text -----**<br>


_**Figure 72.  Two LTM8060F are Paralleled to Supply 1V at 32A Output in FCM**_ 

*Output current capability (transient peak or continuous) is subject to environmental factors such as ambient temperature, airflow, or other cooling techniques. For different VIN, VOUT, and TA conditions, see the notes section (Note _3_ ) of the _Electrical Characteristics_ table and the derating curves in the _Applications Information_ section. 

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**Data Sheet** 

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**----- Start of picture text -----**<br>
C4<br>VIN VIN1 VIN1 4.7nF<br>3V TO 40V RUN1 RUN1<br>VOUT1 VOUT1<br>100kΩ 100kΩ<br>RT12 RT12<br>VOUT2 VOUT2<br>VIN2 249kΩ VIN2 249kΩ<br>RUN2 LTM8060F FB1 RUN2 LTM8060F FB1<br>FB2 FB2<br>FB3 FB3<br>VIN34 FB4 VIN34 FB4<br>LTC6909OUT1 fSW = 400kHz 4.7µF×4 RUN3RUN4 VOUT3 4.7µF4× RUN3RUN4 VOUT3<br>OUT2<br>OUT3 100kΩ 100kΩ<br>OUT4 RT34 RT34<br>OUT5 VOUT4 VOUT4 VOUT<br>OUT6 100µF 100µF 1V<br>4× ×4 UP TO 32A*<br>OUT7 GND GND<br>OUT8<br>SYNC12 SYNC12<br>SYNC34 SYNC34<br>PINS NOT USED:<br>AUX1, AUX2. AUX3, AUX4,<br>BIAS12, BIAS34,<br>PG1, PG2, PG3, PG4,<br>CLKOUT12, CLKOUT34<br>TRSS1 TRSS2 TRSS3 TRSS4 TRSS1 TRSS2 TRSS3 TRSS4<br>SHARE1 SHARE2 SHARE3 SHARE4 SHARE1 SHARE2 SHARE3 SHARE4<br>073<br>**----- End of picture text -----**<br>


_**Figure 73.  Two LTM8060F are Paralleled to Supply 1V at 32A Output with 45° Phase-Shift Interleaving Through All Eight Channels**_ 

*Output current capability (transient peak or continuous) is subject to environmental factors such as ambient temperature, airflow, or other cooling techniques. For different VIN, VOUT, and TA conditions, see the notes section (Note _3_ ) of the _Electrical Characteristics_ table and the derating curves in the _Applications Information_ section. 

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**Data Sheet** 

## **Related Parts** 

## **Table 11. Related Parts** 

|**PART NUMBER**|**DESCRIPTION**|**COMMENTS**|
|---|---|---|
|_LTM8063_|40V, 2A step-down Silent Switcher<br>µModule regulator|3.2V ≤ VIN≤ 40V, 0.8V ≤ VOUT≤ 15V,<br>4mm × 6.25mm × 2.22mm BGApackage|
|_LTM8065_|40V, 2.5A step-down Silent Switcher<br>µModule regulator|3.4V ≤ VIN≤ 40V, 0.97V ≤ VOUT≤ 18V,<br>6.25mm × 6.25mm × 2.32mm BGApackage|
|_LTM8053_|40V, 3.5A step-down Silent Switcher<br>µModule regulator|3.4V ≤ VIN≤ 40V, 0.97V ≤ VOUT≤ 15V,<br>6.25mm × 9mm × 3.32mm BGApackage|
|_LTM8078_|40V, dual 1.4A step-down Silent Switcher<br>µModule regulator|3V ≤ VIN≤ 40V, 0.8V ≤ VOUT≤ 10V,<br>6.25mm × 6.25mm × 2.32mm BGApackage|
|_LTM8024_|40V, dual 3.5A step-down Silent Switcher<br>µModule regulator|3V ≤ VIN≤ 40V, 0.8V ≤ VOUT≤ 8V,<br>9mm × 11.25mm × 3.32mm BGApackage|
|_LTM8051_|40V, quad 1.2A step-down Silent Switcher<br>µModule regulator|3V ≤ VIN≤ 40V, 0.8V ≤ VOUT≤ 8V,<br>6.25mm × 11.25mm × 2.32mm BGApackage|
|_LTM8060_|40V, quad 3A step-down Silent Switcher<br>µModule regulator|3V ≤ VIN≤ 40V, 0.8V ≤ VOUT≤ 8V,<br>16mm × 11.9mm × 3.32mm BGApackage|
|_LTM8073_|60V, 3A step-down µModule regulator|3.4V ≤ VIN≤ 60V, 0.85V ≤ VOUT≤ 15V,<br>6.25mm × 9mm × 3.32mm BGApackage|
|_LTM8071_|60V, 5A step-down Silent Switcher<br>µModule regulator|3.6V ≤ VIN≤ 60V, 0.97V ≤ VOUT≤ 15V,<br>9mm × 11.25mm × 3.32mm BGApackage|
|_LTM4644_|Quad 4A, 14V step-down µModule regulator|4V ≤ VIN≤ 14V, 0.6V ≤ VOUT≤ 5.5V,<br>9mm × 15mm × 5.01mm BGApackage|
|_LTM4643_|Quad 3A, 20V Step-Down µModule regulator|4V ≤ VIN≤ 20V, 0.6V ≤ VOUT≤ 3.3V,<br>9mm × 15mm × 1.82mm LGA and<br>9mm × 15mm × 2.42mm BGApackages|



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**Data Sheet** 

## **OUTLINE DIMENSIONS** 

_**Figure 74.  165-Pin, 16mm × 11.9mm × 2.9mm, Pre-Soldered Grid Array (PSGA)**_ 

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**Data Sheet** 

## **ORDERING GUIDE** 

## **Table 12.Ordering Guide** 

|**ORDERING GUIDE**<br>**Table 12.Ordering Guide**||||
|---|---|---|---|
|**MODEL**|**TEMPERATURE**<br>**RANG**~~**E**~~1|**PACKAGE DESCRIPTION**|**PACKAGE OPTION**|
|LTM8060FEV#PBF|–40°C to 125°C|LTM8060FV part marking<br>SAC305 (RoHS) pad finish*<br>E1 finish code<br>Moisture sensitivitylevel 4(MSL 4)rated device|_165-Pin, 16mm × 11.9mm ×_<br>_2.9mm, Pre-Soldered Grid_<br>_Array (PSGA)_|
|LTM8060FIV#PBF|–40°C to 125°C|LTM8060FV part marking<br>SAC305 (RoHS) pad finish<br>E1 finish code<br>Moisture sensitivitylevel 4(MSL 4)rated device|_165-Pin, 16mm × 11.9mm ×_<br>_2.9mm, Pre-Soldered Grid_<br>_Array (PSGA)_|



- 1 The LTM8060FE is guaranteed to meet performance specifications from 0°C to 125°C internal. Specifications over the full – 40°C to 125°C internal operating temperature range are assured by design, characterization, and correlation with statistical process controls. The LTM8060FI is guaranteed to meet specifications over the full –40°C to 125°C internal operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance, and other environmental factors. 

Contact the factory for parts specified with wider operating temperature ranges. *Pad finish code is per IPC/JEDEC J-STD-609. The device temperature grade is indicated by a label on the shipping container. This product is not recommended for second side reflow. This product is moisture sensitive. For more information, go to _Recommended LGA and BGA PCB assembly and manufacturing procedures._ The PSGA package should follow BGA assembly and manufacturing procedures. 

_LGA and BGA package and tray drawings._ 

**Table 13.Evaluation Board** 

|**Table 13.Evaluation Board**||
|---|---|
|**PART NUMBER**|**DESCRIPTION**|
|DC2820A-B|40VIN quad 3A Silent SwitcherµModule regulator with EMI shield.|



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**Data Sheet** 

## **SELECTOR GUIDE** 

## **Package Photos** 

(Part Marking Is Laser Mark) 

## **Design Resources** 

**Table 14.Design Resources** 

|**Design Resources**<br>**Table 14.Design ResourcesDesign Resources**|||
|---|---|---|
||**SUBJECT**|**DESCRIPTION**|
|_µModule Design and Manufacturing Resources_|**Design:**<br> Selector guides<br> Demo boards and<br>Gerber files.<br> Free simulation tools|**Manufacturing:**<br> Quick start guide<br> PCB design, assembly, and<br>manufacturing guidelines<br> Package and board<br>level reliability|
|_µModule Regulator Products Search_| Sort table of products by parameters and download<br>the result as a spread sheet.<br> Search using the Quick Power Search parametric table.<br>Quiek Pi<br>Si<br>h<br>vewst<br>‘otind) [Jv<br>ots [Jv<br>OUTPUT<br>|<br>Vou<br>|<br>lv<br>lout<br>|<br>|A<br>FEATURES |<br>O LowEM!<br>©) Ultrathin © Internal Heat Sink<br>«=D||
|_Digital Power System Management_|The Analog Devices family of digital power supply management<br>ICs are highly integrated solutions that offer essential functions,<br>including power supply monitoring, supervision, margining and<br>sequencing, and feature EEPROM for storing user configurations<br>and fault logging.||



Rev. 0 42 of 43 

**analog.com** 

**LTM8060F** 

**Data Sheet** 

ALL INFORMATION CONTAINED HEREIN IS PROVIDED “AS IS” WITHOUT REPRESENTATION OR WARRANTY. NO RESPONSIBILITY IS ASSUMED BY ANALOG DEVICES FOR ITS USE, NOR FOR ANY INFRINGEMENTS OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES THAT MAY RESULT FROM ITS USE. SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. NO LICENCE, EITHER EXPRESSED OR IMPLIED, IS GRANTED UNDER ANY ADI PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR ANY OTHER ADI INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS, IN WHICH ADI PRODUCTS OR SERVICES ARE USED. TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. ALL ANALOG DEVICES PRODUCTS CONTAINED HEREIN ARE SUBJECT TO RELEASE AND AVAILABILITY. 

Rev. 0 43 of 43 

**analog.com**
Updated at April 10, 2026
Since its inception in 1965, Analog Devices has established itself as a global leader in the design and manufacturing of high-performance analog, mixed-signal, and digital signal processing (DSP) integrated circuits. The company is renowned for solving complex engineering challenges by providing critical technologies that seamlessly convert real-world phenomena into precise electrical signals for the industrial, automotive, communications, and consumer markets. Within its extensive portfolio, Analog Devices provides highly reliable clock, timing, and frequency management solutions, featuring a comprehensive array of precision timers, oscillators, and pulse generators. Complementing this core lineup is a robust offering of driver and interface ICs, particularly high-performance I/O expanders that enable seamless connectivity and streamline complex electronic system architectures. Beyond these foundational integrated circuits, Analog Devices leads the industry in sensor innovation, delivering advanced MEMS accelerometers and integrated MEMS modules designed for exceptional precision in motion sensing. To support complete hardware designs, the company's specialized offerings also encompass discrete bipolar transistors, sub-2.4GHz RF transceivers, temperature-compensated oscillators, and dedicated power management components such as DC/DC converters and LED driver ICs.
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