FLS0116MX

## **Is Now Part of** 

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## **FLS0116** 

## **MOSFET Integrated Smart LED Lamp Driver IC with PFC Function** 

## **Features** 

- Built-in MOSFET(1 A / 550 V) 

- Digitally Implemented Active-PFC Function 

- No Additional Circuit for Achieving High PF 

- Application Input Range: 80 VAC ~ 308 VAC 

- Built-In HV Supplying Circuit: Self Biasing 

- AOCP Function with Auto-Restart Mode 

- Built-In Over-Temperature Protection (OTP) 

- Cycle-by-Cycle Current Limit 

## **Description** 

The FLS0116 LED lamp driver is a simple IC with integrated MOSFET and PFC function. The special “adopted digital” technique automatically detects input voltage condition and sends an internal reference signal to achieve high power factor. When AC input is applied to the IC, the PFC function is automatically enabled. When DC input is applied to the IC, the PFC function is automatically disabled. The FLS0116 does not need a bulk (electrolytic) capacitor for supply rail stability, which significantly improves LED lamp life. 

- Current Sense Pin Open Protection 

- Low Operating Current: 0.85 mA (Typical) 

- Under-Voltage Lockout with 5 V Hysteresis 

- Programmable Oscillation Frequency 

- Programmable LED Current 

- Analog Dimming Function 

- Soft-Start Function 

- Precise Internal Reference: ±3% 

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L1<br>LED<br>D1<br>Fuse FLS0116 L3<br>CS DRAIN<br>BD<br>C1 C2 VCC HV<br>GND<br>RT ADIM<br>R1 C3<br>R2 C4<br>L2<br>**----- End of picture text -----**<br>


## **Applications** 

**Figure 1. Typical Application** 

- LED Lamp for Decorative Lighting 

- LED Lamp for Low-Power Lighting Fixture 

## **Ordering Information** 

|**Part Number**|**Part Number**<br>**Operating**<br>**Temperature Range**|**Package**|**Packing Method**|
|---|---|---|---|
|FLS0116MX|-40°C to +125°C|7-Lead, Small-Outline Integrated Circuit (SOIC),<br>JEDEC MS-012, .150-inch, Narrow Body|Tape & Reel|



© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

www.fairchildsemi.com 

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Block Diagram<br>VCC 2 VCC JFET 7 HV<br>ZCD UVLO<br>time<br>IAD ZCD 8 DRAIN<br>ADIM 5 DAC<br>Soft-Start TSD<br>Digital Block<br>RT 4 Oscillator R Q<br>Reference - S<br>+<br>LEB 1 CS<br>GND 3 Leading-Edge Blanking<br>FLS0116 -<br>+ AOCP<br>2.5V<br>Figure 2. Block Diagram<br>Pin Configuration<br>CS DRAIN<br>VCC HV<br>GND<br>RT ADIM<br>a<br>Figure 3. Pin Configuration<br>Pin Definitions<br>Pin #  Name  Description<br>Current Sense . Limits output current, depending on the sensing resistor voltage. The CS pin is<br>1  CS<br>also used to set the LED current regulation.<br>2  VCC  VCC . Supply pin for stable IC operation; ZCD signal detection used for accurate PFC function.<br>3  GND  GROUND . Ground for the IC<br>RT . Programmable operating frequency using an external resistor; the IC has pre-fixed<br>4  RT<br>frequency when this pin is open or floating.<br>Analog Dimming . Connect to the internal current source. Use to change the output current<br>5  ADIM  using an external resistor. If ADIM is not used, connect a 0.1 µF bypass capacitor between the<br>ADIM and GND.<br>7  HV  High Voltage . Connect to the high-voltage line and supply current to the IC.<br>8  DRAIN  DRAIN . The drain pin of internal MOSFET<br>FLS0116<br>**----- End of picture text -----**<br>


© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Absolute Maximum Ratings** 

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. 

|**Symbol**|**Parameter**|**Parameter**|**Min.**|**Max.**|**Unit**|
|---|---|---|---|---|---|
|VCC|IC SupplyVoltage|||20|V|
|HV|High Voltage Sensing|||550|V|
|DRAIN|Internal Drain Voltage|||550|V|
|VADIM|AnalogDimming|||5|V|
|VRT|RT Pin Voltage|||5|V|
|VCS|Allowable Current SensingDetection Voltage|||5|V|
|TA|Operating Ambient Temperature Range||-40|+125|C|
|TJ|Operating Junction Temperature||-40|+150|C|
|TSTG|Storage Temperature Range||-65|+150|C|
|θJA|Thermal Resistance Junction-Air(1,2)|||135|C/W|
|PD|Power Dissipation|||660|mW|
|ESD|Electrostatic Discharge Capability|Human BodyModel, JESD22-A114||2000|V|
|||Charged Device Model, JESD22-C101|ed Device Model, JESD22-C101|1000||



## **Notes:** 

1. Thermal resistance test board. Size: 76.2 mm x 114.3 mm x 1.6 mm (1S0P); JEDEC standard: JESD51-2, JESD513. 

2. Assume no ambient airflow. 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Electrical Characteristics** 

Typical values are at TA = +25°C. Specifications to -40°C ~ 125°C are guaranteed by design based on final characterization results. 

|**Symbol**|**Parameter**|**Condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|**VCC Bias Section**|||||||
|VCC|VCCRegulator Output Voltage|VHV=100 VDC|14.0|15.5|17.0|V|
|VCCST+|UVLO Positive-GoingThreshold|VCCIncreasing|12|13|14|V|
|VCCST-|UVLO Negative-GoingThreshold|VCCDecreasing|7|8|9|V|
|VCCHYS|UVLO Hysteresis||4|5|6|V|
|IHV|HV Pin Current|VHV=100 VDC, RT=Open|en|0.85|1.20|mA|
|IST|StartupCurrent|||120|150|μA|
|**Switching Section**|||||||
|fOSC|Operating Frequency|RT=5.95 kΩ|200|250|300|kHz|
|||RT=87 kΩ|16|20|24|kHz|
|||RTOpen|40.5|45.0|49.5|kHz|
|tMIN|Minimum On Time(3)|||400||ns|
|DMAX|Maximum Duty Cycle|||50||%|
|tLEB|Leading Edge Blanking Time(3)|||350||ns|
|VRT|Voltage Reference of RT Pin|||1.5||V|
|**Soft-Start Section**|||||||
|tss|Soft-Start Time(3)|DC Mode|48|60|72|ms|
|||AC Mode||7||Periods|
|**Reference Section**|||||||
|VCS1|Internal Reference Voltage of CS Pin|DC Mode|0.354|0.365|0.376|V|
|VCS2||AC Mode(3)|0.485|0.500|0.515||
|**Protection Section**|||||||
|OVPVCC|Over-Voltage Protection on VCC Pin||17.7|18.7|19.7|V|
|VAOCP|Abnormal OCP Level at CS Pin(3)|||2.5||V|
|tAOCP|Abnormal Detection Time(3)|||70||ns|
|TTSDH|Thermal Shutdown Threshold(3)||140|150||°C|
|TTSDHY|Thermal Shutdown Threshold<br>Hysteresis(3)|||50||°C|
|**Dimming Section**|||||||
|VADIM(ST+)|Analog Dimming Positive Going<br>Threshold(3)||3.15|3.50|3.85|V|
|VADIM(ST-)|Analog Dimming Negative Going<br>Threshold(3)|||0.50|0.75|V|
|IAD|Internal Current Source for ADIM Pin||9|12|15|μA|



_Continued on the following page…_ 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Electrical Characteristics** (Continued) 

Typical values are at TA = +25°C. Specifications to -40°C ~ 125°C are guaranteed by design based on final characterization results. 

|**Symbol**|**Parameter**|**Condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|**MOSFET Section**|||||||
|BVDSS|Breakdown Voltage|VCC=0 V, ID=250 μA|550|||V|
|ILKMOS|Internal MOSFET Leakage Current V|e Current VDS=550 VDC, VGS=0 V|||250|μA|
|RON(ON)|Drain-Source On Resistance(3)|VGS=10 V, VDGS=0 V,<br>TC=25°C||7.3|10.0|Ω|
|CISS|Input Capacitance(3)|VGS=0 V,VDS=25 V, f=1 MHz|=25 V, f=1 MHz|135||pF|
|COSS|Output Capacitance(3)|VGS=0 V,VDS=25 V, f=1 MHz|=25 V, f=1 MHz|21||pF|
|CRSS|Reverse Transfer Capacitance(3)|VGS=0 V,VDS=25 V, f=1 MHz|=25 V, f=1 MHz|3.2||pF|
|td(ON)|Turn-On Delay(3)|VDD=350 V, ID=1 A||10||ns|
|tr|Rise Time(3)|VDD=350 V, ID=1 A||13.4||ns|
|td(OFF)|Turn-Off Delay(3)|VDD=350 V, ID=1 A||14.9||ns|
|tf|Fall Time(3)|VDD=350 V, ID=1 A||36.8||ns|



## **Note:** 

3. These parameters, although guaranteed, are not 100% tested in production. 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Functional Description** 

The FLS0116 is a basic PWM controller for buck converter topology in Continuous Conduction Mode (CCM) with an intelligent PFC function that uses a digital control algorithm. An internal self-biasing circuit uses the high-voltage switching device. The IC does not need an auxiliary powering path to the VCC pin typical in flyback control ICs or PSR product family. 

power for the IC, has voltage ripple as well as the rectification voltage after bridge, changing voltage level according to the VCC capacitor value. Using this kind of voltage fluctuation on the VCC pin, the IC can detect the time reference and create the internal ZCD signal. 

For precise and reliable internal reference for input voltage signal, the FLS0116 uses a digital technique (sigma/delta modulation) and creates a new internal signal (DAC_OUT) that has the same phase as the input voltage, as shown in Figure 5. This signal enters the final comparator and is compared with current information from the sensing resistor. 

When the input voltage applied to the HV pin is within operating range (25 V to 500 V), the FLS0116 maintains a 15.5 V DC voltage at the VCC pin for stable operation. The UVLO block functions such that when the VCC voltage rises higher than VCCST+, the internal UVLO block releases and starts operation. Otherwise, the VCC goes down to the VCCST- and IC operation stops. Normally, the hysteresis function provides stable operation even if the input voltage is operating under very noisy or unstable circumstances. 

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Vbridge Bridge Diode<br>Output Voltage<br>Input Voltage Peak JFET Output Voltage<br>t<br>VCC VDD Charging Voltage<br>JFET Output Voltage<br>——— t<br>ZCD<br>t<br>DAC_OUT<br>iaislat t<br>Figure 5. Internal PFC Function<br>**----- End of picture text -----**<br>


The FLS0116 has a “smart” internal digital block for determining input condition: AC or DC. When an AC source with 50 Hz or 60 Hz is applied to the IC, the IC automatically changes its internal reference signal, which is similar to input signal, for creating high power factor. When a DC source connects to the IC, the internal reference immediately changes to DC. 

## **Soft-Start Function** 

The FLS0116 has an internal soft-start function to reduce inrush current at startup. When the IC starts operation following an internal sequence, the internal reference slowly increases for a pre-determined fixed time. After this transient period, the internal reference goes to a steady-state level. In this time, the IC continually tries to find phase information from the VCC pin. If the IC succeeds in getting phase information, it automatically follows a similar shape reference made during the transient times, 7 periods. If not, the IC has a DC reference level. 

## **Self-Biasing Function** 

The self-biasing function, using an HV device, can supply enough operating current to the IC and guarantee similar startup time across the whole input voltage range (80 V~308 VAC). However, self-biasing has a weakness in high-voltage condition. Normally, the HV device acts as constant current source, so the internal HV device has power loss when high input voltage connects to the HV pin. This power loss is proportional to input voltage. To reduce this power loss, one of the possible solutions is an additional resistor between the input voltage source and the HV pin, as shown in Figure 6. 

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Vbridge loss, one of the possible solutions is an additional<br>resistor between the input voltage source and the HV<br>pin, as shown in Figure 6.<br>ILED<br>L1<br>LED<br>D1<br>T/2 = 1/(Input Frequency * 2) 7*(T/2) Normal Operation Fuse FLS0116 L3<br>VW CS DRAIN<br>BD<br>Figure 4. Soft-Start Function in AC Input Mode  C1 C2 VCCGND HV R3<br>RT ADIM<br>R1 C3<br>Internal PFC Function: How to Achieve  R2 C4<br>L2<br>**----- End of picture text -----**<br>


## **Internal PFC Function: How to Achieve High Power Factor** 

The FLS0116 has a simple, “smart”, internal PFC function that does not require additional pins for detecting input phase information or an electrolytic capacitor for supply voltage stabilization. For achieving high PF, the FLS0116 does not use the rectification capacitor after the bridge diode. This is important because the IC instead uses fluctuation in the signal on the VCC pin. Basically, the VCC pin, which is supplies 

**Figure 6. High-Voltage Application** 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Dimming Function** 

The FLS0116 uses the ADIM pin for analog or 0 V to 10 V dimming by using a resistive divider. The peak voltage of internal reference, which is DAC_OUT signal in Figure 5, is changed by the VADIM level, as shown in Figure 7, and has different peak level according to the operating mode. 

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VDAC _ OUT<br>0.5V AC Mode<br>DC Mode<br>0.365V<br>e 0.5V 3.5V VADIM<br>Figure 7. VADIM vs. VDAC_OUT(peak)<br>**----- End of picture text -----**<br>


In DCM Mode, inductance is: 

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If the peak current is fixed at 350 mApk, the formula for the peak current is: 

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In FL7701, the LED RMS current determines the inductance parameter. To drive for CCM Mode, define LED RMS current first, as: 

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I LED ( rms )  I LED ( ave 2. peak )  [A]  (4)<br>**----- End of picture text -----**<br>


Substituting Equation (2) for Equation (4), the inductance of inductor is obtained. 

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Inductor Design  The fixed internal duty ratio range is below 50%, or  VIN aan Π 2Π 3Π 4Π t<br>around 400 ns, from a timing point of view. The range is<br>dependent on the input voltage and number of LEDs in  Vbridge Output VoltageBridge Diode<br>its string.   Input Voltage Peak VDDVoltage Charging<br>aK<br>Minimum duty is calculated as:  ZCD i ee| tt<br>D min  —  nV  inV (max) f (1)  DAC NN t<br>where:  VLED<br>et tt<br>η = efficiency of system;  t<br>VIN(max) = maximum input voltage;    Vdrain Input Voltage Peak<br>Vf  [= forward drop voltage of LED; and  ] wlll, al li, ail i, ii,<br>n   = LED number in series connection.<br>t<br>ILED Input Voltage Peak<br>Current Limit<br>Average t<br>LED Current IFRD<br>A inn itl, lth,lt, t<br>IMOSFET<br>ton toff A A A All<br>Dmin 1-Dmin t<br>(a) DCM Mode<br>Iinput<br>Current peak at LED current<br>maximum point (ILED(peak))<br>Current peak at LED average  Average t<br>current maximum point  LED Current (ILED(ave))<br>(ILED(ave.peak))<br>DCM ∆ i 0.5 ∆ i DCM T/2 = 1/(Input Frequency * 2)<br>T = 1/Input Ferquency<br>0.5 ∆ i<br>Figure 9. Typical Performance Characteristics<br>CCM<br>Current min at LED current<br>maximum point (ILED(min))<br>Dmin ton toff 1-Dmin<br>(b) CCM Mode<br>i∆rip<br>**----- End of picture text -----**<br>


**Figure 8. DCM and CCM Operation** 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Example Application Circuits** 

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L1<br>LED<br>D1<br>Fuse FLS0116 L3<br>CS DRAIN<br>[TH | HG |<br>BD<br>C1 C2 VCC HV<br>GND<br>RT ADIM<br>R1 C3<br>R2 C4<br>L2<br>Figure 10. Application Circuit without Electrolytic Capacitor<br>L1<br>LED<br>ZD C5<br>D1<br>Fuse FLS0116 L3<br>CS DRAIN<br>[TH | po YG |<br>BD<br>C1 C2 VCC HV<br>GND<br>RT ADIM<br>R1 C3<br>R2 C4<br>L2<br>**----- End of picture text -----**<br>


**Figure 11. Application Circuit with Electrolytic Capacitor** 

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L1<br>FLS0116<br>CS DRAIN<br>Fuse<br>C 1 VCC HV 7 R1<br>BD GND<br>C1 C2 RT ADIM L3<br>C4<br>R2 LED C5<br>C3  D1  ZD<br>— YOOU L2<br>**----- End of picture text -----**<br>


**Figure 12. Application Circuit of High-Side Operation with Electrolytic Capacitor** 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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Typical Characteristics<br>17.0 6.0<br>16.5<br>5.5<br>16.0<br>15.5 5.0<br>15.0<br>4.5<br>14.5<br>14.0 4.0<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br>oa aa<br>Figure 13.  VCC vs. Temperature Figure 14.  VCCHYS vs. Temperature<br>14.0 150<br>140<br>13.5<br>130<br>13.0 120<br>110<br>12.5<br>100<br>12.0 =. 90<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br>Figure 15.  VCCST+ vs. Temperature Figure 16.  IST vs. Temperature<br>9.0 48<br>47<br>8.5<br>46<br>8.0<br>45<br>7.5<br>44<br>7.0 a 43<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br><<br>Figure 17.  VCCST- vs. Temperature Figure 18.  fOSC vs. Temperature (RT=Open)<br>FLS0116 — MOSFET Integrated Smart LED Lamp Driver IC with PFC Function<br>[V]<br>ST+<br>VCC<br> [V]<br>HV<br>VCC<br>A]<br>[I  ST<br>[V]<br>ST-  [kHz]<br>VCC fOSC<br>VCC[V]<br>**----- End of picture text -----**<br>


© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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Typical Characteristics<br>24 1.7<br>22 1.6<br>20 1.5<br>18 1.4<br>16  _ 1.3<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br>Figure 19.  fOSC vs. Temperature (RT=87kΩ) Figure 20.  VRT vs. Temperature<br>300<br>0.375<br>280<br>0.370<br>260 0.365<br>240 0.360<br>220 0.355<br>200 oe 0.350<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br>Figure 21.  fOSC vs. Temperature (RT=5.95kΩ) Figure 22.  VCS vs. Temperature<br>52 19.5<br>51 19.0<br>50 18.5<br>49 18.0<br>48 a 17.5<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br>«<br>Figure 23.  DMAX vs. Temperature Figure 24.  OVPVCC vs. Temperature<br>[V]<br>CS1<br>V<br> [kHz]<br>fOSC<br> [kHz] [V] RT<br>fOSC V<br> [%]  [V]<br>MAX VCC<br>D OVP<br>**----- End of picture text -----**<br>


© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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## **Typical Characteristics** 

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15<br>640<br>14<br>620<br>13<br>12 600<br>11<br>580<br>10<br>560<br>9<br>-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120<br>Temperature [°C] Temperature [°C]<br>Figure 25.  IAD vs. Temperature Figure 26.  BVDSS vs. Temperature<br>0.5<br>0.4<br>0.3<br>0.2<br>0.1<br>0.0<br>-40 -20 0 20 40 60 80 100 120<br>Temperature [°C]<br>Figure 27.  IDSS vs. Temperature<br>A]<br>[I  AD<br>A]<br><br> [<br>IDSS<br> [V]<br>DSS<br>BV<br>**----- End of picture text -----**<br>


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FLS0116 — MOSFET Integrated Smart LED Lamp Driver IC with PFC Function<br>**----- End of picture text -----**<br>


© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

www.fairchildsemi.com 

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Physical Dimensions<br>5.00<br>= 4.80 a t  a A a 3.81 — _<br>0.65TYP<br>3.81<br>7 6 5 i i<br>A B<br>A !<br>i 1.75TYP i<br>6.20<br>5.80 4.00 3.85 7.35<br>3.80<br>i ‘ i] !<br>!<br>1 2 3 4 i]<br>PIN #1<br>1 .27 0.25 C B A<br>1 .27<br>(0.33)<br>TOP VIEW<br>LAND PATTERN RECOMMENDATION<br>SEE DETAIL A<br>,<br>0.25 0.25<br>0.10 | c y 0.19<br>ya - i<br>1.75 MAX C<br>! A OPTION A - BEVEL EDGE<br>i T 0.51 0.10 C<br>0.33<br>FRONT VIEW t ia t<br>OPTION B - NO BEVEL EDGE<br>0.50<br> x 45°<br>0.25 NOTES:<br>R0.10 GAGE PLANE<br>   A)  THIS PACKAGE DOES NOT FULLY CONFORMS<br>R0.10 > \ ry 0.36          TO JEDEC MS-012 VARIATION AA.<br>8°0° ! [ _    B)  ALL DIMENSIONS ARE IN MILLIMETERS.   C)  DIMENSIONS DO NOT INCLUDE MOLD<br>0.90 SEATING PLANE        FLASH OR BURRS.<br>\ L \ |<br>0.406 (1.04)    D)  DRAWING FILENAME : M07Brev3<br>DETAIL A<br>SCALE: 2:1<br>**----- End of picture text -----**<br>


## **Figure 28. 7-Lead, Small-Outline Integrated Circuit (SOIC), JEDEC MS-012, .150-Inch Narrow Body** 

_Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products._ 

_Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/._ 

© 2012 Fairchild Semiconductor Corporation FLS0116  •  Rev. 1.0.2 

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