FDMB3900AN

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## **FDMB3900AN** 

## **Dual N-Channel PowerTrench[®] MOSFET 25 V, 7.0 A, 23 m** Ω 

## **Features** 

Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 7.0 A 

Max rDS(on) = 33 mΩ at VGS = 4.5 V, ID = 5.5 A Fast switching speed 

Low gate charge 

High performance trench technology for extremely low rDS(on) 

## **General Description** 

These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench **[®]** process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. 

These devices are well suited for low voltage and battery powered applications where the low in-line power loss and fast switching are required. 

High power and current handling capability 

RoHS Compliant 

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Pin 1<br>Q2<br>D2 5 4 G2<br>$1 G1 $2 G2 D2  @. 6 -E 3 S2<br>Q1<br>D1 7 2 G1<br>1 @r<br>D1 8 1 S1<br>MicroFET 3X1.9 ) Ee<br>Gop<br>MOSFET Maximum Ratings TA = 25 °C unless otherwise noted<br>Symbol Parameter Ratings Units<br>VDS Drain to Source Voltage 25 V<br>VGS Gate to Source Voltage                                                                                  ±20 V<br>ID                           -PulsedDrain Current     -Continuous                                      TA = 25 °C              (Note 1a) 7.028 A<br>PD Power DissiPower Dissippation                                                        Tation                                                      TAA = 25 °C               = 25 °C              ((Note 1aNote 1b)) 1.60.8 W<br>TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C<br>Thermal Characteristics<br>RθJA Thermal Resistance, Junction to Ambient                                                 (Note 1a) 80<br>°C/W<br>es RθJA Thermal Resistance, Junction to Ambient                                                 (Note 1b) 165<br>Package Marking and Ordering Information<br>Device Marking Device Package Reel Size Tape Width Quantity<br>3900 FDMB3900AN MicroFET 3X1.9 7 ’’ 8 mm 3000 units<br>—— a<br>**----- End of picture text -----**<br>


©2011 Fairchild Semiconductor Corporation **1** FDMB3900AN Rev.C3 

www.fairchildsemi.com 

## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Electrical Characteristics**TJ = 25 °C unless otherwise notedJ = 25 °C unless otherwise noted= 25 °C unless otherwise noted|**Electrical Characteristics**TJ = 25 °C unless otherwise notedJ = 25 °C unless otherwise noted= 25 °C unless otherwise noted|
|---|---|
|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>25<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>17<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 20 V, VGS = 0 V<br>1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±100<br>nA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250μA<br>1.0<br>2.0<br>3.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-6<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 7.0 A<br>19<br>23<br>mΩ<br>VGS= 4.5 V,  ID= 5.5 A<br>26<br>33<br>VGS= 10 V,  ID= 7.0 A<br>TJ= 125 °C<br>26<br>32<br>gFS<br>Forward Transconductance<br>VDS= 5 V,  ID= 7.0 A<br>27<br>S<br>Ciss<br>Input Capacitance<br>VDS= 13 V, VGS= 0 V<br>f = 1MHz<br>650<br>890<br>pF<br>Coss<br>Output Capacitance<br>151<br>200<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>141<br>215<br>pF<br>Rg<br>Gate Resistance<br>0.8<br>Ω<br>~~Po~~<br>~~—f~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~Ge~~||
|td(on)<br>Turn-On DelayTime<br>VDD= 13 V, ID= 7.0 A<br>VGS= 10 V, RGEN= 6Ω<br>6<br>12<br>ns<br>tr<br>Rise Time<br>3<br>10<br>ns<br>td(off)<br>Turn-Off DelayTime<br>15<br>26<br>ns<br>tf<br>Fall Time<br>3<br>10<br>ns<br>Qg(TOT)<br>Total Gate Charge<br>VGS= 0 V to 10 V<br>VDD= 13 V<br>ID= 7.0 A<br>11<br>17<br>nC<br>Total Gate Charge<br>VGS= 0 V to 5 V<br>7<br>10<br>nC<br>Qgs<br>Gate to Source Charge<br>2.0<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>3.0<br>nC<br>~~ee~~<br>~~ee~~<br>~~ee ee ee ee~~<br>~~ee~~<br>~~ee~~<br>~~ee ee ee eee~~<br>~~ee~~<br>~~ee~~<br>~~ee ee ee eee~~<br>~~ee~~<br>~~ee~~<br>~~ee ee eee eee~~<br>~~ee~~<br>~~eee~~<br>~~ee~~<br>~~ee ee ee eee~~<br>~~ee~~<br>~~**ee**~~<br>~~**ee** ~~~~**ee** ee ee~~~~**e**~~<br>~~ee~~<br>~~ee e~~||
|**Drain-Source Diode Characteristics**||
|VSD<br>Source to Drain Diode Forward Voltage<br>VGS = 0 V, IS = 1.25 A(Note 2)<br>0.8<br>1.2<br>V<br>VGS = 0 V, IS = 7.0 A(Note 2)<br>0.9<br>1.2||
|trr<br>Reverse RecoveryTime<br>IF= 7.0 A, di/dt = 100 A/μs<br>14<br>24<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>3<br>10<br>nC||



NOTES: 

1. RθJA is determined with the device mounted on a 1 in[2] pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. 

a. 80 °C/W when mounted on a 1 in[2 ] pad of  2 oz  copper 

b.165 °C/W when mounted on a minimum pad of  2 oz  copper 

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 

www.fairchildsemi.com 

**2** 

©2011 Fairchild Semiconductor Corporation FDMB3900AN Rev.C3 

## **Typical Characteristics** TJ = 25°C unless otherwise noted 

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28 VGS = 10 V 4<br>VGS = 3.5 V<br>VGS = 6 V VGS = 4 V VGS = 4 V<br>21 3<br>VGS = 4.5 V<br>14 2 V GS  = 4.5 V<br>VGS = 3.5 V<br>7 1<br>PULSE DURATION = 80DUTY CYCLE = 0.5%MAX μ s PULSE DURATION = 80 μ s VGS = 6 V VGS =  10 V<br>DUTY CYCLE = 0.5%MAX<br>0 0<br>0 1 2 3 4 0 7 14 21 28<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT(A)<br>Figure 1.  On-Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>1.6 80<br> IVDGS = 7 A = 10 V PULSE DURATION = 80DUTY CYCLE = 0.5%MAX μ s<br>1.4<br>60<br>ID = 7 A<br>1.2<br>40<br>1.0 TJ = 125 [ o] C<br>20<br>0.8 TJ = 25  [o] C<br>0.6 0<br>-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On- Resistance                                         Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>28 30<br>PULSE DURATION = 80 μ s V GS  = 0 V<br>DUTY CYCLE = 0.5%MAX 10<br>21<br>VDS = 5 V<br>T J  = 150  [o] C<br>14 TJ = 25 [ o] C<br>1<br>TJ = 150  [o] C TJ = 25  [o] C<br>7 TJ = -55 [ o] C<br>TJ = -55 [ o] C<br>0 0.1<br>1 2 3 4 5 0.2 0.4 0.6 0.8 1.0 1.2 1.4<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5.  Transfer Characteristics Figure 6.    Source to Drain  Diode<br>Forward Voltage vs Source Current<br>NORMALIZED<br>DRAIN CURRENT (A)<br>,<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID , REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


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©2011 Fairchild Semiconductor Corporation FDMB3900AN Rev.C3 

**Typical Characteristics** TJ = 25°C unless otherwise noted 

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900<br>10 f = 1 MHz<br>ID = 7 A 800 C iss VGS = 0 V<br>8 700<br>VDS = 10 V VDS = 13 V 600<br>6<br>500<br>VDS = 15 V<br>4 400<br>300 C oss<br>2<br>200<br>Crss<br>100<br>0 0.1 1 10 25<br>0 3 6 9 12<br>VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Qg, GATE CHARGE(nC)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance   vs  Drain<br>to Source Voltage<br>8 40<br>10<br>6 100 μ s<br>VGS = 10 V<br>1 ms<br>1<br>4 THIS AREA IS  10 ms<br>VGS = 4.5 V LIMITED BY r DS(on)<br>100 ms<br>SINGLE PULSE<br>2 0.1 TJ = MAX RATED 1 s<br>10 s<br>R θ JA = 80 oC/W R θ JA = 165 [ o] C/W DC<br>T A = 25  [o] C<br>0 0.01<br>25 50 75 100 125 150 0.01 0.1 1 10 100<br>TA, AMBIENT TEMPERATURE (oC) VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 9.  Maximum Continuous Drain                              Figure 10.  Forward Bias Safe<br>Current  vs Ambient Temperature Operating Area<br>300<br>SINGLE PULSE<br>100 R θ JA  = 165  [o] C/W<br>TA = 25  [o] C<br>10<br>1<br>0.510-4 10-3 10-2 10-1 1 10 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 11.  Single  Pulse Maximum Power  Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE(V)<br>GS<br>V<br>DRAIN CURRENT (A)<br>I, D , DRAIN CURRENT (A)ID<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>**----- End of picture text -----**<br>


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©2011 Fairchild Semiconductor Corporation FDMB3900AN Rev.C3 

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Typical Characteristics  TJ = 25°C unless otherwise noted<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>      0.1<br>      0.05<br>0.1       0.02 PDM<br>      0.01<br>t1<br>0.01 t 2<br>SINGLE PULSE NOTES:<br>DUTY FACTOR: D = t1/t2<br>R θ JA = 165  [o] C/W PEAK TJ = PDM x Z θJA  x R θJA  + TA<br>0.00110-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 12.  Junction-to-Ambient Transient Thermal Response Curve<br>ZJA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


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**5** 

©2011 Fairchild Semiconductor Corporation FDMB3900AN Rev.C3 

## **Dimensional Outline and Pad Layout** 

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**6** 

©2011 Fairchild Semiconductor Corporation FDMB3900AN Rev.C3 

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|2Cool™<br>AccuPower™<br>AX-CAP®*<br>BitSiC™<br>Build it Now™<br>CorePLUS™<br>CorePOWER™<br>_CROSSVOLT_™<br>CTL™<br>Current Transfer Logic™<br>DEUXPEED®<br>Dual Cool™<br>EcoSPARK®<br>EfficentMax™<br>ESBC™<br>Fairchild®<br>Fairchild Semiconductor®<br>FACT Quiet Series™<br>FACT®<br>FAST®<br>FastvCore™<br>FETBench™<br>®<br>~~F~~|FPS™<br>F-PFS™<br>FRFET®<br>Global Power ResourceSM<br>Green Bridge™<br>Green FPS™<br>Green FPS™ e-Series™<br>G_max_™<br>GTO™<br>IntelliMAX™<br>ISOPLANAR™<br>Marking Small Speakers Sound Louder<br>and Better™<br>MegaBuck™<br>MICROCOUPLER™<br>MicroFET™<br>MicroPak™<br>MicroPak2™<br>MillerDrive™<br>MotionMax™<br>mWSaver™<br>OptoHiT™<br>OPTOLOGIC®<br>OPTOPLANAR®|PowerTrench®<br>PowerXS™<br>Programmable Active Droop™<br>QFET®<br>QS™<br>Quiet Series™<br>RapidConfi~~gure™~~<br>Saving our world, 1mW/W/kW at a time™<br>SignalWise™<br>SmartMax™<br>SMART START™<br>Solutions for Your Success™<br>SPM®<br>STEALTH™<br>SuperFET®<br>SuperSOT™-3<br>SuperSOT™-6<br>SuperSOT™-8<br>SupreMOS®<br>SyncFET™<br>™<br>tm®|Sync-Lock™<br>®*<br>TinyBoost™<br>TinyBuck™<br>TinyCalc™<br>TinyLogic®<br>TINYOPTO™<br>TinyPower™<br>TinyPWM™<br>TinyWire™<br>TranSiC®<br>TriFault Detect™<br>TRUECURRENT®*<br>μSerDes™<br>UHC®<br>Ultra FRFET™<br>UniFET™<br>VCX™<br>VisualMax™<br>VoltagePlus™<br>XS™<br>E SYSTEM<br>GENERAL<br>174...|
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## **PRODUCT STATUS DEFINITIONS Definition of Terms** 

|**Datasheet Identification**|**Product Status**|**Definition**|
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