FDMB2308PZ

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## **FDMB2308PZ** 

**Dual Common Drain P-Channel PowerTrench[®] MOSFET -20 V, -7 A, 36 m** Ω 

## **Features** 

Max rS1S2(on) = 36 mΩ at VGS = -4.5 V, ID = -5.7 A 

Max rS1S2(on) = 50 mΩ at VGS = -2.5 V, ID = -4.6 A 

Low Profile - 0.8 mm maximum - in the new package MicroFET 2x3 mm 

HBM ESD protection level 2.8 kV (Note 3) 

RoHS Compliant 

## **General Description** 

This device is designed specifically as a single package solution for Li-Ion battery pack protection circuit and other ultra-portable applications. It features two common drain P-channel MOSFETs, which enables bidirectional current flow, on Fairchild’s advanced PowerTrench[®] process with state of the art MircoFET Leadframe, the FDMB2308PZ minimizes both PCB space and rS1S2(on). 

## **Application** 

Li-Ion Battery Pack 

**==> picture [465 x 377] intentionally omitted <==**

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|||||||
|---|---|---|---|---|---|
|Pin 1|
|Pin 1|S1|S1|G1|
|G2|4|3|G1|
|D1/D2|
|||oo|||
|S2|5|2|S1|
|S2|6|1|S1|
|Gg.|
|S2|S2|G2|
|MLP 2x3|
|MOSFET Maximum Ratings|TA = 25 °C unless otherwise noted|
|Symbol|Parameter|Ratings|Units|
|VS1S2|Source1 to Source2 Voltage|-20|V|
|VGS|Gate to Source Voltage|±12|V|
|IS1S2|-Pulsed     Source1 to Source2 Current    -Continuous            TA = 25 °C               (Note 1a)|-30-7|A|
|PD|Power DissiPower Dissippation                                                        Tation                                                        TAA = 25 °C               = 25 °C              ((Note 1aNote 1b))|2.20.8|W|
|TJ, TSTG|Operating and Storage Junction Temperature Range|-55 to +150|°C|
|Thermal Characteristics|
|RθJA|Thermal Resistance, Junction to Ambient                                                 (Note 1a)|57|
|°C/W|
|RθJA|Thermal Resistance, Junction to Ambient                                                 (Note 1b)|161|
|[[_|3}|
|Package Marking and Ordering Information|
|Device Marking|Device|Package|Reel Size|Tape Width|Quantity|
|308|FDMB2308PZ|MLP 2x3|7’’|8 mm|3000 units|
|_|i|i|

**----- End of picture text -----**<br>


©2013 Fairchild Semiconductor Corporation **1** FDMB2308PZ Rev.C3 

www.fairchildsemi.com 

## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Electrical Characteristics**TJ = 25 °C unless otherwise notedJ = 25 °C unless otherwise noted= 25 °C unless otherwise noted|**Electrical Characteristics**TJ = 25 °C unless otherwise notedJ = 25 °C unless otherwise noted= 25 °C unless otherwise noted|
|---|---|
|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Source1- Source2 Diode Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>IS1S2<br>Zero Gate Voltage Source1 to Source2<br>Current<br>VS1S2= -16 V,  VGS= 0 V<br>-1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±12 V, VS1S2= 0 V<br>±10<br>μA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VS1S2,  IS1S2= -250μA<br>-0.6<br>-0.9<br>-1.5<br>V<br>rS1S2(on)<br>Static Source1 to Source2 On Resistance<br>VGS= -4.5 V,  IS1S2= -5.7 A<br>27<br>36<br>mΩ<br>VGS= -2.5 V,  IS1S2= -4.6 A<br>36<br>50<br>VGS= -4.5 V,  IS1S2= -5.7 A ,<br>TJ = 125 °C<br>35<br>49<br>gFS<br>Forward Transconductance<br>VS1S2= -5 V,  IS1S2= -5.7 A<br>29<br>S<br>Ciss<br>Input Capacitance<br>VS1S2= -10 V, VGS= 0 V,<br>f = 1 MHz<br>2280<br>3030<br>pF<br>Coss<br>Output Capacitance<br>361<br>540<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>339<br>510<br>pF<br>td(on)<br>Turn-On DelayTime<br>VS1S2= -10 V, IS1S2= -5.7 A<br>VGS= -4.5 V, RGEN= 6Ω<br>14<br>25<br>ns<br>tr<br>Rise Time<br>33<br>52<br>ns<br>td(off)<br>Turn-Off DelayTime<br>74<br>118<br>ns<br>tf<br>Fall Time<br>58<br>93<br>ns<br>Qg<br>Total Gate Charge<br>VS1S2= -10 V, IS1S2= -5.7 A,<br>VG1S1= -4.5 V, VG2S2= 0 V<br>22<br>30<br>nC<br>Qgs<br>Gate1 to Source1 Charge<br>3.6<br>nC<br>Qgd<br>Gate1 to Source2 “Miller” Charge<br>7.7<br>nC<br>Ifss<br>Maximum Continuous Source1-Source2 Diode Forward Current<br>-5.7<br>A<br>Vfss<br>Source1 to Source2 Diode Forward Voltage VG1S 1= 0 V, VG2S2= -4.5 V,<br>Ifss= -5.7 A(Note 2)<br>-1<br>-1.6<br>V<br>~~ee~~<br>~~[rr~~<br>~~——————~~<br>~~a~~||
|NOTES:||
|1. RθJAis determined with the device mounted on a 1 in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJCis guaranteed by design while RθCAis determined by||
|the user's board design.||



   - a. 57 °C/W when mounted on b. 161 °C/W when mounted on a  1  in[2  ] pad of  2 oz  copper a  minimum pad of 2 oz copper 

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 

3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 

www.fairchildsemi.com 

**2** 

©2013 Fairchild Semiconductor Corporation FDMB2308PZ Rev.C3 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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30 30<br>VG1S1 = -4.5 V VGS =  -4.5 V<br>VG1S1 =  -3 V VGS = -3 V<br>VG1S1 =  -2.5 V<br>20 20<br>VGS = -2.5 V<br>VG1S1 = -2 V<br>VGS = -2 V<br>10 10<br>PULSE DURATION = 80  μ s VGS = -1.8 V<br>DUTY CYCLE = 0.5% MAX<br>VG1S1 = -1.8 V VG2S2 = -4.5 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX μ s<br>0 0<br>0 0.5 1.0 1.5 2.0 0 0.5 1.0 1.5 2.0<br>-VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V) -VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)<br>Figure 1.  On-Region Characteristics Figure 2.  On-Region Characteristics<br>3 4<br>VG1S1 =  -1.8 V<br>VG1S1 = -2 V 3 VGS = -1.8 V<br>2<br>VGS =  -2 V<br>VGS =  -2.5 V<br>VG1S1 =  -2.5 V VG1S1 = -3 V 2<br>VGS = -3 V<br>1<br>PULSE DURATION = 80  μ s VG1S1 = -4.5 V 1<br>DUTY CYCLE = 0.5% MAXVG2S2 = -4.5 V PULSE DURATION = 80DUTY CYCLE = 0.5% MAX  μ s VGS = -4.5 V<br>0 0<br>0 10 20 30 0 10 20 30<br>-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A) -IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)<br>Figure 3.  Normalized On-Resistance vs Source1          Figure 4.   Normalized On-Resistance vs Source1<br>to Source2 Current and Gate Voltage  to Source2 Current and Gate Voltage<br>1.6 150<br>IS1S2 = -5.7 A PULSE DURATION = 80  μ s<br>VGS= -4.5 V DUTY CYCLE = 0.5% MAX<br>1.4 IS1S2 = -5.7 A<br>100<br>1.2<br>TJ = 125  [o] C<br>1.0<br>50<br>0.8<br>TJ = 25  [o] C<br>0.6 0<br>-50 -25 0 25 50 75 100 125 150 1.5 2.0 2.5 3.0 3.5 4.0 4.5<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 5.  Normalized  On  Resistance                                 Figure 6.    On  Resistance  vs Gate  to<br>vs Junction Temperature Source Voltage<br>SOURCE1 TO SOURCE2 CURRENT (A) SOURCE1 TO SOURCE2 CURRENT (A)<br>,  ,<br>IS1S2- -IS1S2<br> ON-RESISTANCE  ON-RESISTANCE<br>NORMALIZED NORMALIZED<br>SOURCE1 TO SOURCE2 SOURCE1 TO SOURCE2<br>)<br>Ω<br>m<br>SOURCE1 TO  (<br>NORMALIZED )(on,<br>rS1S2<br>SOURCE2 ON-RESISTANCE<br> SOURCE1 TO SOURCE2 ON-RESISTANCE<br>**----- End of picture text -----**<br>


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©2013 Fairchild Semiconductor Corporation FDMB2308PZ Rev.C3 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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30 100<br>PULSE DURATION = 80  μ s VG1S1 = 0 V, VG2S2 = -4.5 V<br>DUTY CYCLE = 0.5% MAX<br>10<br>VS1S2 = -5 V<br>20 TJ = 150  [o] C<br>1<br>TJ = 150  [o] C<br>0.1 TJ = 25 [ o] C<br>10<br>TJ = 25  [o] C 0.01 T J  = -55  [o] C<br>TJ = -55  [o] C<br>0 0.001<br>0 0.6 1.2 1.8<br>0 1.0 1.5 2.0 2.5<br>-VGS, GATE TO SOURCE VOLTAGE (V) -Vfss, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 7.  Transfer Characteristics Figure 8.  Source1  to  Source2  Diode<br>Forward Voltage vs Source Current<br>4.5 5000<br>VG2S2 = 0 V, IS1S2 = -5.7 A<br>C iss<br>VS1S2 = -8 V<br>3.0<br>VS1S2 = -10 V 1000<br>VS1S2 = -12 V Coss<br>1.5<br>f = 1 MHz Crss<br>VGS = 0 V<br>0 100<br>0 5 10 15 20 25 0.1 1 10 20<br>Qg, GATE CHARGE (nC) -VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)<br>Figure 10. Capacitance vs Source1<br>Figure 9.  Gate Charge Characteristics to Source2 Voltage<br>10-3 50<br>VS1S2 = 0 V<br>10-4<br>10 1 ms<br>10-5 TJ = 125  [o] C 10 ms<br>10-6 1<br>100 ms<br>THIS AREA IS<br>10-7 LIMITED BY r 1 s<br>0.1 DS(on)<br>10 s<br>10-8 SINGLE PULSETJ = MAX RATED DC<br>10-9 TJ = 25 [ o] C 0.01 R θ JA = 161 [ o] C/W<br>TA = 25  [o] C<br>10-100 5 10 15 20 0.001<br>0.1 1 10 100<br>-VGS, GATE TO SOURCE VOLTAGE (V)<br>-VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)<br>Figure 11. Gate  Leakage Current  vs  Gate  to                                Figure 12.  Forward Bias Safe<br>Source Voltage Operating Area<br> CURRENT (A)<br>SOURCE1 TO SOURCE2<br>,<br>fss FORWARD CURRENT (A)<br>-I<br>SOURCE1 TO SOURCE2<br>,<br>S1S2<br>-I<br>CAPACITANCE (pF)<br>, GATE1 TO SOURCE1 VOLTAGE (V)<br>G1S1<br>-V<br> CURRENT (A)<br>, GATE LEAKAGE CURRENT (A)<br>g<br>-I SOURCE1 TO SOURCE2<br>,<br>S1S2<br>-I<br>**----- End of picture text -----**<br>


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©2013 Fairchild Semiconductor Corporation FDMB2308PZ Rev.C3 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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1000<br>SINGLE PULSE<br>R θ JA  = 161  [o] C/W<br>100<br>TA = 25  [o] C<br>10<br>1<br>0.1<br>10-3 10-2 10-1 1 10 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 13.  Single Pulse Maximum Power Dissipation<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>      0.1<br>0.1       0.05      0.02 PDM<br>      0.01<br>t 1<br>0.01 t2<br>NOTES:<br>SINGLE PULSE DUTY FACTOR: D = t1/t2<br>R θ JA = 161  [o] C/W PEAK T J  = P DM  x Z θJA  x R θJA  + T A<br>0.00110-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 14.  Junction-to-Ambient Transient Thermal Response Curve<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>ZJA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


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©2013 Fairchild Semiconductor Corporation FDMB2308PZ Rev.C3 

## **Dimensional Outline and Pad Layout** 

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©2013 Fairchild Semiconductor Corporation FDMB2308PZ Rev.C3 

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Rev. I68 

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