B72714A8140S160

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## **CTVS** � 

## **Ceramic transient voltage suppressors** 

SMD multilayer transient voltage suppressors, high-speed series 

**Series/Type:** 

Date: February 2016 

© EPCOS AG 2016. Reproduction, publication and dissemination of this publication, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited. 

EPCOS AG is a TDK Group Company. 

**Multilayer varistors (MLVs) High-speed series** 

## **EPCOS type designation system for high-speed series, single chips** 

|CT||0402||V150||HS||G|
|---|---|---|---|---|---|---|---|---|
||||||||||
|**Construction:**<br>CT�Single chip with nickel<br>barrier termination (AgNiSn)|||||||||
||||||||||
|**Case sizes:**<br>0402<br>0603|||||||||
||||||||||
|**Maximum RMS operating voltage (VRMS):**<br>S5�4 V<br>S14�14 V<br>L25�25 V<br>**Or:**<br>**Indication of the varistor voltage:**<br>V150�150 V<br>V275�275 V|||||||||
||||||||||
|**Internal coding**|||||||||
||||||||||
|**Taping mode:**<br>G�180-mm reel, 7''<br>G2�330-mm reel, 13''|||||||||



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 2 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **EPCOS type designation system for high-speed series, array** 

**==> picture [347 x 284] intentionally omitted <==**

**----- Start of picture text -----**<br>
CA 05 M2 S10 T 100H G<br>Construction:<br>CA � Chip array<br>with nickel barrier<br>termination<br>(AgNiSn)<br>Case sizes:<br>05 � 0508 array<br>06 � 0612 array<br>Number of elements per component:<br>M2 � Array with two elements<br>P4 � Array with four elements<br>Maximum RMS operating voltage (VRMS):<br>S10 � 10 V<br>S14 � 14 V<br>Typical varistor voltage (Vv):<br>V150 � 150 V<br>Internal coding<br>High-speed series<br>100H � Matched capacitance varistor (MCV array with Ctyp = 10 � 10 [0] = 10 pF)<br>HS � 4-fold array<br>Taping mode:<br>G � 180-mm reel, 7''<br>**----- End of picture text -----**<br>


Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 3 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Description** 

The high-speed series comprises a range of multilayer ceramic varistors for protection against ESD on data lines. 

## **Features** 

- ESD protection level acc. to ISO 10605, IEC 61000-4-2 level 4 

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- Capacitance ratings down to 0.6 pF 

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- Low insertion loss 

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- Low leakage current 

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- No signal distortion 

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- Long-term ESD stability 

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- Bidirectional protection RoHS-compatible 

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- Suitable for lead-free soldering PSpice simulation models available 

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## **Applications** 

- ESD protection for high-speed data lines such as USB 2.0, firewire, IEEE 1394 interfaces, RF antennas, RF modules 

**==> picture [5 x 5] intentionally omitted <==**

- Selected types for ESD protection for high-speed automotive data lines (e.g. CAN bus, FlexRay) ESD protection for I/O ports of video and audio lines Integrated solutions for connectors in mobile communication and handheld devices 

**==> picture [5 x 5] intentionally omitted <==**

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## **Design** 

## Multilayer technology 

**==> picture [5 x 5] intentionally omitted <==**

- Flammability rating better than UL 94 V-0 

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- Termination (see “Soldering directions”): 

**==> picture [5 x 5] intentionally omitted <==**

- CT and CA types with nickel barrier terminations (AgNiSn), recommended for lead-free soldering, and compatible with tin/lead solder. 

## **Single chip** 

Internal circuit 

Available case sizes: 

|A|Metric|
|---|---|
|02|1005|
|03|1608|



## **Matched capacitance varistor array (MCV array)** 

Internal circuit 

**==> picture [82 x 90] intentionally omitted <==**

Available case sizes: 

|A<br>Me|tric<br>Version|
|---|---|
|08<br>12|20<br>2-fold array|



## **4-fold array** 

Internal circuit 

Available case sizes: 

|A<br>Me|tric<br>Version|
|---|---|
|08<br>12|20<br>4-fold array|
|12<br>16|32<br>4-fold array|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 4 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **General technical data for single chips** 

|Maximum RMS operating voltage<br>Maximum DC operating voltage<br>Contact discharge ESD capability<br>to IEC 61000-4-2<br>Air discharge ESD capability<br>to IEC 61000-4-2<br>Maximum surge current<br>(8/20 µs)<br>Typical capacitance<br>(1 MHz, 1 V)<br>Maximum clamping voltage<br>Operating temperature<br>for 0402<br>Operating temperature<br>for 0603<br>Operating temperature<br>for 0603, automotive types<br>Storage temperature<br>for 0402<br>Storage temperature<br>for 0603<br>Response time|Maximum RMS operating voltage<br>Maximum DC operating voltage<br>Contact discharge ESD capability<br>to IEC 61000-4-2<br>Air discharge ESD capability<br>to IEC 61000-4-2<br>Maximum surge current<br>(8/20 µs)<br>Typical capacitance<br>(1 MHz, 1 V)<br>Maximum clamping voltage<br>Operating temperature<br>for 0402<br>Operating temperature<br>for 0603<br>Operating temperature<br>for 0603, automotive types<br>Storage temperature<br>for 0402<br>Storage temperature<br>for 0603<br>Response time|VRMS,max<br>VDC,max<br>VESD,contact<br>VESD,air<br>Isurge,max<br>Ctyp<br>Vclamp,max<br>Top<br>Top<br>Top<br>LCT/UCT<br>LCT/UCT<br>tresp|VRMS,max<br>VDC,max<br>VESD,contact<br>VESD,air<br>Isurge,max<br>Ctyp<br>Vclamp,max<br>Top<br>Top<br>Top<br>LCT/UCT<br>LCT/UCT<br>tresp|4 ... 25<br>5.5 ... 32<br>8<br>15<br>1 ... 5<br>0.6 ... 15<br>66 ... 290<br>�40/+85<br>�55/+125<br>�55/+150<br>�40/+125<br>�55/+150<br>< 0.5|V<br>V<br>kV<br>kV<br>A<br>pF<br>V<br>°C<br>°C<br>°C<br>°C<br>°C<br>ns|
|---|---|---|---|---|---|
|**General technical data for arrays**||||||
|Maximum RMS operating voltage<br>Maximum DC operating voltage<br>Contact discharge ESD capability<br>to IEC 61000-4-2<br>Air discharge ESD capability<br>to IEC 61000-4-2<br>Maximum surge current<br>(8/20 µs)<br>Typical capacitance for 4-fold array<br>(1 MHz, 1 V)<br>Typical capacitance for MCV array<br>(1 MHz, 1 V)<br>Maximum clamping voltage<br>Operating temperature<br>for 4-fold arrays<br>Operating temperature<br>for MCV arrays<br>Storage temperature<br>for 4-fold arrays<br>Storage temperature<br>for MCV arrays<br>Response time|VRMS,max<br>VDC,max<br>VESD,contact<br>VESD,air<br>Isurge,max<br>Ctyp<br>Ctyp<br>Vclamp,max<br>Top<br>Top<br>LCT/UCT<br>LCT/UCT<br>tresp||10 ... 14<br>12 ... 16<br>8<br>15<br>1 ... 5<br>4 x 3 ... 4 x<br>10<br>Matched<br>capacitance<br>2 x 10 (∆C<br>between<br>elements <<br>3%)<br>59 ... 350<br>�40/+125<br>�55/+125<br>�40/+125<br>�55/+150<br>< 0.5||V<br>V<br>kV<br>kV<br>A<br>pF<br>pF<br>V<br>°C<br>°C<br>°C<br>°C<br>ns|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 5 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Electrical specifications and ordering codes for single chips Maximum ratings (Top,max)** 

|Type|Ordering code|VRMS,max<br>V|VDC,max<br>V|Isurge,max<br>(8/20 µs)<br>A|Wmax<br>(ESD)1)<br>mJ|Top,max<br>°C|
|---|---|---|---|---|---|---|
|Single chip|||||||
|CT0402S5ARFG<br>CT0603S5ARFG<br>CT0402S14AHSG<br>CT0402V150HSG<br>CT0402V150RFG<br>CT0402V275RFG<br>CT0402V90RFG<br>CT0603S14AHSG<br>CT0603S14AHSG_E<br>CT0603V150RFG<br>CT0603V150RFG_E<br>CT0603L25HSG<br>CT0603L25HSG_E|B72590T7050S160<br>B72500T7050S160<br>B72590T8140S160<br>B72590T8151V060<br>B72590T7151V060<br>B72590T7271V060<br>B72590T7900V060<br>B72500T8140S160<br>B72500E8140S160<br>B72500T7151V060<br>B72500E7151V060<br>B72500T8250L060<br>B72500E8250L060|4<br>4<br>14<br>14<br>14<br>14<br>14<br>14<br>14<br>14<br>14<br>25<br>25|5.5<br>5.5<br>16<br>16<br>16<br>16<br>16<br>16<br>16<br>16<br>16<br>32<br>32|-<br>-<br>2<br>1<br>-<br>-<br>-<br>5<br>5<br>-<br>-<br>5<br>5|-<br>-<br>30<br>30<br>-<br>-<br>-<br>30<br>30<br>-<br>-<br>50<br>50|+85<br>+125<br>+85<br>+85<br>+85<br>+85<br>+85<br>+125<br>+1502)<br>+125<br>+1502)<br>+125<br>+1502)|



## **Characteristics (TA = 25** ° **C)** 

|**Characteristics (TA = 25**°**C)**|||||||
|---|---|---|---|---|---|---|
|Type|VV<br>(1 mA)<br>V|∆VV<br>%|Vclamp,max<br>V|Iclamp<br>(8/20 µs)<br>A|Ctyp<br>(1 MHz, 1 V)<br>pF|Cmax<br>(1 MHz, 1 V)<br>pF|
|Single chip|||||||
|CT0402S5ARFG<br>CT0603S5ARFG<br>CT0402S14AHSG<br>CT0402V150HSG<br>CT0402V150RFG<br>CT0402V275RFG<br>CT0402V90RFG<br>CT0603S14AHSG<br>CT0603S14AHSG_E<br>CT0603V150RFG<br>CT0603V150RFG_E<br>CT0603L25HSG<br>CT0603L25HSG_E|255<br>255<br>28<br>150<br>150<br>275<br>105<br>28<br>28<br>150<br>150<br>61<br>61|±15<br>±15<br>±20<br>±35<br>±35<br>±30<br>±15<br>±20<br>±20<br>±35<br>±35<br>±15<br>±15|-<br>-<br>66<br>290<br>-<br>-<br>-<br>66<br>66<br>-<br>290<br>120<br>120|-<br>-<br>1<br>1<br>-<br>-<br>-<br>1<br>1<br>-<br>1<br>1<br>1|0.6<br>0.6<br>10<br>2<br>2<br>1.5<br>2.2<br>15<br>15<br>3<br>3<br>10<br>10|1<br>1<br>15<br>3<br>3<br>2<br>3<br>30<br>30<br>5<br>5<br>15<br>15|



## **Note:** 

Typ CT0603S14AHSG_E, CT0603V150RFG_E and CT0603L25HSG_E are qualified acc. to AEC-Q200 with Top = 150 ° C. 

- 1) To IEC 61000-4-2, level 4 

> 2) Qualified acc. to AEC-Q200 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 6 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Electrical specifications and ordering codes for arrays Maximum ratings (Top,max)** 

|Type|Ordering code|VRMS,max<br>V|VDC,max<br>V|Isurge,max<br>(8/20 µs)<br>A|Wmax<br>(ESD)1)<br>mJ|Top,max<br>°C|
|---|---|---|---|---|---|---|
|2-fold array|||||||
|CA05M2S10T100HG|B72812Q1120S160|10|12|5|-|+1252)|
|4-fold array|||||||
|CA05P4S14THSG<br>CA06P4V150THSG|B72714A8140S160<br>B72724A8151V062|14<br>14|16<br>16|2<br>1|30<br>30|+85<br>+85|



## **Characteristics (TA = 25** ° **C)** 

|Type|VV<br>(1 mA)<br>V|∆VV<br>%|Vclamp,max<br>V|Iclamp<br>(8/20 µs)<br>A|Ctyp<br>(1 MHz, 1 V)<br>pF|<br>Cmax<br>(1 MHz, 1 V)<br>pF|
|---|---|---|---|---|---|---|
|2-fold array|||||||
|CA05M2S10T100HG|26|±20|60|1|10|15|
|4-fold array|||||||
|CA05P4S14THSG<br>CA06P4V150THSG|28<br>150|±15<br>±20|59<br>350|1<br>1|10<br>3|15<br>5|



## **Further characteristics** 

|Type|Absolute<br>capacitance<br>deviation between<br>array elements3)<br>%|Maximum relative<br>capacitance change<br>%/ K|Dissipation<br>factor tanδ<br>(@1 MHz,<br>1 VRMS,<br>25°C)|Pdiss,max<br>mW|VLD<br>(300<br>ms)<br>V|Vjump<br>(60<br>s)<br>V|
|---|---|---|---|---|---|---|
|2-fold array|||||||
|CA05M2S10T100HG|≤3|0.1|< 50�10-3|3|27|28|



> 1) To IEC 61000-4-2, level 4 

> 2) Qualified acc. to AEC-Q200 

> 3) Absolute value of (C1 � C2) / minimum {C1, C2}, with C1, C2 denoting the two individual capacitances of the 2-fold array. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 7 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Temperature derating** 

Climatic category: 

- �40/+85 ° C for chip size 0402 single chip and 4-fold arrays 

Climatic category: 

- �55/+125 ° C for chip size 0603 single chip and MCV arrays 

Climatic category: 

- �55/+150 ° C for chip size 0603 single chip, only automotive types 

**==> picture [33 x 92] intentionally omitted <==**

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 8 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **Dimensional drawings** 

**==> picture [176 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
Single chip 2-fold MCV array<br>**----- End of picture text -----**<br>


**==> picture [41 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
4-fold array<br>**----- End of picture text -----**<br>


**==> picture [41 x 53] intentionally omitted <==**

**==> picture [63 x 47] intentionally omitted <==**

## Dimensions in mm 

|Case size<br>EIA / mm|l|w|h|d|e|k|u|
|---|---|---|---|---|---|---|---|
|0201 / 0603<br>Single chip|0.60±0.03|0.30±0.03|0.33 max.|-|-|0.15±0.05|-|
|0402 / 1005<br>Single chip|1.00±0.15|0.50±0.10|0.6 max.|-|-|0.10 ... 0.30|-|
|0508 / 1220<br>2-fold MCV<br>array|2.00±0.20|1.25±0.15|0.9 max.|0.50±0.20|-|0.30±0.20|0.20<br>±0.10|
|0508 / 1220<br>4-fold array|2.00±0.20|1.25±0.20|0.9 max.|0.30±0.10|0.50±0.10|0.20 +0.2/�0.|1<br>-|
|0603 / 1608<br>Single chip|1.60±0.15|0.80±0.10|0.9 max.|-|-|0.10 ... 0.40|-|
|0612 / 1632<br>4-fold array|3.20±0.20|1.60±0.15|0.9 max.|0.40±0.15|0.80±0.15|0.20±0.10|-|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 9 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **Recommended solder pad layout** 

**==> picture [176 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Single chip 2-fold MCV array<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
4-fold array<br>**----- End of picture text -----**<br>


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## Dimensions in mm 

|Case size<br>EIA / mm||A|B|C|D|E|
|---|---|---|---|---|---|---|
|0201 / 0603|Single chip|0.30|0.25|0.30|-|-|
|0402 / 1005|Single chip|0.60|0.60|0.50|-|-|
|0508 / 1220|2-fold MCV array|1.00|1.30|0.40|0.60|2.16|
|0508 / 1220|4-fold array|0.35|0.90|0.40|-|0.50|
|0603 / 1608|Single chip|1.00|1.00|1.00|-|-|
|0612 / 1632|4-fold array|0.50|0.70|1.20|-|0.76|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 10 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **Delivery mode** 

|EIA case size|Taping|Reel size<br>mm|Packing unit<br>pcs.|Type|Ordering code|
|---|---|---|---|---|---|
|2-fold array||||||
|0508|Cardboard|180|4000|CA05M2S10T100HG|B72812Q1120S160|
|4-fold array||||||
|0508<br>0612|Cardboard<br>Blister|180<br>180|4000<br>3000|CA05P4S14THSG<br>CA06P4V150THSG|B72714A8140S160<br>B72724A8151V062|
|Single chip||||||
|0402<br>0402<br>0402<br>0402<br>0402<br>0402<br>0603<br>0603<br>0603<br>0603<br>0603<br>0603<br>0603|Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard<br>Cardboard|180<br>180<br>180<br>180<br>180<br>180<br>180<br>180<br>180<br>180<br>180<br>180<br>180|10000<br>10000<br>10000<br>10000<br>10000<br>10000<br>4000<br>4000<br>4000<br>4000<br>4000<br>4000<br>4000|CT0402S14AHSG<br>CT0402S5ARFG<br>CT0402V150HSG<br>CT0402V150RFG<br>CT0402V275RFG<br>CT0402V90RFG<br>CT0603L25HSG<br>CT0603L25HSG_E<br>CT0603S14AHSG<br>CT0603S14AHSG_E<br>CT0603S5ARFG<br>CT0603V150RFG<br>CT0603V150RFG_E|B72590T8140S160<br>B72590T7050S160<br>B72590T8151V060<br>B72590T7151V060<br>B72590T7271V060<br>B72590T7900V060<br>B72500T8250L060<br>B72500E8250L060<br>B72500T8140S160<br>B72500E8140S160<br>B72500T7050S160<br>B72500T7151V060<br>B72500E7151V060|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 11 of 35 

## **Multilayer varistors (MLVs)** 

## **High-speed series** 

## **Taping and packing** 

- **1 Taping and packing for SMD components** 

- **1.1 Blister tape (taping to IEC 60286-3)** 

**==> picture [223 x 128] intentionally omitted <==**

## **Dimensions in mm** 

|||8-mm tape|8-mm tape|8-mm tape||12-mm tape|12-mm tape|Tolerance|
|---|---|---|---|---|---|---|---|---|
|||Case size (inch/mm)<br>0508/<br>1220<br>0612/<br>1632|||1012/<br>2532|Case size (inch/mm|||
||0603/<br>1608|0506/<br>1216|0805/<br>2012|1206/<br>3216|1210/<br>3225|1812/<br>4532|2220/<br>5750||
|A0|0.9±0.10|1.50|1.50|1.80|2.80|3.50|5.10|±0.20|
|B0|1.75±0.10|1.80|2.30|3.40|3.50|4.80|6.00|±0.20|
|K0|1.0|0.80||1.80||3.40||max.|
|T|||0.30|||0.30||max.|
|T2|1.3|1.20|2.50|||3.90||max.|
|D0<br>D1|||1.50<br>0.3|||1.50<br>1.50||+0.10/�0<br>min.|
|P0<br>P2<br>P1|||4.00<br>2.00<br>4.00|||4.00<br>2.00<br>8.00||±0.101)<br>±0.05<br>±0.10|
|W|||8.00|||12.00||±0.30|
|E|||1.75|||1.75||±0.10|
|F|||3.50|||5.50||±0.05|
|G|||0.75|||0.75||min.|



1) ≤± 0.2 mm over 10 sprocket holes. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 12 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Part orientation in tape pocket for blister tape** 

For discrete chip, EIA case sizes 0603, 0805, 1206, 1210, 1812 and 2220 

For array, EIA case size 0612 

**==> picture [100 x 45] intentionally omitted <==**

**==> picture [100 x 45] intentionally omitted <==**

For arrays, EIA case sizes 0506 and 1012 

For filter array, EIA case size 0508 

**==> picture [100 x 45] intentionally omitted <==**

**==> picture [100 x 45] intentionally omitted <==**

## **Additional taping information** 

|**Additional taping information**||
|---|---|
|Reel material|Polystyrol(PS)|
|Tape material|Polystyrol(PS)or Polycarbonat(PC)or PVC|
|Tape break force|min. 10 N|
|Topcover tape strength|min. 10 N|
|Top cover tape peel force|0.1 to 1.0 N for 8-mm tape and 0.1 to 1.3 N for<br>12-mm tape at apeel speed of 300 mm/min|
|Tape peel angle|Angle between top cover tape and the direction of feed<br>during peel off: 165°to 180°|
|Cavity play|Each part rests in the cavity so that the angle between<br>thepart and cavitycenter line is no more than 20°|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 13 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **1.2 Cardboard tape (taping to IEC 60286-3)** 

**==> picture [60 x 134] intentionally omitted <==**

**==> picture [197 x 103] intentionally omitted <==**

## **Dimensions in mm** 

|||8-mm tape|8-mm tape|8-mm tape|||Tolerance|
|---|---|---|---|---|---|---|---|
||0201/0603|Case size (inch/mm)<br>0402/1005<br>0405/1012<br>0603/1608|||1003/2508|Case size<br>(inch/mm)<br>0508/1220||
|A0|0.38±0.05|0.60|1.05|0.95|1.00|1.60|±0.20|
|B0|0.68±0.05|1.15|1.60|1.80|2.85|2.40|±0.20|
|T|0.42±0.02|0.60|0.75|0.95|0.95|0.95|max.|
|T2|0.4 min.|0.70|0.90|1.10|1.10|1.10|max.|
|D0|1.50±0.1||1.50|||1.50|+0.10/�0|
|P0<br>P2<br>P1|||4.00||||±0.102)|
||||2.00||||±0.05|
||2.00±0.05|2.00|4.00|4.00|4.00|4.00|±0.10|
|W|||8.00||||±0.30|
|E|||1.75||||±0.10|
|F|||3.50||||±0.05|
|G|||0.75||||min.|



2) ≤ 0.2 mm over 10 sprocket holes. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 14 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **Part orientation in tape pocket for cardboard tape** 

For discrete chip, EIA case sizes 0201, 0402, 0603 and 1003 

For array, EIA case size 0405 

**==> picture [86 x 44] intentionally omitted <==**

**==> picture [86 x 44] intentionally omitted <==**

For array, EIA case size 0508 

For filter array, EIA case size 0405 

**==> picture [100 x 45] intentionally omitted <==**

**==> picture [90 x 46] intentionally omitted <==**

## **Additional taping information** 

|**Additional taping information**||
|---|---|
|Reel material|Polystyrol(PS)|
|Tape material|Cardboard|
|Tape break force|min. 10 N|
|Topcover tape strength|min. 10 N|
|Topcover tapepeel force|0.1 to 1.0 N at apeel speed of 300 mm/min|
|Tape peel angle|Angle between top cover tape and the direction of feed<br>during peel off: 165°to 180°|
|Cavity play|Each part rests in the cavity so that the angle between<br>thepart and cavitycenter line is no more than 20°|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 15 of 35 

## **Multilayer varistors (MLVs)** 

## **High-speed series** 

## **1.3 Reel packing** 

**==> picture [89 x 112] intentionally omitted <==**

## **Dimensions in mm** 

||8-mm tape|8-mm tape|12-mm tape|12-mm tape|
|---|---|---|---|---|
||180-mm reel|330-mm reel|180-mm reel|330-mm reel|
||180 +0/�3|330 +0/�2.0|180 +0/�3|330 +0/�2.0|
||8.4 +1.5/�0<br>14.4 max.|8.4 +1.5/�0<br>14.4 max.|12.4 +1.5/�0<br>18.4 max.|12.4 +1.5/�0<br>18.4 max.|



## **Leader, trailer** 

**==> picture [241 x 179] intentionally omitted <==**

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 16 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **1.4 Packing units for discrete chip and array chip** 

|||||||
|---|---|---|---|---|---|
|Case size<br>inch/mm|Chip thickness<br>th|Cardboard tape<br>W|Blister tape<br>W|∅180-mm reel<br>pcs.|∅330-mm reel<br>pcs.|
|0201/0603|0.33 mm|8 mm|�|15000|�|
|0402/1005|0.6 mm|8 mm|�|10000|50000|
|0405/1012|0.7 mm|8 mm|�|5000|�|
|0506/1216|0.5 mm|�|8 mm|4000|�|
|0508/1220|0.9 mm|8 mm|8 mm|4000|�|
|0603/1608|0.9 mm|8 mm|8 mm|4000|16000|
|0612/1632|0.7 mm|�|8 mm|3000|�|
|0805/2012|0.7 mm<br>0.9 mm<br>1.3 mm|�<br>�<br>�|8 mm<br>8 mm<br>8 mm|3000<br>3000<br>3000|�<br>12000<br>12000|
|1003/2508|0.9 mm|8 mm|�|4000|�|
|1012/2532|1.0 mm|�|8 mm|2000|�|
|1206/3216|0.9 mm<br>1.3 mm<br>1.4 mm<br>1.6 mm|�<br>�<br>�<br>�|8 mm<br>8 mm<br>8 mm<br>8 mm|3000<br>3000<br>2000<br>2000|�<br>12000<br>8000<br>8000|
|1210/3225|0.9 mm<br>1.3 mm<br>1.4 mm<br>1.6 mm|�<br>�<br>�<br>�|8 mm<br>8 mm<br>8 mm<br>8 mm|3000<br>3000<br>2000<br>2000|�<br>12000<br>8000<br>8000|
|1812/4532|1.3 mm<br>1.4 mm<br>1.6 mm<br>2.0 mm<br>2.3 mm|�<br>�<br>�<br>�<br>�|12 mm<br>12 mm<br>12 mm<br>12 mm<br>12 mm|1500<br>1000<br>1000<br>�<br>�|�<br>�<br>4000<br>3000<br>3000|
|2220/5750|1.3 mm<br>1.4 mm<br>1.6 mm<br>2.0 mm<br>2.3 mm<br>2.7 mm<br>3.0 mm|�<br>�<br>�<br>�<br>�<br>�<br>�|12 mm<br>12 mm<br>12 mm<br>12 mm<br>12 mm<br>12 mm<br>12 mm|1500<br>1000<br>1000<br>�<br>�<br>600<br>600|�<br>�<br>�<br>3000<br>3000<br>�<br>�|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 17 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **2 Delivery mode for leaded SHCV varistors** 

Standard delivery mode for SHCV types is bulk. Alternative taping modes (AMMO pack or taped on reel) are available upon request. 

Packing units for: 

|Type|Pieces|
|---|---|
|SR6|2000|
|SR1 / SR2|1000|



For types not listed in this data book please contact EPCOS. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 18 of 35 

## **Multilayer varistors (MLVs)** 

## **High-speed series** 

## **Soldering directions** 

## **1 Terminations** 

## **1.1 Nickel barrier termination** 

The nickel barrier layer of the silver/nickel/tin termination prevents leaching of the silver base metallization layer. This allows great flexibility in the selection of soldering parameters. The tin prevents the nickel layer from oxidizing and thus ensures better wetting by the solder. The nickel barrier termination is suitable for all commonly-used soldering methods, including lead-free soldering. 

**==> picture [232 x 139] intentionally omitted <==**

Multilayer CTVS: Structure of nickel barrier termination 

## **1.2 Silver-platinum termination** 

Silver-platinum terminations are mainly used for the large EIA case sizes 1812 and 2220. The silver-platinum termination is approved for reflow soldering, SnPb soldering and lead-free soldering with a silver containing solder paste. In case of SnPb soldering, a solder paste Sn62Pb36Ag2 is recommended. For lead-free reflow soldering, a solder paste SAC, e.g. Sn95.5Ag3.8Cu0.7, is recommended. 

**==> picture [178 x 85] intentionally omitted <==**

Multilayer varistor: Structure of silver-platinum termination 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 19 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **2 Recommended soldering temperature profiles** 

## **2.1 Reflow soldering temperature profile** 

## **Recommended temperature characteristic for reflow soldering following JEDEC J-STD-020D** 

**==> picture [129 x 82] intentionally omitted <==**

|**Profile feature**||**Sn-Pb eutectic assembly**|**Pb-free assembly**|
|---|---|---|---|
|Preheat and soak<br>- Temperature min<br>- Temperature max<br>- Time|Tsmin<br>Tsmax<br>tsminto tsmax|100°C<br>150°C<br>60 ... 120 s|150°C<br>200°C<br>60 ... 180 s|
|Average ramp-uprate|Tsmaxto Tp|3°C/ s max.|3°C/ s max.|
|Liquidous temperature<br>Time at liquidous|TL<br>tL|183°C<br>60 ... 150 s|217°C<br>60 ... 150 s|
|Peakpackage bodytemperature|Tp1)|220°C ... 235°C2)|245°C ... 260°C2)|
|Time (tP)3) within 5°C of specified<br>classification temperature(Tc)||20 s3)|30 s3)|
|Average ramp-down rate|Tpto Tsmax|6°C/ s max.|6°C/ s max.|
|Time 25°C topeak temperature||maximum 6 min|maximum 8 min|



1) Tolerance for peak profile temperature (TP) is defined as a supplier minimum and a user maximum. 

2) Depending on package thickness. For details please refer to JEDEC J-STD-020D. 

3) Tolerance for time at peak profile temperature (tP) is defined as a supplier minimum and a user maximum. 

**Note:** All temperatures refer to topside of the package, measured on the package body surface. Number of reflow cycles: 3 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 20 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **2.2 Wave soldering temperature profile** 

Temperature characteristics at component terminal with dual-wave soldering 

**==> picture [301 x 158] intentionally omitted <==**

## **2.3 Lead-free soldering processes** 

EPCOS multilayer CTVS with AgNiSn termination are designed for the requirements of lead-free soldering processes only. 

Soldering temperature profiles to JEDEC J-STD-020D, IEC 60068-2-58 and ZVEI recommendations. 

## **3 Recommended soldering methods - type-specific releases by EPCOS** 

## **3.1 Overview** 

|||Reflow soldering|Reflow soldering|Wave soldering|Wave soldering|
|---|---|---|---|---|---|
|Type|EIA case size|SnPb|Lead-free|SnPb|Lead-free|
|CT... / CD...|0201/ 0402|Approve|d<br>Approved|No|No|
|CT... / CD...|0603 ... 2220|Approve|d<br>Approved|Approved|Approved|
|CN...K2|1812, 2220|Approve|d<br>Approved|No|No|
|Arrays|0405 ... 1012|Approve|d<br>Approved|No|No|
|ESD/EMI filters|0405, 0508|Approve|d<br>Approved|No|No|
|SHCV|-|No|No|Approved|Approved|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 21 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **3.2 Nickel barrier and AgPt terminated multilayer MLVs** 

All EPCOS MLVs with nickel barrier and AgPt termination are suitable and fully qualiyfied for leadfree soldering. The nickel barrier layer is 100% matte tin-plated. 

## **3.3 Silver-platinum terminated MLVs** 

The silver-platinum termination is approved for reflow soldering, SnPb soldering and lead-free with a silver containing solder paste. In case of SnPb soldering, a solder paste Sn62Pb36Ag2 is recommended. For lead-free reflow soldering, a solder paste SAC, e.g. Sn95.5Ag3.8Cu0.7, is recommended. 

## **3.4 Tinned iron wire** 

All EPCOS SHCV types with tinned termination are approved for lead-free and SnPb soldering. 

## **4 Solder joint profiles / solder quantity** 

## **4.1 Nickel barrier termination** 

If the meniscus height is too low, that means the solder quantity is too low, the solder joint may break, i.e. the component becomes detached from the joint. This problem is sometimes interpreted as leaching of the external terminations. 

If the solder meniscus is too high, i.e. the solder quantity is too large, the vise effect may occur. As the solder cools down, the solder contracts in the direction of the component. If there is too much solder on the component, it has no leeway to evade the stress and may break, as in a vise. 

The figures below show good and poor solder joints for dual-wave and infrared soldering. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 22 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **4.1.1 Solder joint profiles for nickel barrier termination - dual-wave soldering** 

**==> picture [121 x 68] intentionally omitted <==**

**==> picture [129 x 80] intentionally omitted <==**

Good and poor solder joints caused by amount of solder in dual-wave soldering. 

## **4.1.2 Solder joint profiles for nickel barrier termination / silver-platinum termination - reflow soldering** 

**==> picture [152 x 152] intentionally omitted <==**

**==> picture [169 x 169] intentionally omitted <==**

Good and poor solder joints caused by amount of solder in reflow soldering. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 23 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

|**5**<br>**Solderability tests**|**5**<br>**Solderability tests**||||
|---|---|---|---|---|
|Test|Standard|Test conditions<br>Sn-Pb soldering|Test conditions<br>Pb-free soldering|Criteria/ test results|
|Wettability|IEC<br>60068-2-58|Immersion in<br>60/40 SnPb solder<br>using non-activated<br>flux at 215±3°C for<br>3±0.3 s|Immersion in<br>Sn96.5Ag3.0Cu0.5<br>solder using non- or<br>low activated flux<br>at 245±5°C<br>for 3±0.3 s|Covering of 95% of<br>end termination,<br>checked by visual<br>inspection|
|Leaching<br>resistance|IEC<br>60068-2-58|Immersion in<br>60/40 SnPb<br>solder using<br>mildly activated flux<br>without preheating<br>at 260±5°C<br>for 10±1 s|Immersion in<br>Sn96.5Ag3.0Cu0.5<br>solder using non- or<br>low activated flux<br>without preheating<br>at 255±5°C<br>for 10±1 s|No leaching of<br>contacts|
|Thermal shock<br>(solder shock)||Dip soldering at<br>300°C/5 s|Dip soldering at<br>300°C/5 s|No deterioration of<br>electrical parameters.<br>Capacitance change:<br>�∆C/C0�≤15%|
|Tests of resistance<br>to soldering heat<br>for SMDs|IEC<br>60068-2-58|Immersion in<br>60/40 SnPb for 10 s<br>at 260°C|Immersion in<br>Sn96.5Ag3.0Cu0.5<br>for 10 s at 260°C|Change of varistor<br>voltage:<br>�∆V/V(1 mA)�≤5%|
|Tests of resistance<br>to soldering heat<br>for radial leaded<br>components<br>(SHCV)|IEC<br>60068-2-20|Immersion<br>of leads in<br>60/40 SnPb<br>for 10 s at 260°C|Immersion<br>of leads in<br>Sn96.5Ag3.0Cu0.5<br>for 10 s at 260°C|Change of varistor<br>voltage:�∆V/V (1<br>mA)�≤5%<br>Change of<br>capacitance X7R:<br>≤�5/+10%|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 24 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Note: Leaching of the termination** 

Effective area at the termination might be lost if the soldering temperature and/or immersion time are not kept within the recommended conditions. Leaching of the outer electrode should not exceed 25% of the chip end area (full length of the edge A-B-C-D) and 25% of the length A-B, shown below as mounted on substrate. 

As a single chip 

As mounted on substrate 

## **6 Notes for proper soldering** 

## **6.1 Preheating and cooling** 

**==> picture [5 x 5] intentionally omitted <==**

According to JEDEC J-STD-020D. Please refer to section 2 of this chapter. 

## **6.2 Repair/ rework** 

Manual soldering with a soldering iron must be avoided, hot-air methods are recommended for rework purposes. 

## **6.3 Cleaning** 

All environmentally compatible agents are suitable for cleaning. Select the appropriate cleaning solution according to the type of flux used. The temperature difference between the components and cleaning liquid must not be greater than 100 ° C. Ultrasonic cleaning should be carried out with the utmost caution. Too high ultrasonic power can impair the adhesive strength of the metallized surfaces. 

## **6.4 Solder paste printing (reflow soldering)** 

An excessive application of solder paste results in too high a solder fillet, thus making the chip more susceptible to mechanical and thermal stress. Too little solder paste reduces the adhesive strength on the outer electrodes and thus weakens the bonding to the PCB. The solder should be applied smoothly to the end surface. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 25 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **6.5 Selection of flux** 

Used flux should have less than or equal to 0.1 wt % of halogenated content, since flux residue after soldering could lead to corrosion of the termination and/or increased leakage current on the surface of the component. Strong acidic flux must not be used. The amount of flux applied should be carefully controlled, since an excess may generate flux gas, which in turn is detrimental to solderability. 

## **6.6 Storage of CTVSs** 

Solderability is guaranteed for one year from date of delivery for multilayer varistors, CeraDiodes and ESD/EMI filters (half a year for chips with AgPt terminations) and two years for SHCV components, provided that components are stored in their original packages. Storage temperature: �25 ° C to +45 ° C Relative humidity: ≤ 75% annual average, ≤ 95% on 30 days a year 

The solderability of the external electrodes may deteriorate if SMDs and leaded components are stored where they are exposed to high humidity, dust or harmful gas (hydrogen chloride, sulfurous acid gas or hydrogen sulfide). 

Do not store SMDs and leaded components where they are exposed to heat or direct sunlight. Otherwise the packing material may be deformed or SMDs/ leaded components may stick together, causing problems during mounting. 

After opening the factory seals, such as polyvinyl-sealed packages, it is recommended to use the SMDs or leaded components as soon as possible. 

Solder CTVS components after shipment from EPCOS within the time specified: 

CTVS with Ni barrier termination: 12 months CTVS with AgPt termination: 6 months SHCV (leaded components): 24 months 

## **6.7 Placement of components on circuit board** 

Especially in the case of dual-wave soldering, it is of advantage to place the components on the board before soldering in that way that their two terminals do not enter the solder bath at different times. 

Ideally, both terminals should be wetted simultaneously. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 26 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **6.8 Soldering cautions** 

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

An excessively long soldering time or high soldering temperature results in leaching of the outer electrodes, causing poor adhesion and a change of electrical properties of the varistor due to the loss of contact between electrodes and termination. 

Wave soldering must not be applied for MLVs designated for reflow soldering only (see table "Overview", section 3.1). 

Keep the recommended down-cooling rate. 

## **6.9 Standards** 

CECC 00802 IEC 60068-2-58 IEC 60068-2-20 JEDEC J-STD-020D 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 27 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

## **Symbols and terms** 

## **For ceramic transient voltage suppressors (CTVS)** 

|Symbol|Term|
|---|---|
|Cline,max<br>Cline,min<br>Cline,typ<br>Cmax<br>Cmin<br>Cnom<br>∆Cnom<br>Ctyp<br>fcut-off,max<br>fcut-off,min<br>fcut-off,typ<br>fres,typ<br>I<br>Iclamp<br>Ileak<br>Ileak,max<br>Ileak,typ<br>IPP<br>Isurge,max<br>LCT<br>Ltyp<br>Pdiss,max<br>PPP<br>Rins<br>Rmin<br>RS<br>RS,typ<br>TA<br>Top<br>Top,max<br>Tstg|Maximum capacitance per line<br>Minimum capacitance per line<br>Typical capacitance per line<br>Maximum capacitance<br>Minimum capacitance<br>Nominal capacitance<br>Tolerance of nominal capacitance<br>Typical capacitance<br>Maximum cut-off frequency<br>Minimum cut-off frequency<br>Typical cut-off frequency<br>Typical resonance frequency<br>Current<br>Clamping current<br>Leakage current<br>Maximum leakage current<br>Typical leakage current<br>Peak pulse current<br>Maximum surge current (also termed peak current)<br>Lower category temperature<br>Typical inductance<br>Maximum power dissipation<br>Peak pulse power<br>Insulation resistance<br>Minimum resistance<br>Resistance per line<br>Typical resistance per line<br>Ambient temperature<br>Operating temperature<br>Maximum operating temperature<br>Storage temperature|



Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 28 of 35 

|**Multilayer varistors (MLVs)**|**Multilayer varistors (MLVs)**||
|---|---|---|
|**High-speed series**|||
||||
|Symbol|Term||
|tr<br>tresp<br>tresp,max<br>UCT<br>V<br>VBR,min<br>Vclamp,max<br>VDC,max<br>VESD,air<br>VESD,contact<br>Vjump<br>VRMS,max<br>VV<br>VLD<br>Vleak<br>VV,min<br>VV,max<br>∆VV<br>WLD<br>Wmax<br>αtyp<br>tanδ<br>�*�|Duration of equivalent rectangular wave<br>Response time<br>Maximum response time<br>Upper category temperature<br>Voltage<br>Minimum breakdown voltage<br>Maximum clamping voltage<br>Maximum DC operating voltage (also termed working voltage)<br>Air discharge ESD capability<br>Contact discharge ESD capability<br>Maximum jump-start voltage<br>Maximum AC operating voltage, root-mean-square value<br>Varistor voltage (also termed breakdown voltage)<br>Maximum load dump voltage<br>Measurement voltage for leakage current<br>Minimum varistor voltage<br>Maximum varistor voltage<br>Tolerance of varistor voltage<br>Maximum load dump energy<br>Maximum energy absorption (also termed transient energy)<br>Typical insertion loss<br>Dissipation factor<br>Lead spacing<br>Maximumpossible application conditions||



All dimensions are given in mm. The commas used in numerical values denote decimal points. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 29 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

|**For CeraDiodes**|||
|---|---|---|
|**CeraDiode**|**Semiconductor diode**||
|Cmax<br>Ctyp<br>IBR<br>Ileak<br>IPP<br>PPP<br>Top<br>Tstg<br>VBR<br>VBR,min<br>Vclamp<br>Vclamp,max<br>VDC<br>VDC,max<br>VESD,air<br>VESD,contact<br>Vleak<br>- *)<br>- *)<br>- *)|IR, IT<br>IRM<br>IP, IPP<br>PPP<br>VBR<br>Vcl,VC<br>VRM, VRWM, VWM, VDC<br>VRM, VRWM, VWM, VDC<br>IF<br>IRM, IRM,max@VRM<br>VF|Maximum capacitance<br>Typical capacitance<br>(Reverse) current @ breakdown voltage<br>(Reverse) leakage current<br>Current @ clamping voltage; peak pulse<br>current<br>Peak pulse power<br>Operating temperature<br>Storage temperature<br>(Reverse) breakdown voltage<br>Minimum breakdown voltage<br>Clamping voltage<br>Maximum clamping voltage<br>(Reverse) stand-off voltage, working<br>voltage, operating voltage<br>Maximum DC operating voltage<br>Air discharge ESD capability<br>Contact discharge ESD capability<br>(Reverse) voltage @ leakage current<br>Current @ forward voltage<br>(Reverse) current @ maximum reverse<br>stand-off voltage, working voltage,<br>operating voltage<br>Forward voltage|



*) Not applicable due to bidirectional characteristics of CeraDiodes. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 30 of 35 

**Multilayer varistors (MLVs) High-speed series** 

## **Cautions and warnings** 

## **General** 

Some parts of this publication contain statements about the suitability of our ceramic transient voltage suppressor (CTVS) components (multilayer varistors (MLVs)), CeraDiodes, ESD/EMI filters, leaded transient voltage/ RFI suppressors (SHCV types)) for certain areas of application, including recommendations about incorporation/design-in of these products into customer applications. The statements are based on our knowledge of typical requirements often made of our CTVS devices in the particular areas. We nevertheless expressly point out that such statements cannot be regarded as binding statements about the suitability of our CTVS components for a particular customer application. As a rule, EPCOS is either unfamiliar with individual customer applications or less familiar with them than the customers themselves. For these reasons, it is always incumbent on the customer to check and decide whether the CTVS devices with the properties described in the product specification are suitable for use in a particular customer application. 

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

- Do not use EPCOS CTVS components for purposes not identified in our specifications, application notes and data books. 

- Ensure the suitability of a CTVS in particular by testing it for reliability during design-in. Always evaluate a CTVS component under worst-case conditions. 

- Pay special attention to the reliability of CTVS devices intended for use in safety-critical applications (e.g. medical equipment, automotive, spacecraft, nuclear power plant). 

## **Design notes** 

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

Always connect a CTVS in parallel with the electronic circuit to be protected. 

- Consider maximum rated power dissipation if a CTVS has insufficient time to cool down between a number of pulses occurring within a specified isolated time period. Ensure that electrical characteristics do not degrade. 

- Consider derating at higher operating temperatures. Choose the highest voltage class compatible with derating at higher temperatures. 

- Surge currents beyond specified values will puncture a CTVS. In extreme cases a CTVS will burst. 

- If steep surge current edges are to be expected, make sure your design is as low-inductance as possible. 

- In some cases the malfunctioning of passive electronic components or failure before the end of their service life cannot be completely ruled out in the current state of the art, even if they are operated as specified. In applications requiring a very high level of operational safety and especially when the malfunction or failure of a passive electronic component could endanger human life or health (e.g. in accident prevention, life-saving systems, or automotive battery line applications such as clamp 30), ensure by suitable design of the application or other measures (e.g. installation of protective circuitry or redundancy) that no injury or damage is sustained by third parties in the event of such a malfunction or failure. Only use CTVS components from the automotive series in safety-relevant applications. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

Page 31 of 35 

## **Multilayer varistors (MLVs) High-speed series** 

**==> picture [5 x 5] intentionally omitted <==**

- Specified values only apply to CTVS components that have not been subject to prior electrical, mechanical or thermal damage. The use of CTVS devices in line-to-ground applications is therefore not advisable, and it is only allowed together with safety countermeasures like thermal fuses. 

## **Storage** 

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

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**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

- Only store CTVS in their original packaging. Do not open the package prior to processing. Storage conditions in original packaging: temperature �25 to +45 ° C, relative humidity ≤ 75% annual average, maximum 95%, dew precipitation is inadmissible. 

- Do not store CTVS devices where they are exposed to heat or direct sunlight. Otherwise the packaging material may be deformed or CTVS may stick together, causing problems during mounting. 

- Avoid contamination of the CTVS surface during storage, handling and processing. 

- Avoid storing CTVS devices in harmful environments where they are exposed to corrosive gases for example (SOx, Cl). 

- Use CTVS as soon as possible after opening factory seals such as polyvinyl-sealed packages. Solder CTVS components after shipment from EPCOS within the time specified: 

- CTVS with Ni barrier termination, 12 months 

- CTVS with AgPt termination, 6 months 

- SHCV, 24 months 

## **Handling** 

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

**==> picture [5 x 5] intentionally omitted <==**

Do not drop CTVS components and allow them to be chipped. 

- Do not touch CTVS with your bare hands - gloves are recommended. Avoid contamination of the CTVS surface during handling. 

- Washing processes may damage the product due to the possible static or cyclic mechanical loads (e.g. ultrasonic cleaning). They may cause cracks to develop on the product and its parts, which might lead to reduced reliability or lifetime. 

## **Mounting** 

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- When CTVS devices are encapsulated with sealing material or overmolded with plastic material, electrical characteristics might be degraded and the life time reduced. Make sure an electrode is not scratched before, during or after the mounting process. Make sure contacts and housings used for assembly with CTVS components are clean before mounting. 

- The surface temperature of an operating CTVS can be higher. Ensure that adjacent components are placed at a sufficient distance from a CTVS to allow proper cooling. Avoid contamination of the CTVS surface during processing. 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

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## **Multilayer varistors (MLVs) High-speed series** 

## **Soldering** 

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- Complete removal of flux is recommended to avoid surface contamination that can result in an instable and/or high leakage current. 

- Use resin-type or non-activated flux. 

Bear in mind that insufficient preheating may cause ceramic cracks. 

Rapid cooling by dipping in solvent is not recommended, otherwise a component may crack. 

## **Operation** 

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Use CTVS only within the specified operating temperature range. 

Use CTVS only within specified voltage and current ranges. 

- Environmental conditions must not harm a CTVS. Only use them in normal atmospheric conditions. Reducing the atmosphere (e.g. hydrogen or nitrogen atmosphere) is prohibited. Prevent a CTVS from contacting liquids and solvents. Make sure that no water enters a CTVS (e.g. through plug terminals). 

Avoid dewing and condensation. 

- EPCOS CTVS components are mainly designed for encased applications. Under all circumstances avoid exposure to: 

- direct sunlight 

- rain or condensation 

- steam, saline spray 

- corrosive gases 

- atmosphere with reduced oxygen content 

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- EPCOS CTVS devices are not suitable for switching applications or voltage stabilization where static power dissipation is required. 

This listing does not claim to be complete, but merely reflects the experience of EPCOS AG. 

## **Display of ordering codes for EPCOS products** 

The ordering code for one and the same EPCOS product can be represented differently in data sheets, data books, other publications, on the EPCOS website, or in order-related documents such as shipping notes, order confirmations and product labels. **The varying representations of the ordering codes are due to different processes employed and do not affect the specifications of the respective products** . Detailed information can be found on the Internet under www.epcos.com/orderingcodes 

Please read _Cautions and warnings_ and _Important notes_ at the end of this document. 

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## **Important notes** 

The following applies to all products named in this publication: 

1. Some parts of this publication contain **statements about the suitability of our products for certain areas of application** . These statements are based on our knowledge of typical requirements that are often placed on our products in the areas of application concerned. We nevertheless expressly point out **that such statements cannot be regarded as binding statements about the suitability of our products for a particular customer application** . As a rule, EPCOS is either unfamiliar with individual customer applications or less familiar with them than the customers themselves. For these reasons, it is always ultimately incumbent on the customer to check and decide whether an EPCOS product with the properties described in the product specification is suitable for use in a particular customer application. 

2. We also point out that **in individual cases, a malfunction of electronic components or failure before the end of their usual service life cannot be completely ruled out in the current state of the art, even if they are operated as specified** . In customer applications requiring a very high level of operational safety and especially in customer applications in which the malfunction or failure of an electronic component could endanger human life or health (e.g. in accident prevention or lifesaving systems), it must therefore be ensured by means of suitable design of the customer application or other action taken by the customer (e.g. installation of protective circuitry or redundancy) that no injury or damage is sustained by third parties in the event of malfunction or failure of an electronic component. 

3. **The warnings, cautions and product-specific notes must be observed.** 

4. In order to satisfy certain technical requirements, **some of the products described in this publication may contain substances subject to restrictions in certain jurisdictions (e.g. because they are classed as hazardous)** . Useful information on this will be found in our Material Data Sheets on the Internet (www.epcos.com/material). Should you have any more detailed questions, please contact our sales offices. 

5. We constantly strive to improve our products. Consequently, **the products described in this publication may change from time to time** . The same is true of the corresponding product specifications. Please check therefore to what extent product descriptions and specifications contained in this publication are still applicable before or when you place an order. We also **reserve the right to discontinue production and delivery of products** . Consequently, we cannot guarantee that all products named in this publication will always be available. The aforementioned does not apply in the case of individual agreements deviating from the foregoing for customer-specific products. 

6. Unless otherwise agreed in individual contracts, **all orders are subject to the current version of the "General Terms of Delivery for Products and Services in the Electrical Industry" published by the German Electrical and Electronics Industry Association (ZVEI)** . 

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## **Important notes** 

7. The trade names EPCOS, Alu-X, CeraDiode, CeraLink, CeraPad, CeraPlas, CSMP, CSSP, CTVS, DeltaCap, DigiSiMic, DSSP, ExoCore, FilterCap, FormFit, LeaXield, MiniBlue, MiniCell, MKD, MKK, MotorCap, PCC, PhaseCap, PhaseCube, PhaseMod, PhiCap, PQSine, SIFERRIT, SIFI, SIKOREL, SilverCap, SIMDAD, SiMic, SIMID, SineFormer, SIOV, SIP5D, SIP5K, TFAP, ThermoFuse, WindCap are **trademarks registered or pending** in Europe and in other countries. Further information will be found on the Internet at www.epcos.com/trademarks. 

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