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ESD Protection Design: TVS Diodes and ESD Suppressors Explained

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A human-body ESD discharge delivers 2-15 kV in nanoseconds, with peak currents reaching 30 A for a level-4 contact discharge per IEC 61000-4-2. Without protection, that energy vaporizes bond wires, punctures gate oxides and silently degrades semiconductor junctions. A 50-cent TVS diode placed correctly is the difference between a product that survives years of user handling and one that fails in the field.

How ESD damages electronics

Three mechanisms:

  1. Gate oxide rupture: MOSFET and CMOS inputs have gate oxides only a few nanometers thick. A 4 nm gate oxide breaks down at roughly 4 V. An ESD strike delivers kilovolts. The result is a permanent short from gate to channel.

  2. Junction burnout: the high current density of an ESD pulse melts silicon at a localized hotspot, shorting a PN junction. The component may still function partially but with degraded leakage current and noise.

  3. Latch-up: ESD triggers parasitic SCR structures inherent in CMOS processes, creating a low-impedance path between VDD and VSS. If the power supply cannot be cycled, the IC draws excessive current until it thermally destructs.

TVS diodes: the primary defense

A TVS (transient voltage suppressor) is a silicon avalanche diode designed to clamp transients. In normal operation, it appears as a high impedance. During an ESD strike, it avalanches at its breakdown voltage and shunts current to ground, clamping the protected line to a safe voltage.

Key specifications:

Reverse standoff voltage (Vrwm): the maximum DC voltage that will not cause significant leakage. For a 5 V USB VBUS line, choose Vrwm ≥ 5 V. A 5 V TVS on a 5 V rail will conduct microamps of leakage at 5 V; a 3.3 V TVS will conduct milliamps at 5 V and burn.

Breakdown voltage (Vbr): the voltage at which the diode begins to conduct significantly, typically 10-20% above Vrwm. This must be below the maximum voltage the protected IC can tolerate. A 5 V MCU GPIO with a 6 V absolute maximum rating needs a TVS with Vbr well below 6 V.

Clamping voltage (Vc): the voltage across the TVS at the peak pulse current (typically specified for 8/20 µs or IEC 61000-4-2 waveforms). This is the voltage the protected IC actually sees during ESD. A USB 2.0 D+/D- line at 3.3 V logic can tolerate 4 V briefly during an ESD event. A TVS clamping at 9 V at 30 A peak current might still allow damage. Look for ultra-low clamping TVS arrays (e.g., Nexperia PESD series, Semtech RClamp series) that clamp below 5 V for 3.3 V interfaces.

Capacitance: for high-speed data lines (USB 3, HDMI, Ethernet), the TVS capacitance must be low enough not to degrade signal integrity. USB 2.0 (480 Mbps) tolerates roughly 3-5 pF. HDMI 2.0 (6 Gbps per lane) needs under 0.5 pF. USB 3.2 (10 Gbps) under 0.3 pF. Low-capacitance TVS diodes achieve this with a steering diode + Zener topology that reduces the effective capacitance seen by the signal line.

ESD suppressors: multilayer varistors and polymer devices

MLVs (multilayer varistors) are ceramic devices with a nonlinear voltage-current characteristic, similar to back-to-back Zener diodes. They are bidirectional and absorb more energy than similarly sized TVS diodes, making them suitable for power rail protection. Capacitance is higher (tens to hundreds of pF), limiting use to low-speed lines. A TDK AVR-M1608C270 (0402, 27 V, 0.05 J) protects a 12 V power rail in a compact SMD footprint.

Polymer ESD suppressors (PESD) use voltage-triggered polymer material. Ultra-low capacitance (0.1-0.5 pF) makes them ideal for the highest-speed interfaces. They have higher clamping voltages than silicon TVS, so verify the protected IC's tolerance.

PCB layout: where TVS placement matters

The path between the ESD source (connector pin) and the TVS must be as short as possible. Parasitic inductance in the trace adds to the clamping voltage: V = Vc + L × di/dt. With 30 A peak current and 1 ns rise time, every nanohenry of inductance adds 30 V to the clamping voltage. A 10 mm trace has roughly 6-8 nH, adding 180-240 V. Place the TVS within 2-3 mm of the connector pin.

The ground return path must also be low inductance. Connect the TVS ground directly to the chassis or shield ground through multiple vias, not through a long trace to the digital ground plane. ESD current flowing through the digital ground plane creates voltage gradients that can corrupt logic levels.

Protection for common interfaces

USB 2.0 (VBUS, D+, D-): Use a 4-channel TVS array like the Nexperia IP4283CZ10 (Vrwm = 5 V, C = 0.8 pF, IEC 61000-4-2 Level 4). Place within 3 mm of the USB connector.

RS-485 (2-wire differential): Bidirectional TVS, Vrwm ≥ 12 V (common RS-485 common-mode range). The Bourns CDSOT23-SM712 is designed specifically for RS-485: 12 V and 7 V bidirectional clamping.

Ethernet (10/100/1000BASE-T): Use an integrated connector with magnetics and TVS, or discrete TVS arrays like the Semtech RClamp3374N (3.3 V working, 0.4 pF per channel, protects all four pairs).

HDMI: ultra-low capacitance, typically under 0.5 pF. The Nexperia IP4285CZ6 and Semtech RClamp0534 series are common choices.

FAQ

Q: Can I use a regular Zener diode for ESD protection?

Not effectively. Zeners have higher capacitance, slower response times and are not characterized for the 1 ns rise times of ESD. A 400 mW Zener (BZX84C5V1) will fail after a few ESD strikes because it is not rated for the peak pulse power. Use a purpose-designed TVS diode.

Q: How many ESD strikes can a TVS diode survive?

TVS diodes rated for IEC 61000-4-2 Level 4 are typically tested to survive 1000 strikes at the rated level. In practice, a TVS will survive tens of thousands of discharges, far exceeding the product's operational life. The failure mode is usually a soft short (increased leakage current) rather than an open circuit.

Q: Do I need ESD protection on internal board-to-board connectors?

If the connector is user-accessible (USB, audio jack, programming header accessible through the enclosure), yes. If it is internal and only accessed during factory assembly, generally no. However, production environments also generate ESD; a TVS on the programming header costs 20 cents and saves a microcontroller that costs 5 euros. For high-volume production, the math is simple: TVS cost vs. scrap rate × MCU cost.


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