Crystal Oscillator Selection Guide: Load Capacitance, Jitter and Drive Level

Every microcontroller needs a clock. Get the crystal wrong and your UART drops bits at temperature extremes, or the oscillator fails to start at all on a cold Monday morning. This guide covers the four parameters that determine whether a quartz crystal works reliably in your design: load capacitance, ESR, drive level, and frequency tolerance over temperature.

Load capacitance: the most common mistake

Crystal manufacturers specify a load capacitance (CL), typically 8, 10, 12, 18 or 20 pF. This is the total capacitance the crystal must see between its two terminals to oscillate at the nominal frequency. It is not the value of the two capacitors you place on the board.

The formula: CL = (C1 × C2) / (C1 + C2) + Cstray, where C1 and C2 are the two external capacitors (usually equal) and Cstray accounts for PCB traces, IC pins and package parasitics, typically 3-5 pF.

For a 12 pF crystal, with Cstray = 4 pF: the effective external capacitance needed is 12 - 4 = 8 pF. Since C1 = C2 in series give half the individual value, each capacitor should be roughly 16 pF. A designer who drops two 12 pF caps and a 12 pF crystal on the board has placed 6 + 4 = 10 pF. The crystal runs slightly fast, perhaps 50-100 ppm off, which translates to 1.6-3.2 seconds of drift per day for a 32.768 kHz RTC crystal.

Always check the IC datasheet. Many MCUs have internal load capacitors (e.g., STM32F4 series: roughly 5 pF on each pin). When the IC includes internal caps, external caps may not be needed at all for low-CL crystals.

ESR and negative resistance

Equivalent series resistance (ESR) is the resistive loss inside the crystal. A typical 16 MHz AT-cut crystal has an ESR of 40-80 Ω. The oscillator circuit must provide enough negative resistance to overcome ESR and sustain oscillation. A rule of thumb: the circuit's negative resistance should be at least 3-5× the crystal's ESR.

Low-frequency crystals (32.768 kHz tuning-fork types) have much higher ESR, often 30-70 kΩ. These are far more sensitive to contamination, moisture and poor layout. Guard rings and clean assembly matter.

Drive level: don't overdrive

Drive level is the power dissipated in the crystal, typically 1-500 µW. Exceeding the rated drive level shortens crystal life and can fracture the quartz blank, especially in tuning-fork crystals rated for 1 µW max.

Many MCU oscillators have a programmable drive strength. The STM32 LSE (low-speed external) oscillator defaults to high drive and can push several µW into a 32.768 kHz crystal rated for 0.5 µW. Reducing the drive in firmware or adding a series resistor (RS) limits current: RS = 1 / (2π × f × CL), which for a 32.768 kHz crystal at CL = 12.5 pF suggests roughly 390 kΩ. Start high and reduce until oscillation starts reliably.

Jitter: phase vs period

For communications and high-speed ADCs, jitter matters more than frequency accuracy.

Period jitter is the cycle-to-cycle variation in clock period. A ±50 ps period jitter on a 100 MHz clock means some cycles are 9.95 ns, others 10.05 ns. This matters for setup/hold timing in synchronous digital logic.

Phase jitter is the integrated phase noise over a frequency band, usually 12 kHz to 20 MHz for common SERDES standards (PCIe, USB 3, SATA). A PCIe Gen 3 reference clock requires < 1 ps RMS phase jitter over that band. Standard crystal oscillators (XO) deliver 0.5-1 ps. If your application demands < 0.3 ps, you need a TCXO (temperature-compensated) or OCXO (oven-controlled).

Stability over temperature

A standard AT-cut crystal holds ±20 to ±50 ppm from -20°C to +70°C. For outdoor or automotive (-40°C to +85°C), spec ±30 ppm or better. If your application uses a USB interface, the USB 2.0 spec requires ±500 ppm; a 50 ppm crystal is fine. For a 10-year battery-powered RTC requiring < 1 minute drift per year, you need a TCXO at ±2 ppm.

FAQ

Q: My oscillator starts sometimes but not reliably. What should I check?

First suspect: insufficient negative resistance margin. Measure with a series resistor: increase resistance until oscillation stops, then verify your operating value is 3-5× lower. Second suspect: soldering residue or flux contamination on a low-frequency crystal. Clean the board and consider conformal coating.

Q: Can I use a ceramic resonator instead of a quartz crystal?

Ceramic resonators are cheaper and start faster but have ±0.5% initial accuracy and poor temperature stability (±0.3% over -20°C to +80°C). Fine for a TV remote or simple timer; useless for any communication interface requiring a precise baud rate.

Q: What is the difference between an XO, TCXO and OCXO?

An XO is a basic crystal oscillator, ±20-50 ppm. A TCXO adds temperature compensation circuitry for ±0.5-2.5 ppm. An OCXO places the crystal in a temperature-controlled oven at a fixed point (usually 75-85°C) for ±0.1-10 ppb stability, used in GPS disciplined oscillators, telecom base stations and test equipment.

For your next design, browse Novapart's crystal and oscillator catalog to filter by frequency, package (HC-49, 5032, 3225, 2016), stability and load capacitance. Need a specific part number from NDK, Epson or TXC? Request a quote with your BOM.