XP4024EYT

**XP4024EYT** 

## **Halogen-Free Product** 

_**N-CHANNEL ENHANCEMENT MODE**_ 

## _**POWER MOSFET**_ 

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D BVDSS 30V<br>R 4.5m Ω<br>DS(ON)<br>G ee ID 20.7A<br>S D<br>D<br>D<br>technology to D<br>fast switching<br>efficient device for<br>S<br>application<br>®<br>heat sink to SS G<br>PMPAK [®]  3 x 3<br>**----- End of picture text -----**<br>


- **Simple Drive Requirement** 

- **Small Size & Lower Profile** 

- **RoHS Compliant & Halogen-Free** 

## **Description** 

XP4024 series are innovated design and silicon process technology to achieve the lowest possible on-resistance and fast switching performance. It provides the designer with an extreme efficient device for use in a wide range of power applications. 

The PMPAK[®] 3x3 package is special for voltage conversion application using standard infrared reflow technique with the backside heat sink to achieve the good thermal performance. 

## **Absolute Maximum Ratings@Tj=25[o] C(unless otherwise specified)** 

|Symbol|Parameter|Rating|Units|
|---|---|---|---|
|VDS|Drain-Source Voltage|30|V|
|VGS|Gate-Source Voltage|+<br>20|V|
|ID@TA=25℃|Drain Current, VGS@ 10V3|20.7|A|
|ID@TA=70℃|Drain Current, VGS@ 10V3|16.5|A|
|IDM|Pulsed Drain Current1|80|A|
|PD@TA=25℃|Total Power Dissipation|3.12|W|
|TSTG|Storage Temperature Range|-55 to 150|℃|
|TJ|OperatingJunction Temperature Range|-55 to 150|℃|



**Thermal Data** Symbol Parameter Value Unit Rthj-c Maximum Thermal Resistance, Junction-case 5 ℃ /W Rthj-a Maximum Thermal Resistance, Junction-ambient[3] 40 ℃ /W ~~————~~ 

**1** 

**202311141YAGEO** 

XP4024EYT 

1 

**XP4024EYT** 

## **Electrical Characteristics@Tj=25[o] C(unless otherwise specified)** 

|Symbol<br>~~a~~|Parameter<br>~~se~~|Test Conditions<br>~~se~~|Min.<br>~~se~~|Typ.<br>~~se~~|Max.<br>~~se~~|Units<br>~~se~~|
|---|---|---|---|---|---|---|
|BVDSS|Drain-Source Breakdown Voltage|VGS=0V, ID=250uA|30|-|-|V|
|RDS(ON)<br>~~eee~~|Static Drain-Source On-Resistance2<br>~~eee~~|VGS=10V, ID=20A<br>~~eee~~|-<br>~~eee~~|3.6<br>~~eee~~|4.5<br>~~eee~~|mΩ<br>~~eee~~|
|||VGS=4.5V, ID=12A<br>~~eee~~|-<br>~~eee~~|5.2<br>~~eee~~|8.5<br>~~eee~~|mΩ<br>~~eee~~|
|VGS(th)|Gate Threshold Voltage|VDS=VGS, ID=250uA|1.2|1.6|2.5|V|
|gfs|Forward Transconductance|VDS=10V, ID=20A|-|70|-|S|
|IDSS<br>~~a a~~|Drain-Source Leakage Current<br>~~a~~|VDS=24V, VGS=0V<br>~~OO~~|-<br>~~OO~~|-<br>~~OO~~|10<br>~~OO~~|uA<br>~~OO~~|
|IGSS<br>~~a~~<br>~~a~~|Gate-Source Leakage<br>~~a~~|VGS=+<br>20V, VDS=0V<br>~~a~~<br>~~CT~~|-<br>~~GOO~~<br>~~CT~~|-<br>~~GOO~~|+<br>30<br>~~GOO~~|uA|
|Qg<br>~~a ~~<br>~~a~~|Total Gate Charge<br> ~~a~~|ID=12A<br>VDS=15V<br>VGS=4.5V<br>~~a~~<br>~~CT~~<br>~~CT~~|-<br>~~GOO~~<br>~~CT~~|15<br>~~GOO~~|24<br>~~GOO~~|nC|
|Qgs<br>~~a~~<br>~~a~~|Gate-Source Charge||-<br>~~CT~~<br>~~Py~~|4<br>~~Py~~|-<br>~~Py~~|nC<br>~~Py~~|
|Qgd<br>~~a~~<br>~~a~~|Gate-Drain("Miller")Charge||-<br>~~Ty~~<br>~~CT~~|7<br>~~Ty~~|-<br>~~Ty~~|nC<br>~~Ty~~|
|td(on)<br>~~a~~<br>~~a~~|Turn-on DelayTime|VDS=15V<br>ID=1A<br>RG=6Ω<br>VGS=10V<br>~~CT~~<br>~~CT~~<br>~~CT~~|-<br>~~CT~~<br>~~CT~~|14|-|ns|
|tr<br>~~a~~<br>~~a~~|Rise Time||-<br>~~CT~~<br>~~CT~~|10|-|ns|
|td(off)<br>~~a~~<br>~~a~~|Turn-off DelayTime||-<br>~~CT~~<br>~~Py~~|33<br>~~Py~~|-<br>~~Py~~|ns<br>~~Py~~|
|tf<br>~~a~~<br>~~a~~|Fall Time||-<br>~~Ty~~<br>~~CT~~|18<br>~~Ty~~|-<br>~~Ty~~|ns<br>~~Ty~~|
|Ciss<br>~~a~~|Input Capacitance|VGS=0V<br>VDS=15V<br>f=1.0MHz<br>~~CT~~|-<br>~~CT~~|1500|2400|pF|
|Coss<br>~~a~~<br>~~a~~|Output Capacitance||-<br>~~CT~~<br>~~pf~~|320<br>~~pf~~|-<br>~~pf~~|pF<br>~~pf~~|
|Crss<br>~~a~~|Reverse Transfer Capacitance||-<br>~~Py~~|210<br>~~Py~~|-<br>~~Py~~|pF<br>~~Py~~|
|Rg<br>~~a OO~~|Gate Resistance<br>~~OO~~|f=1.0MHz<br>~~OO~~|-<br>~~OO~~|1.2<br>~~OO~~|2.4<br>~~OO~~|Ω<br>~~OO~~|



## **Notes:** 

1.Pulse width limited by Max. junction temperature. 

2.Pulse test 

3.Surface mounted on 1 in[2] 2oz copper pad of FR4 board, t <10sec; 210[o] C/W when mounted on min. copper pad. 

THIS PRODUCT IS SENSITIVE TO ELECTROSTATIC DISCHARGE, PLEASE HANDLE WITH CAUTION. 

USE OF THIS PRODUCT AS A CRITICAL COMPONENT IN LIFE SUPPORT OR OTHER SIMILAR SYSTEMS IS NOT AUTHORIZED. XSEMI DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS  PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. XSEMI RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. 

**2** 

XP4024EYT 

2 

**XP4024EYT** 

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160 100<br>T A =25 [o] C 10V T A = 150 [o] C 10V<br>9.0V 9.0V<br>8.0V 80 8.0V<br>120 7.0V 7.0V<br>6.0V 6.0V<br>5.0V 60 5.0V<br>V GS = 4.0V V G S = 4.0V<br>80<br>al 40 an<br>40<br>20<br>0 En) 0 BE<br>0 2 4 6 8 10 0 1 2 3 4<br>V DS  , Drain-to-Source Voltage (V) V DS  , Drain-to-Source Voltage (V)<br>              Fig 1. Typical Output Characteristics               Fig 2. Typical Output Characteristics<br>6 2.0<br>I D = 12 A I D =20A D =20A =20A<br>5.6 T A =25 ℃ V GS  =10V<br>1.6<br>5.2<br>4.8<br>1.2<br>4.4<br>\ ee<br>4<br>0.8<br>3.6<br>3.2 BS 0.4 eMsnaian<br>2 4 6 8 10 -100 -50 0 50 100<br>V GS  , Gate-to-Source Voltage (V) T j  , Junction Temperature ( j  , Junction Temperature (  , Junction Temperature ( [[o]] C)<br>              Fig 3. On-Resistance  v.s. Gate Voltage               Fig 4. Normalized On-Resistance<br>          v.s. Junction Temperature<br>20 2.0<br>I D =250uA D =250uA =250uA<br>16 TEER 1.6<br>12 1.2<br>T j =150 [o] C T j =25 [o] C<br>8 0.8<br>TT<br>4 0.4<br>0 OWE) 0.0 Gee<br>0 0.2 0.4 0.6 0.8 1 1.2 -100 -50 0 50 100<br>V SD  , Source-to-Drain Voltage (V) T j  , Junction Temperature ( j  , Junction Temperature (  , Junction Temperature ( [[o]] C)<br>              Fig 5. Forward Characteristic of               Fig 6. Gate Threshold Voltage v.s.<br>          Reverse Diode<br> , Drain Current (A)ID  , Drain Current (A)ID<br>Ω ) (m DS(ON)<br>DS(ON)<br>R<br>Normalized R<br>GS(th)<br>(A)IS<br>Normalized V<br>**----- End of picture text -----**<br>


**Fig 1. Typical Output Characteristics** 

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2.0<br>I D =20A D =20A =20A<br>V GS  =10V<br>1.6<br>1.2<br>ee<br>0.8<br>0.4 eMsnaian<br>-100 -50 0 50 100 150<br>T j  , Junction Temperature ( j  , Junction Temperature (  , Junction Temperature ( [[o]] C)<br>              Fig 4. Normalized On-Resistance<br>          v.s. Junction Temperature<br>2.0<br>I D =250uA D =250uA =250uA<br>1.6<br>1.2<br>0.8<br>0.4<br>0.0 Gee<br>-100 -50 0 50 100 150<br>T j  , Junction Temperature ( j  , Junction Temperature (  , Junction Temperature ( [[o]] C)<br>              Fig 6. Gate Threshold Voltage v.s.<br>          Junction Temperature<br>DS(ON)<br>Normalized R<br>GS(th)<br>Normalized V<br>**----- End of picture text -----**<br>


**Fig 3. On-Resistance  v.s. Gate Voltage** 

**3** 

XP4024EYT 

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**XP4024EYT** 

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8 2000 f=1.0MHz<br>I D = 12 A<br>V DS =15V<br>1600<br>6 C iss<br>1200<br>4<br>800<br>2<br>400 C  oss<br>C rss<br>0 0 Sa<br>0 8 16 24 32 1 5 9 13 17 21 25 29 33<br>Q G  , Total Gate Charge (nC) G  , Total Gate Charge (nC)  , Total Gate Charge (nC) V DS  , Drain-to-Source Voltage (V)<br>C (pF)<br> , Gate to Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


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0 8 16 24 32 1 5 9 13 17 21 25 29 33 37<br>Q G  , Total Gate Charge (nC) G  , Total Gate Charge (nC)  , Total Gate Charge (nC) V DS  , Drain-to-Source Voltage (V)<br>              Fig 7. Gate Charge Characteristics              Fig 8. Typical Capacitance Characteristics<br>100 SS Sa 1 Ee<br>Duty factor=0.5<br>Operation in this area<br>limited by R DS(ON) b=ANN1p Yu NS TI Tinh| Fri mitchHECemerLearnt<br>0.2<br>10 ed ASMP SSRN 100us Pt Corn aeAC<br>0.1<br>1ms 0.1<br>ZOLLER TIN UNE IUN NE = 0.05 ——T HA<br>10ms<br>1 0.02<br>2E3 PEEEEE2 2 EON 7 TREE EEE a= 0.01 an il<br>-HatHHb-TTTTAMIP TT +44Tat 3rh4tHH aadsoit.IN — NaSY Yarisqatiti 100ms 0.01 » Single Pulse Fe PDM TLL t |<br>0.1 +4 |  +HHI PEt Han I ot Til Nhe al ~ Pitt 1s so ee et le! T au<br>Duty factor = t/T<br>SrIpageplraaogat—-LIttuUuH~-LItUUILE Single  Pulse T A =25 [o] C Latbit udiululbetothestagtbo nogbibl) sd4 foNaraLit DC bid Peak T Rthia=210 j  = P ℃ DM/W  x R thja  + T a<br>| Prt I ot Til | Pill Pitt<br>0.01 0.001<br>0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000<br>V DS  , Drain-to-Source Voltage (V) t , Pulse Width (s)<br>               Fig 9. Maximum Safe Operating Area    Fig 10. Effective Transient Thermal Impedance<br>100 24<br>V DS DS =5V<br>20<br>80<br>16<br>60<br>12<br>40 Bee aee<br>8<br>20 ay T j =150 j =150 =150 [[o]] C<br>T j =25 j =25 =25 [[o]] C 4<br>T j = -40 j = -40 = -40 [[o]] C<br>0 0<br>0 1 2 3 4 5 6 25 50 75 100 125 150<br>V GS  , Gate-to-Source Voltage (V) GS  , Gate-to-Source Voltage (V)  , Gate-to-Source Voltage (V) T A  , Ambient Temperature (  [o] C )<br>)thja<br>(A)<br>ID<br>Normalized Thermal Response (R<br> , Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


## **Fig 7. Gate Charge Characteristics** 

## **Fig 8. Typical Capacitance Characteristics** 

## **Fig 9. Maximum Safe Operating Area** 

**Fig 10. Effective Transient Thermal Impedance** 

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100<br>V DS DS =5V<br>80<br>60<br>40 Bee aee<br>20 ay T j =150 j =150 =150 [[o]] C<br>T j =25 j =25 =25 [[o]] C<br>T j = -40 j = -40 = -40 [[o]] C<br>0<br>0 1 2 3 4 5 6<br>V GS  , Gate-to-Source Voltage (V) GS  , Gate-to-Source Voltage (V)  , Gate-to-Source Voltage (V)<br> , Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig 11. Transfer Characteristics** 

**Fig 12. Drain Current v.s. Ambient Temperature** 

**4** 

XP4024EYT 

4 

**XP4024EYT** 

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YAGEO<br>2 5<br>I D  =1mA<br>1.6 4<br>1.2 a 3 EP<br>papeEeReRe] be<br>0.8 2<br>0.4 1<br>0 TL) 0 PSS<br>-100 -50 0 50 100 150 0 50 100 150<br>T  j  , Junction Temperature ( [o] C) T A , Ambient Temperature( [o] C)<br>              Fig 13. Normalized BVDSS  v.s. JunctionDSS  v.s. Junction  v.s. Junction               Fig 14. Total Power Dissipation<br>            Temperature<br>20<br>T j =25 [o] C<br>16<br>12<br>8<br>4.5V<br>5.0V<br>4 V GS =10V<br>0<br>0 20 40 60 80<br>I D  , Drain Current (A)<br>DSS<br>Normalized BV<br>, Power Dissipation(W)<br>D<br>P<br>Ω )<br>(m<br>DS(ON)<br>R<br>**----- End of picture text -----**<br>


**Fig 13. Normalized BVDSS  v.s. JunctionDSS  v.s. Junction  v.s. Junction Temperature** 

**Fig 15. Typ. Drain-Source on State Resistance** 

**5** 

XP4024EYT 

5 

**XP4024EYT** 

## ~~) lta~~ **MARKING INFORMATION** 

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Part Number<br>4024E<br>YWWSSS<br>Date Code (YWWSSS)<br>          Y ： Last Digit Of  The Year<br>          WW ： Week<br>          SSS ： Sequence<br>**----- End of picture text -----**<br>


**6** 

XP4024EYT 

6 

## **Package  Outline  :  PMPAK 3x3** 

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e b2<br>SYMBOLS Millimeters<br>1<br>c 1 = e ea e = --- MIN NOM MAX<br>A 2.90 3.10 3.40<br>g B 2.20 2.45 2.80<br>e 0.60 0.65 0.70<br>c 2 C c 4 b2 0.20 0.30 0.40<br>C 2.90 3.10 3.40<br>Ty c1 0.10 0.30 0.50<br>| j i ; —}--- c2 1.20 1.70  + — 2.20<br>c 3 it es ee<br>a —}--}-+-— c3 0.10 0.38 0.65<br><—_ B —_><br>D 0.65 0.80 1.05<br>A<br>—__ A1 _ —}--- d1 0.00 0.10 + 0.20 —<br>es E 0.10 0.18 0.25<br>ee<br>BOTTOM VIEW es A1 2.900 3.30 3.600<br>ee<br>es c4 2.900 3.30 3.600<br>ee<br>g 0.20 (ref)<br>d1<br>D<br>.<br>| oh E ee ee<br>**----- End of picture text -----**<br>


1.All Dimension Are In Millimeters. 

2.Dimension Does Not Include Mold Protrusions. 

3. Thermal PAD and Pin contour is for reference, it may has little difference by option. 

Draw No.  M1-YT8-G-v06 

PMPAK-3x3(YT) 

7 

**PMPAK 3X3** 

## **PMPAK3X3  FOOTPRINT ：** 

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Draw No. M1-YT8-G-v06 

1 

PMPAK-3x3(YT) 

8