XP15NA3R9TL

## **XP15NA3R9TL** ~~[fo~~ **Halogen-Free Product** 

## _**N-CHANNEL ENHANCEMENT MODE**_ 

## _**POWER MOSFET**_ 

- **100% Rg & UIS Test** 

**==> picture [73 x 71] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>G<br>S<br>**----- End of picture text -----**<br>


- **Simple Drive Requirement** 

- **Ultra Low On-resistance** 

- **RoHS Compliant & Halogen-Free** 

## **Description** 

XP15NA3R9 series are innovated design and silicon process technology to achieve the lowest possible on-resistance and fast switching performance. It provides the designer with an extreme efficient device for use in a wide range of power applications. 

The TOLL package is a perfect solution for high power density and high power efficiency application. 

**==> picture [130 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
BVDSS 150V<br>RDS(ON) 3.9mΩ<br>D<br>G S TOLL (TL)<br>S S<br>S<br>S<br>S S<br>**----- End of picture text -----**<br>


## **Absolute Maximum Ratings@Tj=25[o] C(unless otherwise specified)** 

|Symbol<br>~~a~~|Parameter|Rating|Units|
|---|---|---|---|
|VDS<br>~~a ~~|Drain-Source Voltage<br> ~~ee~~|150<br>~~ee~~|V<br>~~ee~~|
|VGS<br>~~a~~|Gate-Source Voltage|+<br>20|V|
|ID@TC=25℃<br>~~a~~<br>~~a ~~|Drain Current, VGS@ 10V<br> ~~ee~~|191<br>~~ee~~|A<br>~~ee~~|
|ID@TC=100℃<br>~~a~~|Drain Current, VGS@ 10V|135|A|
|IDM<br>~~a ~~|Pulsed Drain Current1<br> ~~ee~~|760<br>~~ee~~|A<br>~~ee~~|
|PD@TC=25℃<br>~~a~~|Total Power Dissipation|333.3|W|
|PD@TA=25℃<br>~~a ~~|Total Power Dissipation3<br> ~~ee~~|3.75<br>~~ee~~|W<br>~~ee~~|
|EAS<br>~~a~~|Single Pulse Avalanche Energy5|612.5|mJ|
|TSTG<br>~~a ~~|Storage Temperature Range<br> ~~ee~~|-55 to 175<br>~~ee~~|℃<br>~~ee~~|
|TJ<br>~~a~~|OperatingJunction Temperature Range|-55 to 175|℃|



## **Thermal Data** 

|Symbol|Parameter|Value|Units|
|---|---|---|---|
|Rthj-c|Maximum Thermal Resistance,Junction-case|0.45|℃/W|
|Rthj-a|Maximum Thermal Resistance, Junction-ambient(PCB mount)3|40|℃/W|



**1** 

**202401241YAGEO** 

**XP15NA3R9TL** 

## **Electrical Characteristics@Tj=25[o] C(unless otherwise specified)** 

|Symbol<br>~~a ee~~|Parameter<br>~~ee~~|Test Conditions<br>~~ee~~|Min.<br>~~ee~~|Typ.<br>~~ee~~|Max.<br>~~ee~~|Units<br>~~ee~~|
|---|---|---|---|---|---|---|
|BVDSS<br>~~a~~<br>~~a~~|Drain-Source Breakdown Voltage<br>~~a~~<br>~~a~~<br>~~ee~~|VGS=0V, ID=250uA<br>~~a~~|150|-|-|V|
|RDS(ON)<br>~~a~~<br>~~a~~|Static Drain-Source On-Resistance2<br>~~a~~<br>~~ee~~|VGS=10V, ID=50A|-|-|3.9|mΩ|
|VGS(th)<br>~~aa~~|Gate Threshold Voltage<br>~~ee~~<br>~~ee~~|VDS=VGS, ID=250uA|2|-|4|V|
|gfs<br>~~a~~|Forward Transconductance<br>~~ee~~|VDS=5V, ID=50A|-|145|-|S|
|IDSS<br>~~a~~<br>~~a~~|Drain-Source Leakage Current<br>~~ee~~<br>~~a~~<br>~~a~~|VDS=120V, VGS=0V<br>~~a~~|-|-|25|uA|
|IGSS<br>~~a~~|Gate-Source Leakage<br>~~a~~<br>~~a~~|VGS= +<br>20V, VDS=0V<br>~~CO~~|-<br>~~CO~~|-<br>~~CO~~|+<br>0.1<br>~~CO~~|uA<br>~~CO~~|
|Qg<br>~~a~~<br>~~a~~<br>~~a~~|Total Gate Charge4<br>~~a~~<br>~~a ~~|ID=50A<br>VDS=75V<br>VGS=10V<br> ~~CO~~|-<br>~~CO~~<br>~~ee~~<br>~~es~~|200<br>~~CO~~<br>~~ee~~|320<br>~~CO~~<br>~~ee~~|nC<br>~~CO~~<br>~~ee~~|
|Qgs<br>~~a~~<br>~~**a**~~|Gate-Source Charge4||-<br>~~es~~<br>~~es~~|50<br>|-<br>|nC<br>|
|Qgd<br>~~a~~<br>~~**a**~~|Gate-Drain("Miller")Charge4||-<br>~~es~~<br>~~es~~|68<br>|-<br>|nC<br>|
|td(on)<br>~~**a**~~<br><br>~~a~~|Turn-on DelayTime4<br>|VDS=75V<br>ID=50A<br>RG=6Ω<br>VGS=10V<br>~~a~~|-<br>~~esi~~<br>~~es~~|40<br>~~i~~|-<br>~~i~~|ns<br>~~i~~|
|tr<br>~~a~~<br>~~a~~<br>~~a~~|Rise Time4<br>~~a~~||-<br>~~aes~~<br>~~**e**s~~|126|-|ns|
|td(off)<br><br>~~a~~<br>~~a~~|Turn-off DelayTime4<br>||-<br>~~es~~<br>~~**e**s~~|140|-|ns|
|tf<br>~~a~~|Fall Time4||-<br>~~**e**s~~|160<br>~~e~~|-<br>~~e~~|ns<br>~~e~~|
|Ciss<br>~~ai~~<br><br>~~a~~|Input Capacitance4<br>~~ai~~<br>|VGS=0V<br>VDS=100V<br>f=1.0MHz<br>~~ai~~<br>~~a~~|-<br>~~ai~~<br>~~**e**s~~|9900 <br>~~ai~~|15840<br>~~ai~~|pF<br>~~ai~~|
|Coss<br>~~a~~<br>~~a~~|Output Capacitance4<br>~~a~~||-<br>~~a~~~~**e**s~~|690|-|pF|
|Crss<br><br>~~a~~|Reverse Transfer Capacitance4<br>||-<br>~~**e**s~~|20<br>~~e~~|-<br>~~e~~|pF<br>~~e~~|
|Rg<br>~~a~~|Gate Resistance<br>~~a~~|f=1.0MHz|-|0.7|2|Ω|



## **Notes:** 

- 1.Pulse width limited by Max. junction temperature. 

- 2.Pulse test 

- 3.Surface mounted on 1 in[2] copper pad of FR4 board 

- 4.Guaranteed by design. 

- 5.Starting Tj=25[o] C , VDD=50V , L=1mH , RG=25 Ω , VGS=10V , IAS=35A 

- 6.These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=175[o] C. 

THIS PRODUCT IS SENSITIVE TO ELECTROSTATIC DISCHARGE, PLEASE HANDLE WITH CAUTION. 

USE OF THIS PRODUCT AS A CRITICAL COMPONENT IN LIFE SUPPORT, AUTOMOTIVE OR OTHER SIMILAR SYSTEMS IS NOT AUTHORIZED. XSEMI DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS  PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. XSEMI RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. 

**2** 

**XP15NA3R9TL** 

**==> picture [187 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
600<br>T C  =25 [o] C 10V<br>9.0V<br>500 8.0V<br>7.0V<br>400<br>V GS =6.0V<br>300<br>200<br>100<br>0<br>0 4 8 12 16 20<br>V DS  , Drain-to-Source Voltage (V)<br> , Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig 1. Typical Output Characteristics** 

**==> picture [188 x 389] intentionally omitted <==**

**----- Start of picture text -----**<br>
9<br>I D =50A<br>8 T C =25 [o] C<br>7<br>6<br>5<br>4<br>3<br>4 5 6 7 8 9 10<br>V GS  Gate-to-Source Voltage (V)<br>             Fig 3. On-Resistance  v.s. Gate Voltage<br>100<br>10<br>T j =175 [o] C T j =25 [o] C<br>1<br>0.1<br>0 0.2 0.4 0.6 0.8 1 1.2<br>V SD  , Source-to-Drain Voltage (V)<br>Ω )<br> (m<br>DS(ON)<br>R<br>(A)IS<br>**----- End of picture text -----**<br>


**Fig 3. On-Resistance  v.s. Gate Voltage** 

**Fig 5. Forward Characteristic of Reverse Diode** 

**==> picture [190 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
180<br>10V<br>T C  =175 [o] C 9.0V<br>150 8.0V<br>7.0V<br>120 V GS =6.0V<br>90<br>60<br>30<br>0<br>0 2 4 6 8<br>V DS  , Drain-to-Source Voltage (V)<br> , Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig 2. Typical Output Characteristics** 

**==> picture [191 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.8<br>I D =50A<br>2.4 V GS =10V<br>2<br>1.6<br>1.2<br>0.8<br>0.4<br>-100 -50 0 50 100 150 200<br>T j  , Junction Temperature ( [o] C)<br>DS(ON)<br>Normalized R<br>**----- End of picture text -----**<br>


**Fig 4. Normalized On-Resistance** 

**v.s. Junction Temperature** 

**==> picture [190 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
2<br>I D =1mA<br>1.6<br>1.2<br>0.8<br>0.4<br>0<br>-100 -50 0 50 100 150 200<br>T j  ,Junction Temperature (  [o] C)<br>GS(th)<br>Normalized V<br>**----- End of picture text -----**<br>


**Fig 6. Gate Threshold Voltage v.s.** 

**Junction Temperature** 

**3** 

**XP15NA3R9TL** 

**==> picture [190 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
12<br>I D =50A<br>10 V DS =75V<br>8<br>6<br>4<br>2<br>0<br>0 40 80 120 160 200 240<br>Q G  , Total Gate Charge (nC)<br> , Gate to Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


## **Fig 7. Gate Charge Characteristics** 

**==> picture [190 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>=SrnrErr sy =<br>Operation in this area<br>limited by RDS(ON) L “1st \ \<br>\ \ \<br>SON \ \<br>100 f 7 NOX Wane ~ N\ 10us<br>7 NUN ~<br>7 KNOX AN<br>7 NOX aN<br>/ \ ON 100us<br>7 \ OX<br>10 Nas<br>yas\ 1ms<br>T C =25 [o] C 10ms<br>Single Pulse DC<br>1<br>0.1 1 10 100 1000<br>V DS  , Drain-to-Source Voltage (V)<br>(A)<br>ID<br>**----- End of picture text -----**<br>


**Fig 9. Maximum Safe Operating Area[6]** 

**==> picture [189 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
200<br>160<br>120<br>80<br>40<br>0<br>25 75 125 175<br>T C  , Case Temperature (  [o] C )<br> , Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig 11. Drain Current v.s. Case Temperature** 

**==> picture [194 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
f=1.0MHz<br>16000<br>12000<br>C  iss<br>8000<br>4000<br>C  oss<br>0 C rss<br>0 40 80 120 160 200<br>V DS   ,Drain-to-Source Voltage (V)<br>C (pF)<br>**----- End of picture text -----**<br>


**Fig 8. Typical Capacitance Characteristics** 

**==> picture [190 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>Duty factor=0.5<br>0.2 y<br>0.1<br>0.1<br>0.05<br>0.02<br>c- 0.01 PDM<br>t<br>i] Single Pulse Da) T<br>x1<br>Duty factor = t/T<br>Peak Tj = PDM x Rthjc + TC<br>0.01<br>0.00001 0.0001 0.001 0.01 0.1 1<br>t , Pulse Width (s)<br>)thjc<br>Normalized Thermal Response (R<br>**----- End of picture text -----**<br>


**Fig 10. Effective Transient Thermal Impedance** 

**==> picture [190 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
210<br>V  DS  =5V<br>180<br>150<br>120<br>90<br>60<br>T j =175 [o] C<br>30 T  j =25 [o] C<br>T  j = -55 [o] C<br>0<br>0 2 4 6 8 10<br>V GS , Gate-to-Source Voltage (V)<br> , Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig 12. Transfer Characteristics** 

**4** 

**XP15NA3R9TL** 

**==> picture [191 x 391] intentionally omitted <==**

**----- Start of picture text -----**<br>
50<br>T j =25 [o] C<br>40<br>30<br>20<br>10<br>V GS =10V<br>0<br>0 40 80 120<br>I D  , Drain Current (A)<br>              Fig 13. Typ. Drain-Source on State<br>            Resistance<br>2<br>I D =10mA<br>1.6<br>1.2<br>0.8<br>0.4<br>0<br>-100 -50 0 50 100 150 200<br>T  j  , Junction Temperature ( [o] C)<br>Ω )<br>(m<br>DS(ON)<br>R<br>DSS<br>Normalized BV<br>**----- End of picture text -----**<br>


**Fig 13. Typ. Drain-Source on State Resistance** 

**==> picture [186 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
400<br>300<br>200<br>100<br>0<br>0 25 50 75 100 125 150 175<br>T C , Case Temperature( [o] C)<br>, Power Dissipation(W)<br>D<br>P<br>**----- End of picture text -----**<br>


**Fig 14. Total Power Dissipation** 

**Fig 15. Normalized BVDSS  v.s. Junction** 

**Temperature** 

**5** 

**XP15NA3R9TL** 

## **MARKING INFORMATION** 

Part Number **15NA3R9 YWWSSS** Date Code (YWWSSS) Y ： Last Digit Of  The Year WW ： Week SSS ： Sequence 

**6** 

## **Packa e  Outline  :  TOLL g** 

**==> picture [529 x 274] intentionally omitted <==**

**----- Start of picture text -----**<br>
SYMBOLS MIN NOM MAX<br>E E1<br>L1 A 2.20 2.30 2.40<br>b1<br>b 0.70 0.80 0.90<br>b1 9.70 9.80 9.90<br>c 0.40 0.50 0.60<br>H1<br>D 10.28 10.38 10.58<br>E 9.70 9.90 10.10<br>D H<br>1+ tJ f [===———— E1 7.90 8.70 9.50<br>e 1.20BCS<br>H 11.48 11.68 11.88<br>1 L H1 6.75 - 7.43<br>| ——<br>apogee Papaaaath—t p—p——— L 1.40 1.90 2.10<br>e 8x b L2 L1 0.60 0.70 0.80<br>BACKSIDE VIEW<br>=———— L2 0.50 0.60 0.70<br>α α 10° REF.<br>A<br>c .<br>**----- End of picture text -----**<br>


1.All dimension are in millimeters. 

2.Dimension does not include burrs and mold flash/protrusions. 

3.The outline schematic is not to scale and slightly different from the actual product appearance. 

Draw No.  M1-TL-8-EFIM-G-V04 

**TOLL** 

## **TOLL FOOTPRINT** ： 

## | ~~—~~ **.** 

Draw No.  M1-TL-8-EFIM-G-V04