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XAH335006.005284K
Oscillator, 6.005284MHz, 50ppm, SMD, 3.2mm x 2.5mm, 3.3V Supply, HCMOS Out, XA Series
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- Manufacturer: RENESAS
- Product type: Standard Oscillators
- Frequency Nom:6.005284MHz; Frequency Stability + / -:50ppm; Oscillator Case:SMD, 3.2mm x 2.5mm; Supply Voltage Nom:3.3V; Product Range:XA Series; Operating Temperature Min:-40°C;
- SVHC: No SVHC (25-Jun-2025)
- Frequency Nom: 6.005284MHz
- Product Range: XA
- Supply Voltage Nom: 3.3V
- Frequency Stability + / -: 50ppm
- Operating Temperature Max: 105°C
- Operating Temperature Min: -40°C
- Oscillator Case / Package: SMD, 3.2mm x 2.5mm
- Oscillator Output Compatibility: HCMOS
| Delivery and price | |
|---|---|
| Units per pack | 2000 |
| Price | 1.17 € |
| Current stock | 500+ |
| Lead time | 7 days |
Datasheet
XA Family of Low Phase Noise XA Quartz-based PLL Oscillators Datasheet ## Description The Renesas XA devices are ultra-precision crystal oscillators with 750 to 890fs typical phase jitter over 12kHz to 20MHz bandwidth. Available in a wide frequency range from 0.750MHz to 1350MHz, the XA series crystal oscillators utilize a family of proprietary ASICs, with a key focus on noise reduction technologies. The 3rd order Delta Sigma Modulator reduces noise to the levels that are comparable to traditional Bulk Quartz and SAW oscillators. With short lead-time, low cost, low noise, wide frequency range, excellent ambient performance, the XA devices are an excellent choice over the conventional technologies. The XA devices have stabilities as tight as ±25ppm with extremely quick delivery for both standard and custom frequencies. ## Features - **Conforms to AEC-Q200** - Frequency range: 0.750MHz to 1350MHz - Output types: LVDS, LVPECL, LVCMOS - Frequency stability: ±25, ±50, or ±100 ppm - Supply voltage: 2.5V or 3.3V - Phase jitter (12kHz to 20MHz): 750fs to 890fs typical - Package options: - 3.2 × 2.5 × 1.0 mm - 5.0 × 3.2 × 1.2 mm - Operating temperature: -40°C to +85°C (Grade 3) - Frequency stability options: ±25, ±50, or ±100 ppm - Operating temperature: -40°C to +105°C (Grade 2) ## Pin Assignments - Frequency stability options: ±50 or ±100 ppm **NOTE** : To minimize power supply line noise, a 0.01μF bypass capacitor should be placed between VDD (Pin 6) and GND (Pin 3). **==> picture [87 x 119] intentionally omitted <==** **----- Start of picture text -----**<br> 6 5 4<br>1 2 3<br>VDD OUT2 OUT<br>E/D NC GND<br>**----- End of picture text -----**<br> Table 1. Pin Description |**Pin #**|**Pin Name**|**Description**| |---|---|---| |1|E/D|Enable/Disable[a][b]| |2|NC|No connect| |3|GND|Connect to ground| |4|OUT|Output| |5|OUT2|Complementary output[c]| |6|VDD|Supply voltage| - [a] Pulled high internally. - [b] Low = output disabled. - [c] Do not connect for LVCMOS. For XLVCMOS both OUT and OUT2 are ON and in opposite phase. See Ordering Information for more details. ©2018-2023 Renesas Electronics Corporation 1 August 20, 2023 XA Datasheet ## Ordering Information **==> picture [539 x 325] intentionally omitted <==** **----- Start of picture text -----**<br> XA L 5 3 5 125.000000 I<br>Family and ASIC Output Type Package Voltage Precision Frequency Temperature Range<br>2: 2.5 VDC ±5% I: Industrial range: ‐ 40 to +85 °C (Grade 3)<br>3: 3.3 VDC ±5% K: Extended range : ‐40 to +105 °C (Grade 2)<br>See table below for more details.<br>3: 3.2 x 2.5 mm<br> 5: 5.0 x 3.2 mm<br>125.000000 listed in MHz as example<br>3 digits before decimal and 6 digits after decimal<br> H: LVCMOS Enable/Disable Pin 1<br>000.750000 to 000.999999 75kHz to 999.999kHz<br>L: LVDS Enable/Disable Pin 1<br>001.000000 to 009.999999 1MHz to 9.999999MHz<br> P: LVPECL Enable/Disable Pin 1<br>010.000000 to 099.999999 10MHz to 99.999999MHz<br> X: XLVCMOS Comp HCMOS Enable/Disable Pin 1*<br>100.000000 to 999.999999 100MHz to 999.999999MHz<br>* XLVCMOS: Complimentary HCMOS where both<br>outputs are ON and in opposite phase.<br>A00.000000 to A99.999999 1000MHz to 1099.999MHz<br>B00.000000 to B99.999999 1100MHz to 1199.999MHz<br>XA: 1,000 fs jitter<br>C00.000000 to C99.999999 1200MHz to 1299.999MHz<br>D00.000000 to D50.000000 1300MHz to 1350MHz<br> 0: ±100ppm<br> 5: ±50ppm<br>6: ±25ppm<br>See table below for more details.<br>**----- End of picture text -----**<br> Table 2. Frequency Stability and Operating Temperature Decoder |**“Precision” and “Temperature Range” Codes**|**Operating Temperature**|**Frequency Stability**|**Frequency Stability**|**Frequency Stability**| |---|---|---|---|---| |||**Minimum**|**Maximum**|**Units**| |“6” and “I”|-40°C to +85°C|-25|+25|ppm| |“5” and “I”|-40°C to +85°C|-50|+50|ppm| |“0” and “I”|-40°C to +85°C|-100|+100|ppm| |“5” and “K”|-40° to +105°C|-50|+50|ppm| |“0” and “K”|-40° to +105°C|-100|+100|ppm| ©2023 Renesas Electronics Corporation 2 August 20, 2023 XA Datasheet ## Contents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~~.~~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 ESD Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Mechanical Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Solder Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Output Waveforms – LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Output Waveforms – LVPECL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Output Waveforms – LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package Outline Drawings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Marking Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ©2023 Renesas Electronics Corporation 3 August 20, 2023 XA Datasheet ## Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the device. These ratings, which are standard values for Renesas commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure t ~~o~~ absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Table 3. Absolute Maximum Ratings |**Item**||**Rating**|**Rating**|| |---|---|---|---|---| |VDD|-0.5 to +5.0V|||| |E/D|-0.5V to VDD+ 0.5V|||| |OUT|-0.5V to VDD+ 0.5V|||| |Storage Temperature|-55°C to 125°C|||| |Maximum Junction Temperature|125°C|||| |Core Current|65mA maximum|||| |Theta JA|JS6<br>5.0 × 3.2 × 1.2 mm|89.6 °C/W|JX6<br>3.2 × 2.5 × 1.0 mm|94.7 °C/W| |Theta JB||54.3 °C/W||66.8 °C/W| ## ESD Compliance |ESD Compliance|| |---|---| |Human Body Model (HBM)|1000V| |Machine Model (MM)|150V| ## Mechanical Testing |**Parameter**|**Test Method**| |---|---| |Mechanical Shock|Drop from 75cm to hardwood surface–3 times.| |Mechanical Vibration|10–55Hz, 1.5mm amplitude, 1 minute sweep; 2 hours each in 3 directions (X, Y, Z).| |High Temperature Burn-in|Under power at 125°C for 2000 hours.| |Hermetic Seal|He pressure: 4 ±1kgf/cm22 hour soak.| ## Solder Reflow Profile **==> picture [396 x 162] intentionally omitted <==** **----- Start of picture text -----**<br> tP 10 seconds Max within<br>5°C of 260°C peak<br>260°C<br>Ramp up 3°C/s Max<br>225°C Ramp down not<br>180°C seconds 50 ±10 to exceed 6°C/s<br>above 225°C<br>reflow area<br>160°C 120 ±20 seconds<br>in pre-heating<br>area<br>25°C<br>400 seconds MAX from +25°C to 260°C peak<br>**----- End of picture text -----**<br> ©2023 Renesas Electronics Corporation August 20, 2023 4 XA Datasheet ## DC Electrical Characteristics ## Table 4. 3.3V IDD DC Electrical Characteristics VDD = 3.3V ±5%, TA = -40°C to +85°C, -40°C to +105°C. |**Symbol**|**Parameter**|**Output Type**|**Conditions**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |IDD|Power Supply Current|LVDS|—|—|—|100|mA| |||LVPECL|—|—|—|120|| |||LVCMOS|0.75MHz to 20MHz.<br>20+MHz to 50MHz.<br>50+MHz to 130MHz.<br>130+MHz to 200MHz.<br>200+MHz to 250MHz.|—|—|32|| |||||—|—|35|| |||||—|—|47|| |||||—|—|55|| |||||—|—|60|| ## Table 5. 2.5V IDD DC Electrical Characteristics VDD = 2.5V ±5%, TA = -40°C to +85°C, -40°C to +105°C. |**Symbol**|**Parameter**|**Output Type**|**Conditions**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |IDD|Power Supply Current|LVDS|0.75MHz to 20MHz.|—|—|26|mA| ||||20+MHz to 220MHz.|—|—|34|| ||||220+MHz to 630MHz.|—|—|44|| ||||630+MHz to 1000MHz.|—|—|65|| |||LVPECL|0.75MHz to 20MHz.|—|—|33|| ||||20+MHz to 220MHz.|—|—|41|| ||||220+MHz to 630MHz.|—|—|63|| ||||630+MHz to 1000MHz.|—|—|72|| |||LVCMOS|0.75MHz to 20MHz.|—|—|22|| ||||20+MHz to 50MHz.|—|—|25|| ||||50+MHz to 100MHz.|—|—|29|| ||||100+MHz to 130MHz.|—|—|32|| ||||130+MHz to 160MHz.|—|—|35|| ||||160+MHz to 180MHz.|—|—|37|| ©2023 Renesas Electronics Corporation August 20, 2023 5 XA Datasheet ## Table 6. LVDS DC Electrical Characteristics VDD = 3.3V, 2.5V ±5%, TA = -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard frequencies. |**Symbol**|**Parameter**|**Conditions**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---| |VOD|Differential Output Voltage|VDD= 3.3V ±5%.|—|—|0.6|V| |||VDD= 2.5V ±5%.|—|—|0.4|| |VOS|Output Offset Voltage|VDD= 3.3V ±5%.|—|—|1.3|| |||VDD= 2.5V ±5%.|—|—|1.25|| |VIH|Enable/Disable Input High Voltage (Output enabled)|—|70% VDD|—|—|| |VIL|Enable/Disable Input Low Voltage (Output disabled)|—|—|—|30% VDD|| ## Table 7. LVPECL DC Electrical Characteristics VDD = 3.3V, 2.5V ±5%, TA = -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard frequencies. |**Symbol**|**Parameter**|**Conditions**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---| |VOD|Differential Output Voltage|VDD= 3.3V ±5%.|2.055||2.405|V| |||VDD= 2.5V ±5%.|—|1.4|—|| |VOS|Output Offset Voltage|VDD= 3.3V ±5%.|1.305||1.65|| |||VDD= 2.5V ±5%.|—|0.68|—|| |VIH|Enable/Disable Input High Voltage (Output enabled)|—|70% VDD|—|—|| |VIL|Enable/Disable Input Low Voltage (Output disabled)|—|—|—|30% VDD|| ## Table 8. LVCMOS DC Electrical Characteristics VDD = 3.3V, 2.5V ±5%, TA = -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard frequencies. |**Symbol**|**Parameter**|**Conditions**|**Conditions**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |VOH|Output High Voltage|VDD= 3.3V ±5%.|0.75MHz to 150MHz.|90% VDD|—|—|V| ||||150+MHz to 250MHz.|80% VDD|—|—|| |||VDD= 2.5V ±5%.|0.75MHz to 160MHz.|90% VDD|—|—|| ||||160+MHz to 180MHz.|80% VDD|—|—|| |VOL|Output Low Voltage|VDD= 3.3V ±5%.|0.75MHz to 150MHz.|—|—|10% VDD|| ||||150+MHz to 250MHz.|—|—|20% VDD|| |||VDD= 2.5V ±5%.|0.75MHz to 160MHz.|—|—|10% VDD|| ||||160+MHz to 180MHz.|—|—|20% VDD|| |VIH|Enable/Disable Input High Voltage<br>(Output enabled)|—|—|70% VDD|—|—|| |VIL|Enable/Disable Input Low Voltage<br>(Output disabled)|—|—|—|—|30% VDD|| ©2023 Renesas Electronics Corporation 6 August 20, 2023 XA Datasheet ## AC Electrical Characteristics ## Table 9. 3.3V AC Electrical Characteristics VDD = 3.3V ±5%, TA = -40°C to +85°C, -40°C to +105°C. |**Symbol**|**Parameter**|**Test Condition**|**Test Condition**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |F|Output Frequency Range|LVDS.||0.75|—|1350|MHz| |||LVPECL.||0.75|—|1350|| |||LVCMOS.||0.75|—|250|| ||Frequency Stability|Temperature = -40°C to +85°C.||-25<br>-50<br>-100|—|+25<br>+50<br>+100|ppm| |||Temperature = -40°C to +105°C.||-50<br>-100|—|+50<br>+100|ppm| ||Output Load|LVDS.|Differential.|—|100|—|Ω| |||LVPECL.|VDD- 2.0V.|—|50|—|| |||LVCMOS.|To GND.|—|15|—|pF| |TST|Start-up Time|Output valid time after VDDmeets minimum<br>specified level.||—|—|10|ms| |tR|Output Rise Time|LVDS.|20% to 80% Vpp.|—|—|400|ps| |||LVPECL.||—|—|400|| |||LVCMOS.|10% to 90% VDD.|—|—|3|ns| |tF|Output Fall Time|LVDS.|80% to 20% Vpp.|—|—|400|ps| |||LVPECL.||—|—|400|| |||LVCMOS.|90% to 10% VDD.|—|—|3|ns| |ODC|Output Clock Duty Cycle|LVDS.||45|—|55|%| |||LVPECL.||45|—|55|| |||LVCMOS.|FOUT<<br>62.5MHz.|45|—|55|| ||||FOUT><br>62.5MHz.|40|—|60|| |TOE|Output Enable/ Disable Time||—|—|—|100|ns| |JPER|Period Jitter, RMS|LVDS.||—|3|—|ps| |||LVPECL.||—|5.8|—|| |||LVCMOS.|FOUT= 125MHz.|—|5|—|| |RJ|Random Jitter|LVDS.||—|1.3|—|ps| |||LVPECL.||—|1.29|—|| |||LVCMOS.|FOUT= 125MHz.|—|0.6|—|| |DJ|Deterministic Jitter|LVDS.||—|5.8|—|ps| |||LVPECL.||—|9.3|—|| |||LVCMOS.|FOUT= 125MHz.|—|10|—|| ©2023 Renesas Electronics Corporation August 20, 2023 7 XA Datasheet ## Table 9. 3.3V AC Electrical Characteristics (Cont.) VDD = 3.3V ±5%, TA = -40°C to +85°C, -40°C to +105°C. |**Symbol**|**Parameter**|**Test Condition**|**Test Condition**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |TJ|Total Jitter|LVDS.||—|23.6|—|ps| |||LVPECL.||—|27.7|—|| |||LVCMOS.|FOUT= 125MHz.|—|19|—|| |fJITTER|Phase Jitter (12kHz–20MHz)|LVDS.||—|890|—|fs| |||LVPECL.||—|860|—|| |||LVCMOS.|FOUT= 125MHz.|—|750|—|| ## Table 10. 2.5V AC Electrical Characteristics VDD = 2.5V ±5%, TA = -40°C to +85°C, -40°C to +105°C. |**Symbol**|**Parameter**|**Test Condition**|**Test Condition**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |F|Output Frequency Range|LVDS.||0.75|—|1000|MHz| |||LVPECL.||0.75|—|1000|| |||LVCMOS.||0.75|—|180|| ||Frequency Stability|Temperature = -40°C to +85°C.||-25<br>-50<br>-100|—|+25<br>+50<br>+100|ppm| |||Temperature = -40°C to +105°C.||-50<br>-100|—|+50<br>+100|ppm| ||Output Load|LVDS.|Differential.|—|100|—|Ω| |||LVPECL.|VDD- 2.0V.|—|50|—|| |||LVCMOS.|To GND.|—|15|—|pF| |TST|Start-up Time|Output valid time after VDDmeets minimum<br>specified level.||—|—|10|ms| |tR|Output Rise Time|LVDS.|20% to 80% Vpp.|—|—|400|ps| |||LVPECL.||—|—|400|| |||LVCMOS.|10% to 90% VDD.|—|—|3.5|ns| |tF|Output Fall Time|LVDS.|80% to 20% Vpp.|—|—|400|ps| |||LVPECL.||—|—|400|| |||LVCMOS.|90% to 10% VDD.|—|—|3|ns| |ODC|Output Clock Duty Cycle|LVDS.||45|—|55|%| |||LVPECL.||45|—|55|| |||LVCMOS.||45|—|55|| |TOE|Output Enable/ Disable Time|—||—|—|100|ns| ©2023 Renesas Electronics Corporation 8 August 20, 2023 XA Datasheet ## Table 10. 2.5V AC Electrical Characteristics (Cont.) VDD = 2.5V ±5%, TA = -40°C to +85°C, -40°C to +105°C. |**Symbol**|**Parameter**|**Test Condition**|**Test Condition**|**Minimum**|**Typical**|**Maximum**|**Units**| |---|---|---|---|---|---|---|---| |JPER|Period Jitter, RMS|LVDS.||—|4|—|ps| |||LVPECL.||—|5.12|—|| |||LVCMOS.|FOUT= 125MHz.|—|3.3|—|| |RJ|Random Jitter|LVDS.||—|1.4|—|ps| |||LVPECL.||—|1.36|—|| |||LVCMOS.|FOUT= 125MHz.|—|1.3|—|| |DJ|Deterministic Jitter|LVDS.||—|9.2|—|ps| |||LVPECL.||—|10|—|| |||LVCMOS.|FOUT= 125MHz.|—|6.7|—|| |TJ|Total Jitter|LVDS.||—|29.2|—|ps| |||LVPECL.||—|29.3|—|| |||LVCMOS.|FOUT= 125MHz.|—|25.6|—|| |fJITTER|Phase Jitter (12kHz–20MHz)|LVDS.||—|1040|—|fs| |||LVPECL.||—|1200|—|| |||LVCMOS.|FOUT= 125MHz.|—|850|—|| ## Notes for all AC Electrical Characteristics tables: 1 All jitter values provided at 156.25MHz, unless noted otherwise. 2 Stability is inclusive of 25°C tolerance, operating temperature range, input voltage change, load change, aging, shock and vibration. ©2023 Renesas Electronics Corporation 9 August 20, 2023 XA Datasheet ## Output Waveforms – LVDS ## **Output Levels/Rise Time/Fall Time Measurements** **==> picture [406 x 271] intentionally omitted <==** **----- Start of picture text -----**<br> TR TF<br>OUTPUT 2<br>20% to 80% VPP 50% VPP VOS VOD<br>OUTPUT 1<br>Oscillator Symmetry<br>Ideally, Symmetry should be 50/50 for ½ period –Other expressions are 45/55 or 55/45<br>OUTPUT 2 VOH<br>50% VPP<br>OUTPUT 1 VOL<br>½ Period<br>Period<br>**----- End of picture text -----**<br> ## Output Waveforms – LVPECL ## **Rise Time/Fall Time Measurements** **==> picture [346 x 253] intentionally omitted <==** **----- Start of picture text -----**<br> TR TF<br>OUTPUT 2 VOH<br>20% to 80% VPP<br>OUTPUT 1 VOL<br>Oscillator Symmetry<br>OUTPUT 2 VOH<br>50% VPP<br>OUTPUT 1 VOL<br>½ Period<br>Period<br>**----- End of picture text -----**<br> ©2023 Renesas Electronics Corporation 10 August 20, 2023 XA Datasheet ## Output Waveforms – LVCMOS ©2023 Renesas Electronics Corporation 11 August 20, 2023 XA Datasheet ## Package Outline Drawings The package outline drawings (JS6, JX6) are appended at the end of this document. The package information is the most current data available. ## Marking Diagrams ## **JX6 3.2 × 2.5 mm Package Option** (example based on XLH320010.000000I) - Line 1: - “010” denotes last three digits to the left of the decimal point as shown in the above example. This number will vary depending upon the frequency value selected in the orderable part number. - “YW” denotes the last digit of the year and work week the part was assembled. ## **JS6 5.0 × 3.2 mm Package Option** (example based on XLH536210.380000I) ## ▪ Line 1: - “XL” = family; “H” = output type; “5” = package size; “3” = voltage; “6” = precision level. This number will vary depending upon the output type, voltage, and precision values selected in the orderable part number. - Line 2: - “210” denotes last three digits to the left of the decimal point as shown in the above example. This number will vary depending upon the frequency value selected in the orderable part number. - “YW” denotes the last digit of the year and work week the part was assembled. ## Revision History |**Revision Date**|**Description of Change**| |---|---| |August 20, 2023|Added “X” option to Output Type inOrdering Information| |January 11, 2022|▪Removed Aging parameters inTable 9andTable 10.<br>▪Added footnote 2 afterTable 10.| |December 1, 2021|Updated Frequency Stability values inTable 9andTable 10.| |November 23, 2021|AddedFrequency Stability and Operating Temperature Decodertable after Ordering Information.| |August 18, 2021|Moved Ordering Information table to just after Pin Descriptions.| |January 15, 2021|▪Removed 4-pin package description table, figure, and package drawing references.<br>▪Added footnote for pin 5 in Table 1.<br>▪Updated “H:” description under “Output Type” in Ordering Information.| |January 13, 2021|Added Marking Diagrams section and updated Package Outline Drawings links.| |May 24, 2018|Updated LVCMOS Output Clock Duty Cycle, FOUT test condition.| |April 27, 2018|Initial release.| ©2023 Renesas Electronics Corporation 12 August 20, 2023 **==> picture [32 x 129] intentionally omitted <==** **==> picture [82 x 59] intentionally omitted <==** **==> picture [540 x 775] intentionally omitted <==** ## **IMPORTANT NOTICE AND DISCLAIMER** RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD-PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers who are designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only to develop an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third-party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising from your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Disclaimer Rev.1.01) ## **Corporate Headquarters** TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com ## **Contact Information** For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit www.renesas.com/contact-us/. ## **Trademarks** Renesas and the Renesas logo are trademarks of Renesas ~~Electronics Corporation. All trademarks and registered~~ trademarks are the property of their respective owners. © 2026 Renesas Electronics Corporation. All rights reserved.
Updated at March 11, 2026
Renesas Electronics is a premier global supplier of advanced semiconductor solutions, driving innovation across automotive, industrial, infrastructure, and Internet of Things (IoT) applications. Recognized for a comprehensive portfolio that spans the entire signal chain, Renesas empowers engineers to design secure, intelligent, and highly efficient embedded systems for a rapidly evolving technological landscape. Our selection of Renesas components features a strong emphasis on precision timing and frequency management solutions. We offer a robust range of standard oscillators, timers, and pulse generators engineered to deliver exceptional accuracy and stability. These reliable clocking devices are essential for synchronizing complex digital operations and ensuring optimal performance in demanding circuit designs. In addition to timing components, our inventory includes essential discrete semiconductors and interface solutions. This encompasses high-performance single MOSFETs and bipolar transistors for efficient power routing, alongside versatile I/O expanders that simplify system connectivity. To support modern wireless integration, we also provide select Renesas RF transceivers, WLAN adaptors, and Bluetooth modules, equipping developers with the critical building blocks needed for advanced communication systems.
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