VN10KN3-G
Power MOSFET, N Channel, 60 V, 310 mA, 5 ohm, TO-92, Through Hole
- Manufacturer: MICROCHIP
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:310mA; Drain Source Voltage Vds:60V; On Resistance Rds(on):5ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.5V; Power
- MSL: -
- SVHC: No SVHC (04-Feb-2026)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 1W
- Transistor Mounting: Through Hole
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-92
- Drain Source Voltage Vds: 60V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 310mA
- Drain Source On State Resistance: 5ohm
- Gate Source Threshold Voltage Max: 2.5V
| Delivery and price | |
|---|---|
| Units per pack | 1000 |
| Price | 0.347 € |
| Current stock | 1000+ |
| Lead time | 30 days |
_**Su ertex inc. p**_ **VN10K** - **N-Channel Enhancement-Mode** - ~~—~~ **Vertical DMOS FET Features General Description** ► Free from secondary breakdown This enhancement-mode (normally-off) transistor utilizes ## **Features** This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. - Low power drive requirement - Ease of paralleling - Low CISS and fast switching speeds - Excellent thermal stability - Integral source-drain diode - High input impedance and high gain ## **Applications** - Motor controls Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. - Converters - Amplifiers - Switches - Power supply circuits - Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) **Ordering Information Product Summary Part Number Package Option Packing BV /BV RDS(ON) IDSS DSS DGS** VN10KN3-G TO-92 1000/Bag **(max) (min)** VN10KN3-G P002 60V 5.0Ω 750mA VN10KN3-G P003 VN10KN3-G P005 TO-92 2000/Reel **Pin Configuration** VN10KN3-G P013 VN10KN3-G P014 ~~=f~~ _-G denotes a lead (Pb)-free / RoHS compliant package._ ~~.~~ _Contact factory for Wafer / Die availablity._ **DRAIN** _Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant._ **==> picture [40 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> SOURCE<br>**----- End of picture text -----**<br> **Absolute Maximum Ratings Parameter Value GATE** Drain-to-source voltage BVDSS **TO-92** Drain-to-gate voltage BVDGS Gate-to-source voltage ±30V **Product Marking** Operating and storage temperature -55[O] C to +150[O] C **SiVN** _Absolute Maximum Ratings are those values beyond which damage to the device may_ YY = Year Sealed _occur. Functional operation under these conditions is not implied. Continuous operation_ **1 0 K** WW = Week Sealed _of the device at the absolute rating level may affect device reliability. All voltages are_ **Y Y W W** ~~SS~~ _referenced to device ground._ = “Green” Packaging _Package may or may not include the following marks: Si or_ **Typical Thermal Resistance TO-92 Package** _**θja**_ TO-92 132[O] C/W ~~——————=~~ _**Supertex inc. www.supertex.com**_ _Doc.# DSFP-VN10K B031411_ **VN10K** ## **Thermal Characteristics** |**Package**|**ID**<br>**(continuous)****_†_**|**ID**<br>**(pulsed)**|**Power Dissipation**<br>**@TC = 25OC**|**IDR**<br>**_†_**|**IDRM**| |---|---|---|---|---|---| |TO-92|310mA|1.0A|1.0W|310mA|1.0A| ## _**Notes:**_ _† ID (continuous) is limited by max rated Tj . (VN0106N3 can be used if an ID (continuous) of 500mA is needed.)_ ## **Electrical Characteristics** _(TA = 25[O] C unless otherwise specified)_ |**Sym**|**Parameter**|**Min**|**Typ**|**Max**|**Units**|**Conditions**| |---|---|---|---|---|---|---| |BVDSS|Drain-to-source breakdown voltage|60|-|-|V|VGS= 0V, ID= 100µA| |VGS(th)|Gate threshold voltage|0.8|-|2.5|V|VGS= VDS, ID= 1.0mA| |ΔVGS(th)|Change in VGS(th)with temperature|-|-3.8|-|mV/OC|VGS= VDS, ID= 1.0mA| |IGSS|Gate body leakage|-|-|100|nA|VGS= 15V, VDS= 0V| |IDSS|Zero gate voltage drain current|-|-|10|µA|VGS= 0V, VDS= 45V| |||-|-|500||VGS= 0V, VDS= 45V,<br>TA= 125°C| |ID(ON)|On-state drain current|0.75|-|-|A|VGS= 10V, VDS= 10V| |RDS(ON)|Static drain-to-source on-state resistance|-|-|7.5|Ω|VGS= 5.0V, ID= 200mA| |||-|-|||VGS= 10V, ID= 500mA| |ΔRDS(ON)|Change in RDS(ON)with temperature|-||||VGS= 10V, ID= 500mA| |GFS|Forward transductance|100|-||mmho V|mmho VDS= 10V, ID= 500mA| |CISS|Input capacitance|-|48|60|pF|VGS= 0V,<br>VDS= 25V,<br>f = 1.0MHz| |COSS|Common source output capacitance|-|16|25||| |CRSS|Reverse transfer capacitance|-|2.0|5.0||| |t(ON)|Turn-on time|-|-|10|ns|VDD= 15V,<br>ID= 600mA,<br>RGEN= 25Ω| |t(OFF)|Turn-off time|-|-|10||| |VSD|Diode forward voltage drop|-|0.8|-|V|VGS= 0V, ISD= 500mA| |trr|Reverse recovery time|-|160|-|ns|VGS= 0V, ISD= 500mA| _**Notes:**_ _1. All D.C. parameters 100% tested at 25[O] C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)_ _2. All A.C. parameters sample tested._ ## **Switching Waveforms and Test Circuit** **==> picture [490 x 125] intentionally omitted <==** **----- Start of picture text -----**<br> 10V 90% VDD<br>INPUT Pulse R<br>10% Generator L<br>0V OUTPUT<br>t t<br>(ON) (OFF) R<br>GEN<br>td(ON) tr td(OFF) tf<br>VDD INPUT D.U.T.<br>10% 10%<br>OUTPUT<br>0V 90% 90%<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-VN10K B031411_ _**www.supertex.com**_ 2 **VN10K** ## **Typical Performance Curves** ## **BVDSS Variation with Temperature** **==> picture [192 x 185] intentionally omitted <==** **----- Start of picture text -----**<br> 1.1<br>1.0<br>0.9<br>-50 0 50 100 150<br>Tj ( [O] C)<br>(normalized)<br>DSS<br>BV<br>**----- End of picture text -----**<br> ## **Transfer Characteristics** **==> picture [193 x 183] intentionally omitted <==** **----- Start of picture text -----**<br> 1.0<br>VDS = 10V<br>300µs, 2%<br>0.8 Duty Cycle,<br>Pulse Test<br>0.6<br>0.4<br>0.2<br>0<br>0 2.0 4.0 6.0 8.0 10<br>VGS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> ## **Capacitance vs. Drain-to-Source Voltage** **==> picture [190 x 183] intentionally omitted <==** **----- Start of picture text -----**<br> 50<br>CISS<br>40<br>30<br>20<br>10<br>CRSS<br>0<br>0 10 20 30 40 50<br>VDS (volts)<br>COSS<br>C (picofarads)<br>**----- End of picture text -----**<br> ## **On-Resistance vs. Gate-to-Source Voltage** **==> picture [193 x 399] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>VDS = 0.1V<br>10<br>1.0 1.0 10 100<br>VGS (volts)<br>Output Conductance vs Drain Current<br>1.0<br>VDS = 25V<br>80µs, 1%<br>Duty Cycle,<br>Pulse Test<br>Reduction<br>Due to<br>Heating<br>0.1<br>0.01 0.01 0.1 1.0<br>ID (amperes)<br>(ohms)<br>DS(ON)<br>R<br>(mhos)<br>FS<br>G<br>**----- End of picture text -----**<br> ## **Transconductance vs Gate-Source Voltage** **==> picture [192 x 184] intentionally omitted <==** **----- Start of picture text -----**<br> 250<br>VDS = 10V<br>3000µs, 2%<br>200 Duty Cycle<br>Pulse Test<br>150<br>100<br>50<br>0<br>0 2.0 4.0 6.0 8.0 10<br>VGS (volts)<br>Ω<br>Gfs (m )<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-VN10K B031411_ _**www.supertex.com**_ 3 **VN10K** ## **Typical Performance Curves** _**(cont.)**_ **==> picture [109 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> Output Characteristics<br>**----- End of picture text -----**<br> **==> picture [201 x 191] intentionally omitted <==** **----- Start of picture text -----**<br> 1.0<br>VGS = 10V 8V 7V<br>0.8<br>6V<br>0.6<br>5V<br>0.4<br>4V<br>0.2<br>3V<br>2V<br>0<br>0 10 20 30 40 50<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> **==> picture [125 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> Saturation Characteristics<br>**----- End of picture text -----**<br> **==> picture [202 x 191] intentionally omitted <==** **----- Start of picture text -----**<br> 1.0<br>VGS = 10V 7V<br>9V<br>0.8<br>8V<br>6V<br>0.6<br>5V<br>0.4<br>4V<br>0.2<br>3V<br>2V<br>0<br>0 2.0 4.0 6.0 8.0 10<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> ## **Transconductance vs. Drain Current** **==> picture [194 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> Power Dissipation vs. Case Temperature<br>**----- End of picture text -----**<br> **==> picture [470 x 414] intentionally omitted <==** **----- Start of picture text -----**<br> 250 2.0<br>200<br>150<br>TO-92<br>1.0<br>100<br>50 VDS = 10V<br>300µs, 2%<br>Duty Cycle,<br>Pulse Test<br>0 0<br>0 200 400 600 800 1000 0 25 50 75 100 125 150<br>ID (mA) TC ( [O] C)<br>Maximum Rated Safe Operating Area Switching Waveform<br>10 10<br>TC = 25 [O] C<br>5.0<br>1.0<br>0<br>TO-92 (DC)<br>15<br>0.1<br>10<br>5.0<br>0<br>0.01<br>1.0 10 100 1000 0 10 20 30 40 50<br>VDS (volts) t – Time (ns)<br>Ω<br> (m ) (watts)<br>FS D<br>G P<br>(volts)<br>Output Voltage<br>(amperes)<br>ID<br>(volts)<br>Input Voltage<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-VN10K B031411_ _**www.supertex.com**_ 4 **VN10K** ## **3-Lead TO-92 Package Outline (N3)** **==> picture [295 x 347] intentionally omitted <==** **----- Start of picture text -----**<br> D<br>A<br>Seating<br>Plane 1 2 3<br>L<br>b c<br>e1<br>e<br>Front View Side View<br>E<br>E1<br>1 3<br>2<br>**----- End of picture text -----**<br> ## **Bottom View** **==> picture [541 x 74] intentionally omitted <==** **----- Start of picture text -----**<br> Symbol A b c D E E1 e e1 L<br>MIN .170 .014 [†] .014 [†] .175 .125 .080 .095 .045 .500<br>Dimensions<br>NOM - - - - - - - - -<br>(inches)<br>MAX .210 .022 [†] .022 [†] .205 .165 .105 .105 .055 .610*<br>**----- End of picture text -----**<br> _JEDEC Registration TO-92._ - _This dimension is not specified in the JEDEC drawing._ _† This dimension differs from the JEDEC drawing._ _**Drawings not to scale.**_ _**Supertex Doc.#:** DSPD-3TO92N3, Version E041009._ _(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)_ _**Supertex inc.**_ does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” _**Supertex inc.**_ does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the _**Supertex inc.**_ (website: http//www.supertex.com) > ©2013 _**Supertex inc.**_ All rights reserved. Unauthorized use or reproduction is prohibited. _**Supertex inc.**_ 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 _**www.supertex.com**_ _Doc.# DSFP-VN10K B031411_ 5
Updated at April 29, 2026
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