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TP0604N3-G
Power MOSFET, P Channel, 40 V, 430 mA, 1.5 ohm, TO-92, Through Hole
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- Manufacturer: MICROCHIP
- Product type: Single MOSFETs
- Transistor Polarity:P Channel; Continuous Drain Current Id:-430mA; Drain Source Voltage Vds:-40V; On Resistance Rds(on):1.5ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:
- MSL: -
- SVHC: No SVHC (04-Feb-2026)
- No. of Pins: 3Pins
- Channel Type: P Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 740mW
- Transistor Mounting: Through Hole
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-92
- Drain Source Voltage Vds: 40V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 430mA
- Drain Source On State Resistance: 1.5ohm
- Gate Source Threshold Voltage Max: 2.4V
| Delivery and price | |
|---|---|
| Units per pack | 1000 |
| Price | 0.974 € |
| Current stock | 100+ |
| Lead time | 30 days |
Datasheet
_**Su ertex inc. p**_ **TP0604** ## **P-Channel Enhancement-Mode Vertical DMOS FET** ## **Features** - Low threshold (-2.4V max.) - High input impedance - Low input capacitance (95pF typical) - Fast switching speeds - Low on-resistance - Free from secondary breakdown - Low input and output leakage ## **Applications** - Logic level interfaces - ideal for TTL and CMOS - Solid state relays - Battery operated systems - Photo voltaic drives - Analog switches ## **General Description** This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. - General purpose line drivers ► Telecom switches **Ordering Information Product Summary Part Number Package Option Packing BVDSS/BVDGS RDS(ON) ID(ON) VGS(th) (V) (max) (Ω) (min) (A) (max) (V)** TP0604N3-G 3-Lead TO-92 1000/Bag TP0604N3-G P002 -40 2.0 -2.0 -2.4 TP0604N3-G P003 TP0604N3-G P005 3-Lead TO-92 2000/Reel **Pin Configuration** TP0604N3-G P013 TP0604N3-G P014 TP2404NW Die in wafer form --- **DRAIN SOURCE** TP2404NJ Die on adhesive tape --- **GATE** ~~=ainw~~ TP2404ND Die in waffle pack --- _For packaged products, -G indicates package is RoHS compliant (‘Green’)._ **TO-92 (N3)** _TO-92 taping specifications and winding styles per EIA-468 Standard. Devices in Wafer / Die form are RoHS compliant (‘Green’). Refer to Die Specification VF57 for layout and dimensions._ **Product Marking Absolute Maximum Ratings SiTP** YY = Year Sealed **Parameter Value 0 6 0 4** WW = Week Sealed **Y Y W W** = “Green” Packaging Drain-to-source voltage BVDSS _Package may or may not include the following marks: Si or_ Drain-to-gate voltage BVDGS **TO-92 (N3)** Gate-to-source voltage ±20V ~~oe~~ Operating and storage temperature -55[O] C to +150[O] C _Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground._ _**Supertex inc.**_ _Doc.# DSFP-TP0604 C082012_ _**www.supertex.com**_ **TP0604** ## **Thermal Characteristics** **==> picture [542 x 57] intentionally omitted <==** **----- Start of picture text -----**<br> ID ID Power Dissipation θ I † I<br>Package (continuous) [†] (pulsed) @TA = 25 [O] C ja DR DRM<br>( [O] C/W) (A) (A)<br>(A) (A) (W)<br>TO-92 -0.43 -4.2 0.74 132 -0.43 -4.2<br>**----- End of picture text -----**<br> ## _**Notes:**_ _† ID (continuous) is limited by max rated Tj ._ ## **Electrical Characteristics** _(TA = 25[O] C unless otherwise specified)_ **==> picture [542 x 364] intentionally omitted <==** **----- Start of picture text -----**<br> Sym Parameter Min Typ Max Units Conditions<br>BVDSS Drain-to-source breakdown voltage -40 - - V VGS = 0V, ID = -2.0mA<br>VGS(th) Gate threshold voltage -1.0 - -2.4 V VGS = VDS, ID= -1.0mA<br>ΔVGS(th) Change in VGS(th) with temperature - -3.0 -4.5 mV/ [O] C VGS = VDS, ID= -1.0mA<br>IGSS Gate body leakage - - -100 nA VGS = ± 20V, VDS = 0V<br>- - -10 µA VGS = 0V, VDS = Max Rating<br>IDSS Zero gate voltage drain current - - -1.0 mA VDS = 0.8 Max Rating,<br>VGS = 0V, TA = 125°C<br>I ON-state drain current -0.4 -0.6 - A VGS = -5.0V, VDS = -20V<br>D(ON) -2.0 -3.3 - VGS = -10V, VDS = -20V<br>R Static drain-to-source on-state resistance - 2.0 3.5 Ω VGS = -5.0V, ID = -250mA<br>DS(ON) - 1.5 2.0 VGS = -10V, ID = -1.0A<br>ΔRDS(ON) Change in RDS(ON) with temperature - - 1.2 %/ [O] C VGS = -10V, ID = -1.0A<br>GFS Forward transductance 400 600 - mmho VDS = -20V, ID = -1.0A<br>CISS Input capacitance - 95 150 VGS = 0V,<br>COSS Common source output capacitance - 85 120 pF VDS = -20V,<br>CRSS Reverse transfer capacitance - 35 60 f = 1.0MHz<br>td(ON) Turn-on delay time - 5.0 8.0<br>t Rise time - 7.0 18 VDD = -20V,<br>r ns ID = -1.0A,<br>td(OFF) Turn-off delay time - 10 15 R = 25Ω<br>GEN<br>t Fall time - 6.0 19<br>f<br>VSD Diode forward voltage drop - -1.3 -2.0 V VGS = 0V, ISD = -1.5A<br>trr Reverse recovery time - 300 - ns VGS = 0V, ISD = -1.5A<br>**----- End of picture text -----**<br> _**Notes:**_ _1. All D.C. parameters 100% tested at 25[O] C unless otherwise stated. (Pulsed test: 300µs pulse, 2% duty cycle.)_ _2. All A.C. parameters sample tested._ ## **Switching Waveforms and Test Circuit** **==> picture [471 x 128] intentionally omitted <==** **----- Start of picture text -----**<br> 0V Pulse<br>10%<br>Generator<br>INPUT<br>R<br>-10V 90% GEN<br>t t<br>(ON) (OFF)<br>D.U.T.<br>td(ON) tr td(OFF) tf INPUT<br>OUTPUT<br>0V<br>OUTPUT 90% 90% RL<br>10% 10%<br>VDD<br>VDD<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-TP0604 C082012_ _**www.supertex.com**_ 2 **TP0604** ## **Typical Performance Curves** **==> picture [220 x 198] intentionally omitted <==** **----- Start of picture text -----**<br> Output Characteristics<br>-5<br>-4<br>-3 VGS = -10V<br>-9V<br>-2 -8V<br>-7V<br>-1 -6V<br>-5V<br>-4V<br>0<br>0 -10 -20 -30 -40<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> **==> picture [195 x 410] intentionally omitted <==** **----- Start of picture text -----**<br> Transconductance vs. Drain Current<br>1.0<br>VDS = -25V<br>0.8 TA = -55 [O] C<br>0.6 TA = 25 [O] C<br>0.4 TA = -150 [O] C<br>0.2<br>0<br>0 -1.0 -2.0 -3.0<br>ID (amperes)<br>Maximum Rated Safe Operating Area<br>-10<br>TC = 25 [O] C<br>-1.0<br>-0.1 TO-92 (DC)<br>-0.01<br>-1 -10 -100 -1000<br>VDS (volts)<br>(siemens)<br>FS<br>G<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> **==> picture [217 x 192] intentionally omitted <==** **----- Start of picture text -----**<br> Saturation Characteristics<br>-5<br>-4<br>-3 VGS = -10V<br>-9V<br>-8V<br>-2<br>-7V<br>-6V<br>-1<br>-5V<br>-4V<br>0<br>0 -2.0 -4.0 -6.0 -8.0 -10<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> **==> picture [202 x 413] intentionally omitted <==** **----- Start of picture text -----**<br> Power Dissipation vs. Case Temperature<br>2.0<br>TO-92<br>1.0<br>0<br>0 25 50 75 100 125 150<br>TC ( [O] C)<br>Thermal Response Characteristics<br>1.0<br>TO-92<br>PD = 1.0W<br>0.8 TC = 25 [O] C<br>0.6<br>0.4<br>0.2<br>0<br>0.001 0.01 0.1 1.0 10<br>tp (seconds)<br>(watts)<br>D<br>P<br>Thermal Resistance (normalized)<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-TP0604 C082012_ _**www.supertex.com**_ 3 **TP0604** ## **Typical Performance Curves** _**(cont.)**_ **==> picture [191 x 199] intentionally omitted <==** **----- Start of picture text -----**<br> BVDSS Variation with Temperature<br>1.1<br>1.0<br>0.9<br>-50 0 50 100 150<br>Tj (j (( [[O]] C)<br>(normalized)<br>DSS<br>BV<br>**----- End of picture text -----**<br> **==> picture [133 x 7] intentionally omitted <==** **----- Start of picture text -----**<br> On-Resistance vs. Drain Current<br>**----- End of picture text -----**<br> **==> picture [483 x 621] intentionally omitted <==** **----- Start of picture text -----**<br> 7.5<br>VGS = -5.0V VGS = -10V<br>6.0<br>5.0<br>1.0<br>3.0<br>1.5<br>0.9 0<br>-50 0 50 100 150 0 -1.0 -2.0 -3.0 -0.4 -5.0<br>Tj (j (( [[O]] C) ID (amperes)<br>Transfer Characteristics V(th) and RDS Variation with Temperature<br>-5 2.0<br>VDS = -25 [O] C<br>1.4<br>-4 1.6<br>1.2<br>V(th) @ -1.0mA<br>-3 1.2<br>1.0 -10V, -1.0A RDS(ON) @<br>-2 0.8<br>0.8<br>-1 0.4<br>0.6<br>0 0<br>0 -2.0 -4.0 -6.0 -8.0 -10 -50 0 50 100 150<br>VGS (volts) Tj ( [O] C)<br>Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics<br>200 -10<br>f = 1.0MHz<br>-8<br>150<br>VDS = -10V 180pF<br>-6<br>CISS<br>100<br>VDS = -40V<br>-4<br>50<br>CRSS -2<br>75pF<br>0 0<br>0 -10 -20 -30 -40 0 0.5 1.0 1.5 2.0 2.5<br>VDS (volts) QG (nanocoulombs)<br>COSS<br>OC<br>= 150<br>TA<br>= 25OC<br>TA<br>= -55OC<br>TA<br>(ohms)<br>(normalized)<br>DS(ON)<br>DSS R<br>BV<br>(amperes) (normalized) (normalized)<br>ID<br>GS(th) DS(ON)<br>V R<br>(volts)<br>GS<br>V<br>C (picofarads)<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-TP0604 C082012_ _**www.supertex.com**_ 4 **TP0604** ## **3-Lead TO-92 Package Outline (N3)** **==> picture [295 x 219] intentionally omitted <==** **----- Start of picture text -----**<br> D<br>A<br>Seating<br>Plane 1 2 3<br>L<br>b c<br>e1<br>e<br>**----- End of picture text -----**<br> **==> picture [71 x 11] intentionally omitted <==** **----- Start of picture text -----**<br> Front View<br>**----- End of picture text -----**<br> **==> picture [62 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> Side View<br>**----- End of picture text -----**<br> **==> picture [132 x 67] intentionally omitted <==** **----- Start of picture text -----**<br> E<br>E1<br>1 3<br>2<br>**----- End of picture text -----**<br> ## **Bottom View** **==> picture [542 x 73] intentionally omitted <==** **----- Start of picture text -----**<br> Symbol A b c D E E1 e e1 L<br>MIN .170 .014 [†] .014 [†] .175 .125 .080 .095 .045 .500<br>Dimensions<br>NOM - - - - - - - - -<br>(inches)<br>MAX .210 .022 [†] .022 [†] .205 .165 .105 .105 .055 .610*<br>**----- End of picture text -----**<br> _JEDEC Registration TO-92._ - _This dimension is not specified in the JEDEC drawing._ _† This dimension differs from the JEDEC drawing._ _**Drawings not to scale.**_ _**Supertex Doc.#:** DSPD-3TO92N3, Version E041009._ _(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)_ _**Supertex inc.**_ does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” _**Supertex inc.**_ does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the _**Supertex inc.**_ (website: http//www.supertex.com) > ©2012 _**Supertex inc.**_ All rights reserved. Unauthorized use or reproduction is prohibited. _**Supertex inc.**_ 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 _**www.supertex.com**_ _Doc.# DSFP-TP0604 C082012_ 5
Updated at April 29, 2026
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