TN2524N8-G
Power MOSFET, Enhanced-Mode, N Channel, 240 V, 360 mA, 4 ohm, SOT-89, Surface Mount
- Manufacturer: MICROCHIP
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:360mA; Drain Source Voltage Vds:240V; On Resistance Rds(on):4ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2V; Po
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (04-Feb-2026)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 1.6W
- Transistor Mounting: Surface Mount
- Rds(on) Test Voltage: 10V
- Transistor Case Style: SOT-89
- Drain Source Voltage Vds: 240V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 360mA
- Drain Source On State Resistance: 4ohm
- Gate Source Threshold Voltage Max: 2V
| Delivery and price | |
|---|---|
| Units per pack | 100 |
| Price | 0.87 € |
| Current stock | 1000+ |
| Lead time | 30 days |
_**Su ertex inc. p**_ **TN2524** ## **N-Channel Enhancement-Mode Vertical DMOS FET** ## **Features** - Low threshold (2.0V max.) - High input impedance - Low input capacitance (125pF max.) - Fast switching speeds - Low on-resistance - Free from secondary breakdown - Low input and output leakage ## **Applications** ## **General Description** This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. - Logic level interfaces – ideal for TTL and CMOS - Solid state relays - Battery operated systems - Photo voltaic drives - Analog switches - General purpose line drivers Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. - Telecom switches **Ordering Information Product Summary Part Number Package Option Packing BV /BV RDS(ON) ID(ON) VGS(TH) DSS DGS (max) (min) (max)** TN2524N8-G TO-243AA (SOT-89) 2000/Reel 240V 6.0Ω 1.0A 2.0V _-G denotes a lead (Pb)-free / RoHS compliant package._ ~~——~~ _Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant._ ## **Pin Configuration** ## **Absolute Maximum Ratings** **==> picture [131 x 97] intentionally omitted <==** **----- Start of picture text -----**<br> DRAIN<br>SOURCE<br>DRAIN<br>GATE<br>TO-243AA (SOT-89)<br>**----- End of picture text -----**<br> **Parameter Value** Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V ~~en~~ Operating and storage temperature -55[O] C to +150[O] C _Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground._ ## **Product Marking** **Typical Thermal Resistance** W = Code for week sealed **TN5CW Package** _**θja**_ = “Green” Packaging ~~ee~~ TO-243AA (SOT-89) 133[O] C/W ~~es~~ _Package may or may not include the following marks: Si or_ **TO-243AA (SOT-89)** _**Supertex inc. www.supertex.com**_ _Doc.# DSFP-TN2524 C080913_ **TN2524** ## **Thermal Characteristics** **==> picture [542 x 47] intentionally omitted <==** **----- Start of picture text -----**<br> Package (continuous)ID [†] (pulsed)ID Power Dissipation@TC = 25 [O] C IDR † IDRM<br>TO-243AA (SOT-89) 360mA 2.0A 1.6W [‡] 360mA 2.0A<br>**----- End of picture text -----**<br> _**Notes:**_ - _ID (continuous) is limited by max rated Tj ._ - _TA = 25°C. Mounted on FR5 Board, 25mm x 25mm x 1.57mm._ ## **Electrical Characteristics** _(TA = 25[O] C unless otherwise specified)_ **==> picture [542 x 363] intentionally omitted <==** **----- Start of picture text -----**<br> Sym Parameter Min Typ Max Units Conditions<br>BVDSS Drain-to-source breakdown voltage 240 - - V VGS = 0V, ID = 2.0mA<br>VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 1.0mA<br>ΔVGS(th) Change in VGS(th) with temperature - - -5.0 mV/ [O] C VGS = VDS, ID= 1.0mA<br>IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V<br>- - 10 µA VGS = 0V, VDS = Max Rating<br>IDSS Zero gate voltage drain current - - 1.0 mA VDS = 0.8 Max Rating,<br>VGS = 0V, TA = 125°C<br>I On-state drain current 0.5 1.9 - A VGS = 4.5V, VDS = 25V<br>D(ON) 1.0 2.8 - VGS = 10V, VDS = 25V<br>R Static drain-to-source on-state resistance - 4.0 6.0 Ω VGS = 4.5V, ID = 250mA<br>DS(ON) - 4.0 6.0 VGS = 10, ID = 500mA<br>ΔRDS(ON) Change in RDS(ON) with temperature - - 1.4 %/ [O] C VGS = 10V, ID = 500mA<br>GFS Forward transductance 300 600 - mmho VDS = 25V, ID = 500mA<br>CISS Input capacitance - 65 125 VGS = 0V,<br>COSS Common source output capacitance - 35 70 pF VDS = 25V,<br>CRSS Reverse transfer capacitance - 10 25 f = 1.0MHz<br>td(ON) Turn-on delay time - - 10<br>t Rise time - - 10 VDD = 25V,<br>td(OFF)r Turn-off delay time - - 20 ns RID = 1.0A,GEN = 25Ω<br>t Fall time - - 20<br>f<br>VSD Diode forward voltage drop - - 1.8 V VGS = 0V, ISD = 1.0A<br>trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A<br>**----- End of picture text -----**<br> _**Notes:**_ _1. All D.C. parameters 100% tested at 25[O] C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)_ _2. All A.C. parameters sample tested._ ## **Switching Waveforms and Test Circuit** **==> picture [495 x 127] intentionally omitted <==** **----- Start of picture text -----**<br> 10V 90% VDD<br>INPUT Pulse R<br>10% Generator L<br>0V OUTPUT<br>t t<br>(ON) (OFF) R<br>GEN<br>td(ON) tr td(OFF) tf<br>VDD INPUT D.U.T.<br>10% 10%<br>OUTPUT<br>0V 90% 90%<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-TN2524 C080913_ 2 _**www.supertex.com**_ **TN2524** ## **Typical Performance Curves** **==> picture [157 x 12] intentionally omitted <==** **----- Start of picture text -----**<br> BVDSS Variation with Temperature<br>**----- End of picture text -----**<br> **==> picture [194 x 168] intentionally omitted <==** **----- Start of picture text -----**<br> 1.1<br>1.0<br>0.9<br>-50 0 50 100 150<br>(normalized)<br>DSS<br>BV<br>**----- End of picture text -----**<br> **==> picture [23 x 11] intentionally omitted <==** **----- Start of picture text -----**<br> Tj ( [O] C)<br>**----- End of picture text -----**<br> **==> picture [192 x 196] intentionally omitted <==** **----- Start of picture text -----**<br> Transfer Characteristics<br>3.0<br>VDS = 25V<br>2.5<br>2.0<br>1.5<br>1.0<br>0.5<br>0<br>0 2 4 6 8 10<br>VGS (volts)<br>25OC<br>TA = -55OC 150OC<br>(amperes)<br>ID<br>**----- End of picture text -----**<br> ## **Capacitance vs. Drain-to-Source Voltage** **==> picture [193 x 181] intentionally omitted <==** **----- Start of picture text -----**<br> 200<br>f = 1MHz<br>150<br>100<br>CISS<br>50<br>CRSS<br>0<br>0 10 20 30 40<br>VDS (volts)<br>COSS<br>C (picofarads)<br>**----- End of picture text -----**<br> **==> picture [155 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> On-Resistance vs. Drain Current<br>**----- End of picture text -----**<br> **==> picture [215 x 396] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>VGS = 4.5V<br>8<br>VGS = 10V<br>6<br>4<br>2<br>0<br>0 1 2 3 4 5<br>ID (amperes)<br>V(th) and RDS Variation with Temperature<br>2.4<br>1.4<br>2.0<br>1.2<br>V(th) @ 1mA 1.6<br>1.0<br>1.2<br>0.8<br>0.8<br>RDS(ON) @ 10V, 0.5A<br>0.6<br>0.4<br>-50 05 0 100 150<br>Tj ( [O] C)<br>(Ω)<br>DS(ON)<br>R<br>(normalized) (normalized)<br>GS(th) DS(ON)<br>V R<br>**----- End of picture text -----**<br> **==> picture [186 x 193] intentionally omitted <==** **----- Start of picture text -----**<br> Gate Drive Dynamic Characteristics<br>10<br>VDS = 10V<br>8<br>6<br>VDS = 40V<br>4 150 pF<br>2<br>63pF<br>0 0 0.4 0.8 1.2 1.6 2.0<br>QG (nanocoulombs)<br>(volts)<br>GS<br>V<br>**----- End of picture text -----**<br> _**Supertex inc.**_ _Doc.# DSFP-TN2524 C080913_ 3 _**www.supertex.com**_ **TN2524** ## **Typical Performance Curves** _**(cont.)**_ **==> picture [126 x 9] intentionally omitted <==** **----- Start of picture text -----**<br> Saturation Characteristics<br>**----- End of picture text -----**<br> ## **Output Characteristics** **==> picture [480 x 651] intentionally omitted <==** **----- Start of picture text -----**<br> 10 10<br>VGS = 10V<br>8.0 8.0<br>VGS = 10V GS = 10V = 10V 8V<br>8V 6V<br>6.0 6.0<br>6V 4V<br>4.0 4.0<br>4V<br>3V<br>2.0 2.0<br>3V<br>0 2V 0 2V<br>0 10 20 30 40 50 0 2 4 6 8 10<br>VDS (volts)DS (volts)(volts) VDS (volts)<br>Transconductance vs. Drain Current Power Dissipation vs. Ambient Temperature<br>1.0 2.0<br>VDS = 25V<br> TA = -55 [O] C<br>TO-243AA<br>0.8<br> TA = 25 [O] C<br>0.6<br>1.0<br>0.4 TA = 125 [O] C<br>0.2<br>0 0<br>0 1.0 2.0 3.0 4.0 0 25 50 75 100 125 150<br>ID (amperes) TA ( [O] C)<br>Maximum Rated Safe Operating Area<br>10 Thermal Response Characteristics<br>1.0<br>TO-243AA (pulsed)<br>0.8<br>1.0<br>0.6<br>TO-243AA (DC)<br>0.4<br>0.1<br>0.2 TO-243AA<br> TA = 25 [O] C TPC D = 25= 0.55W [O] C<br>0.01 0<br>0 10 100 1000 0.001 0.01 0.1 1.0 10<br>VDS (volts) tP (seconds)<br>(amperes)D ID (amperes)ID<br>(watts)<br> (siemens) D<br>FS P<br>G<br>(amperes)<br>ID<br>Thermal Resistance (normalized)<br>**----- End of picture text -----**<br> **==> picture [205 x 193] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>8.0<br>VGS = 10V GS = 10V = 10V<br>8V<br>6.0<br>6V<br>4.0<br>4V<br>2.0<br>3V<br>0 2V<br>0 10 20 30 40 50<br>VDS (volts)DS (volts)(volts)<br>(amperes)D ID<br>**----- End of picture text -----**<br> ## **Power Dissipation vs. Ambient Temperature** _**Supertex inc.**_ _Doc.# DSFP-TN2524 C080913_ 4 _**www.supertex.com**_ **TN2524** ## **3-Lead TO-243AA (SOT-89) Package Outline (N8)** **==> picture [217 x 195] intentionally omitted <==** **----- Start of picture text -----**<br> D<br>D1<br>E H<br>1 2 3<br>L<br>b b1<br>e<br>e1<br>**----- End of picture text -----**<br> ## **Top View** **==> picture [85 x 162] intentionally omitted <==** **----- Start of picture text -----**<br> C<br>E1<br>A<br>**----- End of picture text -----**<br> ## **Side View** **==> picture [542 x 73] intentionally omitted <==** **----- Start of picture text -----**<br> Symbol A b b1 C D D1 E E1 e e1 H L<br>MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00 [†] 3.94 0.73 [†]<br>Dimensions 1.50 3.00<br>NOM - - - - - - - - - -<br>(mm) BSC BSC<br>MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20<br>**----- End of picture text -----**<br> _JEDEC Registration TO-243, Variation AA, Issue C, July 1986._ _**†** This dimension differs from the JEDEC drawing_ _**Drawings not to scale** ._ _**Supertex Doc. #:** DSPD-3TO243AAN8, Version F111010._ _(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)_ _**Supertex inc.**_ does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” _**Supertex inc.**_ does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the _**Supertex inc.**_ (website: http//www.supertex.com) > ©2013 _**Supertex inc.**_ All rights reserved. Unauthorized use or reproduction is prohibited. _**Supertex inc.**_ 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 _**www.supertex.com**_ _Doc.# DSFP-TN2524 C080913_ 5
Updated at April 29, 2026
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