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TMF8828-1AM
Distance Sensor, 5 m, I2C Digital, Time of Flight, 2.7 V to 3.3 V, PCB, TMF8828 Series
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: AMS OSRAM GROUP
- Product type:
- SVHC: No SVHC (21-Jan-2025)
- Product Range: TMF8828 Series
- Sensing Method: Time of Flight
- Connection Method: PCB
- Sensing Range Max: 5m
- Sensor Output Type: I2C Digital
- Supply Voltage Max: 3.3V
- Supply Voltage Min: 2.7V
- Sensing Distance Max: 5m
- Supply Voltage DC Max: 3.3V
- Supply Voltage DC Min: 2.7V
| Delivery and price | |
|---|---|
| Units per pack | 250 |
| Price | 4.78 € |
| Current stock | 200+ |
| Lead time | 30 days |
Datasheet
## Product Document
**Published by ams OSRAM Group**
## **Datasheet**
DS000693
## **TMF8820/21/28**
**Multizone Time-of-Flight Sensor**
v8-00 • 2023-Aug-02
## **Abstract**
The TMF8820/21/28 is a dToF (direct time of flight) wide field of view optical distance sensor module achieving up to 5000 mm target detection distance and has up to 3x3, 4x4, 3x6 or 8x8 zones.
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TMF8820/21/28 Content Guide
## **Content Guide**
## **1 General Description ...................... 3**
- 1.1 Key Benefits & Features ............................... 3 1.2 Applications .................................................. 5 1.3 Block Diagram .............................................. 5
## **2 Ordering Information .................... 6 3 Pin Assignment ............................. 7**
- 3.1 Pin Diagram .................................................. 7 3.2 Pin Description ............................................. 8
## **4 Absolute Maximum Ratings ......... 9**
## **5 Electrical Characteristics............ 10 6 Typical Operating Characteristics ............................ 13**
- 6.1 4x4 Zones Operating Mode (only TMF8821 and TMF8828) ............................................ 15
- 6.2 8x8 Zones Operating Mode (only TMF8828) ................................................... 16
## **7 Functional Description................ 17**
- 7.1 General Operating Description ................... 17 7.2 Timing Diagrams ........................................ 18 7.3 Calibration .................................................. 19 7.4 Algorithm Performance ............................... 21 7.5 Typical Optical Characteristics ................... 33 7.6 I²C Interface ................................................ 35
|8.5<br>8.6<br>8.7|appid=0x03, cid_rid=0x16 – Configuration<br>Page ........................................................... 65<br>appid=0x03, cid_rid=0x17/0x18 – User<br>Defined SPAD Configuration ...................... 78<br>appid=0x03, cid_rid=0x19 – Factory|
|---|---|
|8.8|Calibration................................................... 80<br>appid=0x03, cid_rid=0x81 – Raw Data|
||Histograms.................................................. 82|
|8.9|appid=0x80 – Bootloader Registers ........... 84|
|**9**|**Application Information ............... 89**|
|9.1|Schematic ................................................... 89|
|9.2<br>9.3|PCB Layout................................................. 91<br>External Components ................................. 92|
|9.4<br>9.5|PCB Pad Layout ......................................... 92<br>Software Drivers ......................................... 93|
|**10**|**Package Drawings & Markings ... 94**|
|**11**|**Tape & Reel Information .............. 95**|
|**12**|**Soldering & Storage Information 96**|
|12.1<br>12.2<br>**13**|Soldering Information ................................. 96<br>Storage Information .................................... 97<br>**Laser Eye Safety .......................... 99**|
|**14**|**Revision Information ................. 100**|
|**15**|**Legal Information ....................... 101**|
- **8 Register Description ................... 38** 8.1 Register Overview ...................................... 38 8.2 Any app_id - Register Description for All Application IDs............................................ 43
- 8.3 appid=0x03, any cid_rid - Main Application Registers .................................................... 47
- 8.4 appid=0x03, cid_rid=0x10 – Measurement Results ........................................................ 57
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TMF8820/21/28 General Description
## **1 General Description**
The TMF8820, TMF8821 & TMF8828 are a family of direct time-of-flight (dToF) sensors available in a small footprint modular package with integrated Vertical Cavity Surface Emitting Laser (VCSEL). The dToF device is based on SPAD, TDC and histogram technology and achieves 5000 mm detection range. Due to its lens on the SPAD, it supports 3x3, 4x4, 3x6 and 8x8 multizone output data and a very wide, dynamically adjustable, field of view. A multi-lens-array (MLA) inside the package above the VCSEL widens up the FoI (field of illumination). All processing of the raw data is performed on-chip and the TMF8820/21/28 provide distance information together with confidence values on its I²C interface.
TMF8820 3x3 zones operation TMF8821 3x3, 4x4 and 3x6 zones operation TMF8828 3x3, 4x4, 3x6, and 8x8 zones operation
## **Information (only pertains to TMF8828)**
The TMF8828 requires unique firmware (different from TMF8820/21/28) that will only operate on the TMF8828. The TMF8828 has two operating modes. It can operate as a TMF8820/21/28 (3x3, 4x4, or 3x6 zones) or in the TMF8828 mode which has 8x8 zones. In the TMF8828 mode, the device implements the 8x8 zone functionality as a sequence of four time-multiplexed measurements of 4x4 zones (like TMF8821). As such, the factory calibration sequence, loading the calibration data, reading the result measurements, and the optional histogram readouts must be performed four times in sequence by the host (please see the Host Driver Communication manual for details). The maximum measurement cycle rate in the TMF8828 mode is 15 Hz with 125 k iterations. Slower cycle rates with an increased number of iterations are possible.
## 1.1 Key Benefits & Features
The benefits and features of TMF8820/21/28, Multizone Time-of-Flight Sensor, are listed below:
## **Figure 1: Added Value of Using TMF8820/21/28**
|**Benefits**|**Features**|
|---|---|
|Small footprint fits within narrow bezel<br>applications|Modular package - 2.0 mm x 4.6 mm x 1.4 mm|
|Detecting objects in a very wide field of view|63º FoI/FoV|
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TMF8820/21/28 General Description
|**Benefits**|**Features**|
|---|---|
||TMF8828: Multizone with 3x3, 4x4, 3x6 and 8x8|
|Enable new applications like click to focus,|zones|
|object tracking, presence detection|TMF8821: Multizone with 3x3, 4x4 and 3x6 zones|
||TMF8820: Multizone with 3x3 zones|
|Within ±3% / ±10 mm of measurement<br>(accuracy); no multipath and no multiple object<br>problems as for iToF|Time-to-Digital Converter (TDC)<br>Direct Time-of-Flight Measurement|
|Better accuracy detects reliably closest object<br>Minimum distance 10 mm<br>Maximum distance 5000 mm|Single Photon Avalanche Photodiode (SPAD)<br>Histogram based architecture|
|No complex calibration|Dynamic cover glass calibration|
|Compensates for dirt on glass|Reliable operation under demanding use cases|
|Improved accuracy over temperature and life|Reference SPAD|
|Make better decisions|Distance and signal quality reported|
|Class 1 eye safe|Fast VCSEL driver with protection|
|Integration flexibility|I3C tolerant - operate on a shared I²C / I3C bus|
||141 mW power consumption at 30 Hz operation|
|Longer battery life|8 µA power consumption standby current (keep<br>memory)|
||2 µA power-down current consumption (EN=0)|
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TMF8820/21/28 General Description
## 1.2 Applications
The device is ideal for use with applications including:
- Distance measurement for camera autofocus - Laser Detect Autofocus - LDAF (mobile phone)
- Presence detection (computing and communication)
- Object detection and collision avoidance (robotics)
- Light curtain (industrial)
## 1.3 Block Diagram
The functional blocks of this device are shown below:
## **Figure 2:**
## **Functional Blocks of TMF8820/21/28**
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TMF8820/21/28 Ordering Information
## **2 Ordering Information**
|**Ordering Code**<br>**Package**<br>**Marking**|**Delivery Form**<br>**Delivery**<br>**Quantity**<br>**Note**|
|---|---|
|TMF8820-1AM<br>Optical<br>Module<br>8-Digit<br>Tracecode<br>TMF8820-1A<br>TMF8821-1AM<br>TMF8821-1A<br>TMF8828-1AM<br>TMF8828-1A|Tape & Reel<br>(7” reels)<br>500 pcs/reel<br>3x3 zones<br>Tape & Reel<br>(13” reels)<br>4000 pcs/reel|
||Tape & Reel<br>(7” reels)<br>500 pcs/reel<br>3x3, 4x4 and 3x6<br>zones<br>Tape & Reel<br>(13” reels)<br>4000 pcs/reel|
||Tape & Reel<br>(7” reels)<br>500 pcs/reel<br>3x3, 4x4, 3x6 and<br>8x8 zones<br>Tape & Reel<br>(13” reels)<br>4000 pcs/reel|
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TMF8820/21/28 Pin Assignment
## **3 Pin Assignment**
## 3.1 Pin Diagram
## **Figure 3:**
## **Pin Locations Top Through View (not to scale)**
**==> picture [176 x 256] intentionally omitted <==**
**----- Start of picture text -----**<br>
VDDC 1 12 VDDV<br>GNDC 2 11 GNDV<br>GPIO0 3 10 GPIO1<br>TMF8820<br>TMF8821<br>TMF8828<br>INT 4 9 EN<br>SCL 5 8 GND<br>SDA 6 7 VDD<br>**----- End of picture text -----**<br>
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TMF8820/21/28 Pin Assignment
## 3.2 Pin Description
## **Figure 4:**
**Pin Description of TMF8820/21/28**
|**Pin**|**Number**|**Pin Name**|<br>**Pin Type(1)**|**Description**|
|---|---|---|---|---|
|||||Charge pump supply voltage (3 V) – connect all VDD|
|1||VDDC|PWR|pins together; add a capacitor GRM155R70J104KA01|
|||||(0402 X7R 0.1 µF 6.3V) to GND|
|2||GNDC|GND|Charge pump ground; connect all ground pins together|
|3||GPIO0|I/O|General purpose input/output; default tristate; connect to<br>GND if not used|
|4||INT|OD|Interrupt. Open-drain output; connect to GND if not used|
|5||SCL|IN|I²C serial clock|
|6||SDA|I/O|I²C serial data|
|||||Chip supply voltage (3 V) – connect all VDD pins|
|7||VDD|PWR|together; add a capacitor GRM155R70J104KA01 (0402|
|||||X7R 0.1 µF 6.3 V) to GND|
|8||GND|GND|Chip ground; connect all ground pins together|
|||||Enable input active high; setting to low forces the device|
|9||EN|IN|into shutdown and all memory content is lost; connect to|
|||||VDD if not used|
|10||GPIO1|I/O|General purpose input/output; default tristate; connect to<br>GND if not used|
|11||GNDV|GND|VCSEL ground; connect all ground pins together|
|||||VCSEL supply voltage (3 V) – connect all VDD pins|
|12||VDDV|PWR|together; add a capacitor GRM155R70J104KA01 (0402|
|||||X7R 0.1 µF 6.3 V) to GND|
|(1)|Explanation of abbreviations:||||
||IN|Digital input pin|||
||I/O|Digital Input output pin|||
||OD|Open drain output pin|||
||GND|ground supply pin|||
||PWR|Power Supply|pin||
## **Information**
SDA, SCL, INT and EN have no diode to any VDD supply. Therefore even with VDD = 0 V they do not block the interrupt line or I²C bus.
GPIO0 and GPIO1 are push/pull output and have a diode to VDD; therefore if VDD is not powered, GPIO0 and GPIO1 shall not be driven from outside.
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TMF8820/21/28 Absolute Maximum Ratings
## **4**
## **Absolute Maximum Ratings**
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Operating Conditions” is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
## **Figure 5:**
## **Absolute Maximum Ratings of TMF8820/21/28**
|**Symbol**|**Parameter**|**Min**||**Max**|**Unit**|**Comments**|
|---|---|---|---|---|---|---|
|**Electrical Parameters**|||||||
|VDDMAX|3 V Supply Voltage to Ground|-0.3||3.6(1)|V|Pins VDDV, VDDC, VDD|
|VGND|Ground||0.0||V|Pins GNDV, GNDC, GND|
|||||||SCL, SDA, INT and EN;|
|VIOMAX|Digital I/O Terminal Voltage|-0.3||3.6|V|has no internal diode to|
|||||||VDD|
|VIO_GPIO_MAX|Interface Digital I/O terminal<br>voltage|-0.3||VDD+0.3<br>max 3.6|V|GPIO0, GPIO1 has an<br>internal diode to VDD|
|ISCR|Input Current (latch-up<br>immunity)||±|100|mA|JEDEC JESD78E|
|**Electrostatic Discharge**|||||||
|ESDHBM|Electrostatic Discharge HBM||± 2000||V|JS-001-2017|
|ESDCDM|Electrostatic Discharge CDM||±|500|V|JEDEC JS-002-2018|
|**Temperature Ranges and Storage Conditions**|||||||
|TSTRG|Storage Temperature Range|-40||85|°C||
|TBODY|Package Body Temperature|||260|°C|IPC/JEDEC J-STD-020(2)|
|RHNC|Relative Humidity (non-<br>condensing)|5||85|%||
|||||||Represents a maximum|
|MSL|Moisture Sensitivity Level|||3||floor life time of 168h with|
|||||||TA<30 °C and RHNC<60%|
(1) Limit supply rise to 1 V/µs
(2) The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices.” The lead finish for Pb-free leaded packages is “Matte Tin” (100 % Sn).
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TMF8820/21/28 Electrical Characteristics
## **5 Electrical Characteristics**
Device parameters are guaranteed at nominal conditions unless otherwise noted. While the device is operational across the temperature range, functionality will vary with temperature. The parameters with Min and Max values are guaranteed with production tests or SQC (Statistical Quality Control) methods.
## **Figure 6:**
**Electrical Characteristics of TMF8820/21/28**
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|VDD|3 V supply voltage|Pins VDDV, VDDC and VDD|2.7|3.0|3.5|V|
|VIO|I/O supply voltage|Supply voltage for external pull-up<br>for SCL, SDA and INT.|1.62|<br>1.8|3.5|V|
|TAMB|Operating ambient<br>temperature||-40|23|85|°C|
|**Current Consumption**|||||||
|IPOWER_DOWN|Power down current|Pin EN=0; state: power down;<br>TAMB=23°C||2|10|µA|
|||Current consumption for PON=0,|||||
|||wakeup by special I²C command,|||||
|||only retention RAM keeps content;|||||
|ISTANDBY|Standby current|state: standby; I/O pins not<br>toggling||8||µA|
|||Only register 0xE0 (ENABLE)|||||
|||accessible by I²C interface when in|||||
|||this mode.|||||
|||Current consumption for waiting|||||
|||for measurement period to expire.|||||
|ISTANDBY_TIMED|Standby timed<br>current|goto_standby_timed = 1,<br>low_power_osc_on = 1<br>Only register 0xE0 (ENABLE)||34||µA|
|||accessible by I²C interface when in|||||
|||this mode|||||
|||Wakeup by I²C or timer, all|||||
|IWAIT|Wait current|memories keep content, CPU off,<br>oscillator on;||216||µA|
|||State: wait|||||
|||Current consumption for CPU|||||
|||running at 80 MHz, VCSEL and|||||
|IACTIVE|Active current|TDC off;||2.8||mA|
|||State: active – histogram|||||
|||processing|||||
|IACTIVE_RANGING|Active current for<br>ranging (VCSEL<br>emitting light)|Current consumption for CPU<br>running at 80 MHz, VCSEL and<br>TDC on;<br>State: active – ranging||57||mA|
|**Average Current Consumption for Running Application**|||||||
|PRANGING_AVG|Average power<br>consumption|Default settings with 550 k<br>iterations, 3x3 mode, output data<br>rate 30 Hz||141||mW|
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TMF8820/21/28 Electrical Characteristics
|**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
|PRANGING_AVG_LP<br>Average power<br>consumption low<br>power|Output data rate 30 Hz, 3x3 mode,<br>50 k iterations<br>19<br>mW|
|**I/O Levels – Over Temperature and Supply**||
|ILEAK<br>Leakage current to<br>VDD or GND|SDA, SCL, GPIO0/1, EN, INT<br>-5<br>5<br>µA|
|VIH<br>Input voltage high|SDA, SCL, GPIO0/1, EN<br>1.26<br>3.3<br>V|
|VIL<br>Input voltage low|SDA, SCL, GPIO0/1, EN<br>0<br>0.54<br>V|
|VOL2mA<br>Output voltage low|SDA, INT, 2 mA sink<br>0<br>0.36<br>V|
|VOL4mA<br>Output voltage low|SDA. INT, 4 mA sink<br>0<br>0.6<br>V|
|IDRIVE_H<br>Output current high|1 V applied on GPIO0/1<br>3.6<br>mA|
|IDRIVE_L<br>Output current low|1 V applied on GPIO0/1<br>3.6<br>mA|
|**Timings – over Temperature and Supply**||
|fclk<br>RC oscillator|All internal timings are derived<br>from this clock<br>4.85<br>5<br>5.15<br>MHz|
|fCPUclk<br>Maximum operating<br>frequency of CPU|The CPU can be switched<br>between fclkand fclk*16<br>fclk* 16<br>(80 MHz)<br>MHz|
|VCSELCLK<br>Clock frequency of<br>VCSEL clock|17.77<br>MHz|
|tPOR<br>Power on time|EN=1 to ready for I²C command<br>2<br>ms|
|tFW_DOWNLOAD<br>Time to download<br>firmware|For 1 MHz I²C speed<br>[TMF8820/21]<br>50<br>ms|
||For 1 MHz I²C speed [TMF8828]<br>100<br>ms|
|tFIRST_MEAS_COLD<br>Time from cold start<br>to first measurement|From EN=0->1 (power down) to<br>first measurement result; default<br>settings (33 ms)<br>190<br>ms|
|tFIRST_MEAS_WARM<br>Time from warm<br>start to first<br>measurement|From standby to first<br>measurement result; default<br>settings (33 ms)<br>60<br>ms|
|tSWITCH_to_8820/8821<br>Time to switch to<br>TMF8820/21 mode|From command 0x65 to<br>CMD_STAT to first measurement<br>result [TMF8828]<br>65<br>ms|
|tSWITCH_to_8828<br>Time to switch to<br>TMF8828 mode|From command 0x6C to<br>CMD_STAT to first measurement<br>result [TMF8828]<br>115<br>ms|
|**I²C Interface – over Temperature and Supply**||
|fSCLK<br>SCL clock frequency<br>0<br>400<br>1000<br>kHz||
|tBUF<br>Bus free time<br>between a STOP<br>and START<br>0.5<br>μs||
|tHD:STA<br>Hold time<br>(Repeated) Start<br>0.26<br>µs||
|tLOW<br>LOW period of SCL<br>Clock<br>0.5<br>μs||
|tHIGH<br>HIGH period of<br>SCL clock<br>0.26<br>μs||
|tSU:STA<br>Setup time for a<br>Repeated START<br>0.26<br>μs||
|tHD:DAT<br>Data hold time<br>0<br>μs||
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TMF8820/21/28 Electrical Characteristics
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|tSU:DAT|Data setup time||50|||ns|
|tR|Rise time of both<br>SDA and SCL||20||120|ns|
|tF|Fall time of both<br>SDA and SCL||20||120|ns|
|**Optical Parameters**|||||||
|FoI|Field of view of the<br>illuminator main<br>area|Diagonal, FWHM(2)of radiant<br>intensity|See section 7.5.2||||
|**Optical Multizone Parameters**|||||||
|SPADX|Delta in angle of<br>single SPAD in x|In optical center||2.4||degrees|
|SPADY|Delta in angle of<br>single SPAD in y(1)|In optical center||5.6||degrees|
|**Optical Stack Requirements**|||||||
|GLASSTRANSPARENCY|Glass transparency<br>@ 940 nm|The device can work with IR inked<br>or clear glass|85|90||%|
|XTALKSYSTEM|System Crosstalk|Measured in final application|See ams OSRAM optical design guide||||
(1) Due to SPADs with too high dark count, which are disabled by production test (screamer detection), need to use always at least two SPADs next to each other.
(2) FWHM – full width half maximum.
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TMF8820/21/28 Typical Operating Characteristics
## **6 Typical Operating Characteristics**
Following operating characteristics are measured with calibrated devices with full optical stack. The ambient light is measured on the target. The data is perpendicular scaled for the non-center zones.
**Figure 7: 350 Lux Fluorescent Light 18% Grey Card 3x3, 33°x32° FoV Center Zone, 30 Hz**
## **Figure 8:**
**Figure 7 Zoomed to 0 mm – 1000 mm**
**==> picture [442 x 186] intentionally omitted <==**
**Figure 9: 350 Lux Fluorescent Light 18% Grey Card 3x3, 33°x32° FoV, Edge Zone, 30 Hz**
**Figure 10: 350 Lux Fluorescent Light 18% Grey Card 3x3, 33°x32° FoV, Corner Zone, 30 Hz**
**==> picture [201 x 177] intentionally omitted <==**
**==> picture [202 x 178] intentionally omitted <==**
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TMF8820/21/28 Typical Operating Characteristics
## **Figure 11:**
**140 Lux HAL (1 k Lux sunlight) 18% Grey Card 3x3, 33°x32° FoV Center Zone, 30 Hz**
**==> picture [201 x 186] intentionally omitted <==**
**Figure 13: 1400 Lux HAL (10 k Lux sunlight) 18% Grey Card 3x3, 33°x32° FoV Center Zone, 30 Hz**
**==> picture [212 x 186] intentionally omitted <==**
**Figure 12:**
**700 Lux HAL (5 k Lux sunlight) 18% Grey Card 3x3, 33°x32° FoV Center Zone, 30 Hz**
**==> picture [212 x 186] intentionally omitted <==**
**Figure 14: Reported Distance During a Temperature Sweep from 70 °C to -30 °C with a Fixed Target in the Oven**
**==> picture [198 x 190] intentionally omitted <==**
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TMF8820/21/28 Typical Operating Characteristics
## 6.1 4x4 Zones Operating Mode (only TMF8821 and TMF8828)
## **Figure 15:**
**350 Lux Fluorescent Light 18% Grey Card 4x4, 41°x52° FoV Center Zone, 15 Hz**
**Figure 16: Figure 15 Zoomed to 0 mm - 1000 mm**
**==> picture [438 x 186] intentionally omitted <==**
**Figure 17: 350 Lux Fluorescent Light 18% Grey Card 4x4, 41°x52° FoV, Edge Zone, 15 Hz**
**Figure 18: 350 Lux Fluorescent Light 18% Grey Card 4x4, 41°x52° FoV, Corner Zone, 15 Hz**
**==> picture [439 x 190] intentionally omitted <==**
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TMF8820/21/28 Typical Operating Characteristics
## 6.2 8x8 Zones Operating Mode (only TMF8828)
**Figure 19: 350 Lux Fluorescent Light 18% Grey Card 8x8, 41°x52° FoV Center Zone, 15 Hz**
**Figure 20: Figure 19 Zoomed to 0 mm - 1000 mm**
**Figure 21: 350 Lux Fluorescent Light 18% Grey Card 8x8, 41°x52° FoV, Edge Zone, 15 Hz**
**Figure 22: 350 Lux Fluorescent Light 18% Grey Card 8x8, 41°x52° FoV, Corner Zone, 15 Hz**
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TMF8820/21/28 Functional Description
## **7 Functional Description**
## 7.1 General Operating Description
The TMF8820/21/28 operating principle uses a pulse train of VCSEL pulses defined by the iteration setting. These pulses are spread using a MLA (micro lens array) to illuminate the FoI (field of illumination). An object reflects these rays back to the TMF8820/21/28 receiver optics lens and onto a SPAD (single photon avalanche detector) array. A TDC (time to digital converter) measures now the time from emission of these pulses to their arrival and accumulates the hits into bins inside a histogram. As TMF8820/21 sends 550 k pulses (default settings), the output of the TDC is a full histogram as shown in Figure 23.
## **Figure 23:**
## **Example Target Histogram and Reference Histogram (Blue)**
**==> picture [204 x 80] intentionally omitted <==**
**----- Start of picture text -----**<br>
Reference Peak<br>| |<br>|<br>| Measurement Peaks<br>4<br>Crosstalk Peaks | |<br>**----- End of picture text -----**<br>
The large blue peak (clipped due to scaling for measurement peaks) in the histogram shows the reference peak histogram. A SPAD, which is located in the cavity of the VCSEL, generates this target peak. The target detection algorithm uses this peak together with the crosstalk peaks at bin 15 in the measurements channels to calculate zero distance. All measurement histograms show a crosstalk peak around bin 15 and the actual target peak at bin 50 – the algorithm has an internal calibration to calculate from bins to time, which the algorithm converts to distance using speed of light. In above example, the time from bin 15 to bin 50 represents a target distance of 2 m.
The internal processor (ARM M0+ ®) executes the ams OSRAM algorithm on these histograms to calculate the target distance of the object. The output of this calculation is the distance in [mm] presented on the I²C interface for each of the zones.
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TMF8820/21/28 Functional Description
## **7.1.1 Multizone / Multi-Object Functionality**
The SPADs below the receiver lens are in focus of this lens. Therefore, depending on the location of the object, the different zones see different areas of the scene as shown in the raw histogram graph in Figure 24:
## **Figure 24:**
## **Multizone Histograms Example**
**==> picture [97 x 11] intentionally omitted <==**
**----- Start of picture text -----**<br>
Add. Object at 50 cm<br>**----- End of picture text -----**<br>
In zone3 (histogram 3) there is an additional object at 50 cm which is shown by a third peak in the histogram around bin 25. Zone3 outputs a first object at 50 cm and a second object at 2 m distance.
## 7.2 Timing Diagrams
Following figure shows a typical target measurement timing diagram of TMF8820/21/28:
**Figure 25: Timing Diagram for Ranging Period > Ranging Active + Histogram Processing**
**==> picture [436 x 100] intentionally omitted <==**
**----- Start of picture text -----**<br>
INT<br>I<br>I1<br>Standby or Ranging Active Histogram Ranging Active Histogram Standby or<br>State Init Wait<br>Sleep (VCSEL on) Processing (VCSEL on) Processing Sleep<br>C YeIIIXL vkI YX L XL1 +)<br>!! 1 !<br>I I I H<br>' < < A$ _ ___ > ) |<br>Start Ranging Stop<br>Ranging Period Ranging<br>**----- End of picture text -----**<br>
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TMF8820/21/28 Functional Description
If the ranging period is chosen shorter than the combined time of ranging active and histogram processing, the TMF8820/21/28 automatically runs histogram processing in parallel to ranging active.
**Figure 26: Timing Diagram for Ranging Period < Ranging Active + Histogram Processing**
**==> picture [436 x 101] intentionally omitted <==**
**----- Start of picture text -----**<br>
INT<br>Histogram Histogram Histogram<br>Processing Processing Processing<br>Standby or Ranging Active Ranging Active Ranging Active Standby or<br>State Init Wait Wait Wait<br>Sleep (VCSEL on) (VCSEL on) (VCSEL on) Sleep<br>Start Ranging Ranging Stop<br>Ranging Period Period Ranging<br>**----- End of picture text -----**<br>
- (1) In time multiplex mode for TMF8821 (4x4 and 3x6) and TMF8828 (8x8), ranging active is executed 2 times for 3x6 and 4x4 respectively, 4 times for 8x8 mode before an interrupt is sent after histogram processing. Each VCSEL burst uses the programmed number of iterations defined by register iterations [15:8] and iterations [7:0].
## 7.3 Calibration
To achieve the performance described in the next sections, the correct SPAD mask shall be set, iterations set to 4 M and calibration of the algorithm needs to be performed (cmd_stat = 0x20). The TMF8820/21/28 shall be embedded in the final application and the cover glass including the IR ink needs to be assembled. The calibration test shall be done in a housing with minimal ambient light and no target within 40 cm in field of view of the TMF8820/21/28.
## **Attention**
Set number of iterations during calibration to 4 M to ensure accuracy. Read also the optical design guide (ODG) to have the system crosstalk level in the range defined by this document.
The TMF8820/21/28 generates a calibration data set, which needs to be stored on the host processor and reloaded after each power down or reset event.
It shall be ensured by the optical design that the optical crosstalk values are meeting the limits defined in the TMF8820/21/28 optical design guide (ODG).
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TMF8820/21/28 Functional Description
## **Figure 27:**
## **Calibration Data Measured Crosstalk Values (Little endian format = LSB first)**
|**I²C Address**|||
|---|---|---|
|**(if appid=0x03,**<br>**cid_rid=0x19 –**|**Offset in Calibration**<br>**Data File**|**Meaning**|
|**Factory Calibration)**|||
|0x2A-0x2B|0x06-0x07|Iterations used for calibration divided by 1024|
|Crosstalk values for zones 1-9; apply for non-time multiplexed mode (3x3); also for the first|||
|measurement in time multiplexed mode (4x4 and 3x6); TMF8828 repeats 4x4 calibration 4 times|||
|0x5C-0x5F|0x38-0x3B|Crosstalk for reference channel – shall be ignored|
|0x60-0x63|0x3C-0x3F|Crosstalk for channel 1|
|0x64-0x67|0x40-0x43|Crosstalk for channel 2|
|0x68-0x6B|0x44-0x47|Crosstalk for channel 3|
|0x6C-0x6F|0x48-0x4B|Crosstalk for channel 4|
|0x70-0x73|0x4C-0x4F|Crosstalk for channel 5|
|0x74-0x77|0x50-0x53|Crosstalk for channel 6|
|0x78-0x7B|0x54-0x57|Crosstalk for channel 7|
|0x7C-0x7F|0x58-0x5B|Crosstalk for channel 8|
|0x80-0x83|0x5C-0x5F|Crosstalk for channel 9|
|Crosstalk values for zones 10-18 using channels 1-9 only for the second measurement in time|||
|multiplexed mode (4x4|and 3x6); TMF8828 repeats 4x4 calibration 4 times||
|0xB4-0xB7|0x90-0x93|Crosstalk for reference channel; time multiplex –<br>shall be ignored|
|0xB8-0xBB|0x94-0x97|Crosstalk for channel 1; time multiplex|
|0xBC-0xBF|0x98-0x9B|Crosstalk for channel 2; time multiplex|
|0xC0-0xC3|0x9C-0x9F|Crosstalk for channel 3; time multiplex|
|0xC4-0xC7|0xA0-0xA3|Crosstalk for channel 4; time multiplex|
|0xC8-0xCB|0xA4-0xA7|Crosstalk for channel 5; time multiplex|
|0xCC-0xCF|0xA8-0xAB|Crosstalk for channel 6; time multiplex|
|0xD0-0xD3|0xAC-0xAF|Crosstalk for channel 7; time multiplex|
|0xD4-0xD7|0xB0-0xB3|Crosstalk for channel 8; time multiplex|
|0xD8-0xDB|0xB4-0xB7|Crosstalk for channel 9; time multiplex|
|||fc_status_during_cal - calibration status during|
|0xDC|0xB8|factory calibration – copy of register 0x07 – 0x00<br>success, all other values are reporting an error|
|||during calibration|
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TMF8820/21/28 Functional Description
The host shall send the calibration data for the selected SPAD mask on each power-up of the TMF8820/21/28 and after each change of the SPAD mask using cmd_stat = 0x19, prior to execution of the ams OSRAM algorithm.
## **Attention**
Calibration shall be done individually for all different SPAD masks used in operation of the device.
## 7.4 Algorithm Performance
The algorithm performance is measured using the driver supplied by ams OSRAM and using the latest firmware included in TMF882x_Driver_Linux_v*.zip. Download the latest firmware from ams.com website:
- For TMF8820, see ams.com/tmf8820
- For TMF8821, see ams.com/tmf8821
- For TMF8828, see ams.com/tmf8828
The driver automatically performs clock skew correction (use host clock to compensate for the TMF8820/21/28 internal clock drift) to achieve the accuracy.
See also section 9.5 for available drivers.
Performance parameters apply at nominal supply and temperature.
## **7.4.1 SPAD Mask and Mode Selection**
The SPAD mask selection (register spad_map_id see Figure 113) defines the assignment of the SPADs to the individual zones – due to the lens above the SPADs, the FoV (field of view) of the sensor is also defined by the SPAD mask as shown in Figure 29.
The ranging period shown in Figure 28 is depending on the operating mode, which is selected by spad_map_id and the iterations setting, set by register iterations. To achieve fastest ranging period set the report period in ms (register period) below ranging period to ensure that there will be no wait time.
## **Figure 28:**
**Ranging Period vs. Iterations and Operating Mode**
|**Operating Mode**|**Iterations**<br>**Ranging Period With**<br>**No Wait Time Programmed**|
|---|---|
|3x3|50 k<br>6.1 ms|
||550 k<br>32.2 ms|
||4000 k<br>230 ms|
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TMF8820/21/28 Functional Description
|**Operating Mode**|**Iterations**<br>**Ranging Period With**<br>**No Wait Time Programmed**|
|---|---|
|3x6 or 4x4|50 k<br>13 ms|
||550 k<br>65 ms|
||4000 k<br>460 ms|
|8x8|125 k<br>66 ms|
||550 k<br>258 ms|
## **Figure 29:**
**Relation of SPADs to FoV – Zone 3,6,9 from spad_map_id=1 (3x3 mode, 33°x32° FoV)**
**==> picture [370 x 349] intentionally omitted <==**
**----- Start of picture text -----**<br>
FOV of single zone<br>Maximum FOV – field<br>of view of sensor FOV of single SPAD<br>Lens Optical Center of Lens<br>SPAD size:<br> x-size 16.8µm<br> y-size 38.8µm<br>Sensor DIE<br>Focal Plane<br>18 1<br>z<br>x-cross section shown, same<br>One SPAD<br>applies for y-direction<br>x<br>Focal Distance = 400µm<br>**----- End of picture text -----**<br>
FoV of a SPAD or a zone can be calculated with, assuming center of zone is in optical center:
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TMF8820/21/28 Functional Description
## **Equation 1:**
𝐹𝑜𝑉 [°] = 2 ∗atan[𝑠𝑖𝑧𝑒 𝑜𝑓 𝑧𝑜𝑛𝑒 𝑜𝑟 𝑆𝑃𝐴𝐷] 2 ∗ 𝑓𝑜𝑐𝑎𝑙 𝑑𝑖𝑠𝑡𝑎𝑛𝑐𝑒
Where focal distance = 400 µm
Size of a single SPAD is 16.8 µm in x-direction and 38.8 µm in y-direction.
There are several pre-defined SPAD masks available as shown in Figure 113 and drawn in Figure 30 for 3x3 mode and Figure 31 for 4x4 and 3x6 mode and Figure 32 for 8x8 mode:
## **Figure 30:**
## **Zones Configuration of Pre-Programmed SPAD Maps for 3x3 Mode Operation**
**==> picture [441 x 346] intentionally omitted <==**
**----- Start of picture text -----**<br>
41°<br>1 2 3<br>1 2 3<br>4 5 6 1 2 3<br>4 5 6<br>7 8 9 7 8 9 4 5 6<br>7 8 9<br>3x3 Normal mode 3x3 Macro mode 1 3x3 Macro mode 2<br>33°x32° (45°) FOV 33°x47° (56°) FOV 33°x47° (56°) FOV<br>spad_map_id = 1 spad_map_id = 2 spad_map_id = 3<br>1 2 3<br>1 2 3 1 2 3<br>4 5 6 4 5 6 4 5 6<br>7 8 9 7 8 9<br>7 8 9<br>3x3 Wide mode 3x3 Checkerboard mode 3x3 Inv. Checkerboard<br>41°x52° (63°) FOV 33°x32° (45°) FOV mode, 33°x32° (45°) FOV<br>spad_map_id = 6 spad_map_id = 11 spad_map_id = 12<br>y Optical Center single SPAD<br>x<br>60°<br>**----- End of picture text -----**<br>
(1) Use the checkerboard SPAD masks especially for high ambient light conditions.
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TMF8820/21/28 Functional Description
## **Figure 31:**
**Zones Configuration of Pre-Programmed SPAD Maps for 4x4 and 3x6 Mode Operation**
**==> picture [431 x 353] intentionally omitted <==**
**----- Start of picture text -----**<br>
41°<br>1 2 3 4<br>1 2 3 4<br>5 6 7 8 1 2 3 4<br>5 6 7 8<br>9 1011 12 5 6 7 8<br>9 10 11 12<br>13 1415 16 9 1011 12<br>13 14 15 16<br>13 1415 16<br>4x4 Normal mode 4x4 Macro mode 1 4x4 Macro mode 2<br>41°x52° (63°) FOV 33°x47° (56°) FOV 33°x47° (56°) FOV<br>spad_map_id = 7 spad_map_id = 4 spad_map_id = 5<br>1 2 3<br>1 2 3 4 4 5 6<br>5 6 7 8 7 8 9<br>9 1011 12 10 11 12<br>13 1415 16 13 14 15<br>16 17 18<br>4x4 Narrow mode 3x6 Mode<br>33°x42° (52°) FOV 33°x60° (66°) FOV<br>spad_map_id = 13 spad_map_id = 10<br>y Optical Center single SPAD<br>x<br>60°<br>**----- End of picture text -----**<br>
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TMF8820/21/28 Functional Description
## **Figure 32: Zones Configuration of Pre-Programmed SPAD Maps for 8x8 Mode Operation**
**==> picture [188 x 219] intentionally omitted <==**
**----- Start of picture text -----**<br>
8x8 Mode<br>41° x 52° (63°) FOV<br>7 15 8 16 7 15 8 16<br>5 13 6 14 5 13 6 14<br>3 11 4 12 3 11 4 12<br>1 9 2 10 1 9 2 10<br>Sub-Capture 00 Sub-Capture 01<br>7 15 8 16 7 15 8 16<br>5 13 6 14 5 13 6 14<br>3 11 4 12 3 11 4 12<br>1 9 2 10 1 9 2 10<br>Sub-Capture 10 Sub-Capture 11<br>y Optical Center<br>x<br>**----- End of picture text -----**<br>
Except in TMF8828 mode, the customer can design an own SPAD mask and assign SPADs to channels individually. In TMF8828 mode, the SPAD mask is fixed and cannot be changed. There are following constrains for these SPAD masks:
- Use spad_map_id=14 for single measurement up to 9 zones and spad_map_id=15 for time multiplexed measurement up to 18 zones.
- The SPAD mask has a maximum size of 18x10.
- SPAD mapping and SPAD enable mask shall have the exact same size.
- Channel 0 is reserved for the reference channel and shall not be used in a SPAD mask.
- The resulting SPAD mask plus offset shall not exceed 18x12 – example: An 18x10 size SPAD mask has to have x_offset_2=0 (18 is already the limit) but can have a y-offset of ±1 SPAD. Please note that the actual register value y_offset_2 is multiplied by 2 so, +2 or -2 is the actual value stored to y_offset_2 to obtain an offset of +1 respectively -1.
- In each used channel, there shall be at least two adjacent SPADs (can be in any direction).
- A single row shall not use channel 1 and channel 8 or 9 at the same time.
- There needs to be at least one channel per TDC enabled otherwise electrical calibration will fail - use at minimum channel (2 or 3) and (4 or 5) and (6 or 7) and (8 or 9).
A complete SPAD mask consists of an enable mask, where a ‘1’ is an enabled SPAD and a ‘0’ is used for a disabled SPAD, and a TDC channel selection mask where the number ‘1’…’9’ assigns this SPAD to a TDC channel. See document TMF882X_Host_Driver_Communication*.pdf for detailed explanation how to download customized SPAD maps.
ams OSRAM recommends to program the SPAD mask through the device driver and read back the masks for verification.
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TMF8820/21/28 Functional Description
Whenever the SPAD mask selection is changed, the current calibration is no longer valid – see section 7.3.
## **CAUTION**
For a user defined SPAD mask ensure that each zone has at least two adjacent SPADs enabled. Otherwise, on some devices this zone might not see any target counts at all.
## **7.4.2 Performance in 3x3 Operating Mode**
The algorithm reports distance information for each of the zone individually for the closest and the 2[nd] closest object in 1 mm steps. The algorithm performance is depending on the chosen zone:
## **Figure 33: Zones Definition**
**==> picture [354 x 179] intentionally omitted <==**
**----- Start of picture text -----**<br>
TMF8820/21/28 top view 1 2 3<br>Corner Edge Corner<br>4 5 6<br>Edge Center Edge<br>7 8 9<br>Receiver Corner Edge Corner<br>Lens + SPADs<br>y<br>x<br>**----- End of picture text -----**<br>
For spad_map_id=1 (3x3 mode, 33°x32° FoV), calibration according to section 7.3, following performance parameters apply. The reported distance is the actual distance between the device and the actual measured zone – there is no perpendicular flat target correction applied. The target covers the full FoV of the device.
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TMF8820/21/28 Functional Description
## **Figure 34:**
**Typical Maximum Distance in 3x3 Mode, 33°x32° FoV, 550 k Iterations (30 Hz output data rate), Light on the Target Only**
|**Target**<br>**Reflectivity %T**<br>**at 940 nm**|**Zone**<br>**350 Lux LED**<br>**Lighting**<br>**140 Lux**<br>**Halogen(1)**<br>**700 Lux**<br>**Halogen(2)**<br>**1400 Lux**<br>**Halogen(3)**|
|---|---|
|White target 90%|Center<br>5000 mm<br>4500 mm<br>2000 mm<br>1000 mm|
||Edge<br>5000 mm<br>4000 mm<br>1800 mm<br>950 mm|
||Corner<br>5000 mm<br>3000 mm<br>1500 mm<br>750 mm|
|Grey target 18%|Center<br>5000 mm<br>3000 mm<br>2000 mm<br>1500 mm|
||Edge<br>4500 mm<br>2800 mm<br>1500 mm<br>1400 mm|
||Corner<br>4000 mm<br>2000 mm<br>1400 mm<br>1200 mm|
(1) 140 lux halogen light represents 1 k lux sunlight
(2) 700 lux halogen light represents 5 k lux sunlight
(3) 1400 lux halogen light represents 10 k lux sunlight
## **7.4.3 Performance in 4x4 Operating Mode – Only TMF8821 and TMF8828**
## **Information**
Please note that the zones for 4x4 operating mode are presented in zones 1-8 and 10-17; the result for zone 9 and 18 is not used.
The algorithm reports distance information for each of the zone individually for the closest and the 2[nd] closest object in 1 mm steps. The algorithm performance is depending on the chosen zone:
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TMF8820/21/28 Functional Description
## **Figure 35:**
## **Zones Definition (TMF8821 and TMF8828)**
**==> picture [406 x 181] intentionally omitted <==**
**----- Start of picture text -----**<br>
1 2 3 4<br>TMF8821/28 top view Corner Edge Edge Corner<br>5 6 7 8<br>Edge Center Center Edge<br>10 11 12 13<br>Edge Center Center Edge<br>Illuminator Receiver<br>VCSEL + MLA Lens + SPADs<br>14 15 16 17<br>Corner Edge Edge Corner<br>y<br>x<br>**----- End of picture text -----**<br>
For spad_map_id=7 (4x4 mode, 41°x52° FoV), calibration according to section 7.3, following performance parameters apply. The reported distance is the actual distance between the device and the actual measured zone – there is no perpendicular flat target correction applied. The target covers the full FoV of the device.
## **Figure 36:**
**Typical Maximum Distance in 4x4 Mode, 41°x52° FoV, 550 k Iterations (15 Hz output data rate), Light on the Target Only**
|**Target**<br>**Reflectivity %T**<br>**at 940 nm**|**Zone**<br>**350 Lux LED**<br>**Lighting**<br>**140 Lux**<br>**Halogen(1)**<br>**700 Lux**<br>**Halogen(2)**<br>**1400 Lux**<br>**Halogen(3)**|
|---|---|
|White target 90%|Center<br>5000 mm<br>3500 mm<br>2000 mm<br>1000 mm|
||Edge<br>3000 mm<br>1400 mm<br>900 mm<br>500 mm|
||Corner<br>2900 mm<br>1300 mm<br>800 mm<br>400 mm|
|Grey target 18%|Center<br>4000 mm<br>2500 mm<br>1500 mm<br>1400 mm|
||Edge<br>1500 mm<br>1200 mm<br>800 mm<br>700 mm|
||Corner<br>1400 mm<br>1100 mm<br>700 mm<br>600 mm|
(1) 140 lux HAL represents 1k lux sunlight
(2) 700 lux HAL represents 5k lux sunlight
(3) 1400 lux HAL represents 10k lux sunlight
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TMF8820/21/28 Functional Description
## **7.4.4 Performance in 8x8 Operating Mode – Only TMF8828**
## **Information**
Please note that the zones for 8x8 operating mode are presented in zones 1-8 and 10-17; the result for zone 9 and 18 is not used.
The algorithm reports distance information for each of the zone individually for the closest and the 2[nd] closest object in 1 mm steps. The algorithm performance is depending on the chosen zone:
## **Figure 37:**
## **Zones Definition (TMF8828)**
**==> picture [405 x 194] intentionally omitted <==**
**----- Start of picture text -----**<br>
7 16 7 16 8 17 8 17<br>Corner Edge Edge Edge Edge Edge Edge Corner<br>TMF8828 top view 7 16 7 16 8 17 8 17<br>Edge Edge Edge Edge Edge Edge Edge Edge<br>15 142 35 144 56 156 76 158<br>CornEdg e r Edge CentEdg e r CentEdg e r CentEdg e r CentEdg e r Edge CornEdg e r<br>15 142 305 1431 56 156 76 158<br>CornEdg e r Edge Center Center CentEdg e r CentEdg e r Edge CornEdg e r<br>3 12 3 12 4 13 4 13<br>Edge Edge Center Center Center Center Edge Edge<br>3 12 3 12 4 13 4 13<br>Edge Edge Center Center Center Center Edge Edge<br>Illuminator Receiver<br>VCSEL + MLA Lens + SPADs 1 102 13 104 25 116 27 118<br>CornEdg e r Edge Edge Edge Edge Edge Edge CornEdg e r<br>Sub- Sub-<br>Capture 2 Capture 3 641 102 13 104 25 116 27 118<br>y Edge10 Edge11 Corner Edge Edge Edge Edge Edge Edge Corner<br>x Sub-2 Sub-3<br>Capture Capture<br>Edge00 Edge01<br>**----- End of picture text -----**<br>
After calibration according to section 7.3, the following performance parameters apply. The reported distance is the actual distance between the device and the actual measured zone – there is no perpendicular flat target correction applied. The target covers the full FoV of the device.
## **Figure 38:**
**Typical Maximum Distance in 8x8 Mode, 41°x52° FoV, 125 k Iterations (15 Hz output data rate), Light on the Target Only**
|**Target**<br>**Reflectivity %T**<br>**at 940 nm**|**Zone**<br>**350 Lux LED**<br>**Lighting**<br>**140 Lux**<br>**Halogen(1)**<br>**700 Lux**<br>**Halogen(2)**<br>**1400 Lux**<br>**Halogen(3)**|
|---|---|
|White target 90%|Center<br>4400 mm<br>2000 mm<br>1300 mm<br>1000 mm|
||Edge<br>1500 mm<br>900 mm<br>500 mm<br>400 mm|
||Corner<br>900 mm<br>600 mm<br>300 mm<br>300 mm|
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TMF8820/21/28 Functional Description
|**Target**<br>**Reflectivity %T**<br>**at 940 nm**|**Zone**<br>**350 Lux LED**<br>**Lighting**<br>**140 Lux**<br>**Halogen(1)**<br>**700 Lux**<br>**Halogen(2)**<br>**1400 Lux**<br>**Halogen(3)**|
|---|---|
|Grey target 18%|Center<br>2000 mm<br>1500 mm<br>1000 mm<br>800 mm|
||Edge<br>800 mm<br>600 mm<br>400 mmm<br>300 mm|
||Corner<br>500 mm<br>400 mm<br>300 mm<br>200 mm|
(1) 140 lux HAL represents 1k lux sunlight
(2) 700 lux HAL represents 5k lux sunlight
(3) 1400 lux HAL represents 10k lux sunlight
## **7.4.5 Short Range High Accuracy Mode**
From EVM release 3v52 onwards, the TMF8820/21/28 have a short range and high accuracy mode. This operating mode enhances the accuracy for a detection range up to 1000 mm.
Use this operating mode only if best accuracy for short range is needed as this operating mode reduces maximum detection distance as shown by Figure 34, Figure 36 and Figure 38 by approximately 50% and clips it to 1000 mm but greatly enhances accuracy.
The mode can be enabled by setting of register active_range. Please download the relevant calibration data after switching the operating mode.
**Figure 39:**
## **Accuracy Short Range Mode of TMF8820/21/28**
|**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
|dMIN<br>Minimum<br>detection<br>distance|Grey target 18%<br>10<br>mm|
||White target 90%<br>25<br>mm|
|dACCURACY3x3,4x4<br>Accuracy of<br>detection for<br>3x3 and 4x4<br>mode|10 mm to 20 mm<br>± 10<br>mm|
||20 mm to 200 mm<br>± 5<br>mm|
||200 mm to 1000 mm; all<br>except corner zones<br>± 2.0<br>%|
||200 mm to 1000 mm;<br>corner zones<br>± 2.5<br>%|
|dACCURACY8x8<br>Accuracy of<br>detection for<br>8x8 mode|10 mm to 20 mm<br>± 10<br>mm|
||20 mm to 40 mm<br>± 5<br>mm|
||40 mm to 100 mm<br>-10/+5<br>mm|
||100 mm to 200 mm<br>± 5<br>mm|
||200 mm to 1000 mm; all<br>except corner zones<br>± 2.0<br>%|
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TMF8820/21/28 Functional Description
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|||200 mm to 1000 mm;||± 3.0||%|
|||corner zones|||||
|dPRECISION|Precision|± 2 sigma (95%),<br>350 lux LED lighting||2 mm<br>+ 0.5%|||
## **Attention**
The short range, high accuracy mode needs an individual calibration per SPAD map – see document TMF882X_Host_Driver_Communication*.pdf for detailed explanation of this calibration.
## **7.4.6 Accuracy / Precision Long Range Mode (default)**
## **Figure 40:**
**Accuracy and Precision Parameters Long Range Mode (TMF8820/21 mode – 550 k iterations)**
|**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
|dMIN<br>Minimum detection<br>distance|10<br>mm|
|dACCURACY<br>Accuracy of detection|10 mm to 20 mm<br>± 19<br>mm|
||20 mm to 50 mm,<br>grey target<br>± 10<br>mm|
||50 mm to 250 mm<br>± 15<br>mm|
||250 mm to 333 mm<br>± 10<br>mm|
||≥ 333 mm<br>± 3<br>%|
|dPRECISION<br>Precision|± 2 sigma (95%),<br>350 lux LED lighting<br>2 mm<br>+ 0.5%|
Please note that above parameters are typical parameters and perpendicular flat target correction applied.
## **Figure 41:**
**Accuracy and Precision Parameters Long Range Mode (TMF8828 mode – 125 k iterations)**
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|dMIN|Minimum detection<br>distance|||10||mm|
|dACCURACY|Accuracy of detection|10 mm to 20 mm||-4/+22||mm|
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TMF8820/21/28 Functional Description
|**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
||20 mm to 50 mm,<br>grey target<br>-3/+18<br>mm|
||50 mm to 250 mm<br>-16/+7<br>mm|
||250 mm to 333 mm<br>-12/+7<br>mm|
||≥ 333 mm<br>± 5<br>%|
|dPRECISION<br>Precision|± 2 sigma (95%),<br>350 lux LED lighting<br>2 mm<br>+ 0.5%|
Please note that above parameters are typical parameters on clear cover glass and perpendicular flat target correction applied.
## **7.4.7 Confidence**
For each detected target, the TMF8820/21/28 provides a confidence result. The confidence result is the signal to noise ratio (SNR) of the detected peak in the histogram.
Signal = Peak value in the histogram
Noise = Noise from the device and ambient light = sqrt (baseline level of histogram)
The confidence value is an 8-bit value which supports two encodings:
## **Linear Encoding**
Selected by setting register bit logarithmic_confidence = 0.
The values for confidence represents directly SNR and are clipped at 255.
## **Logarithmic Encoding**
Selected by setting register bit logarithmic_confidence = 1.
The values 0…40 represent directly SNR. Values above 40 are exponentially scaled with a growth rate of 5.36%.
Following c-like code fragment converts from the coded value ‘confidence’ to the actual value ‘exp_conf’:
```
#define CONF_BREAKPOINT 40
```
```
#define EXP_GROWTH_RATE 1.053676f
```
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```
if (confidence <= CONF_BREAKPOINT)
```
```
// confidence 0 - 40 are unchanged linear scale
```
```
exp_conf = confidence;
```
```
else {
```
```
// Exponential de-mapping
```
```
uint32_t steps = confidence - CONF_BREAKPOINT;
```
```
uint32_t exp_conf = (uint32_t)
```
```
(CONF_BREAKPOINT* pow((double)EXP_GROWTH_RATE,(double)steps));
```
```
}
```
## 7.5 Typical Optical Characteristics
## **7.5.1 VCSEL**
Internal protection ensures no single point of failure will cause the VCSEL to violate the Class 1 Laser Safety.
- Laser Safety
Class 1
## **7.5.2 FoI / FoV**
- VCSEL Field of Illumination (FoI)
**●** 47x57º (70° diagonal calc.) full width from 5% of maximum up to max. **●** 41x47º (60° diagonal calc.) 1/e^2 **●** 30x32º (43° diagonal calc.) FWHM
## **Information**
The smaller value (x/y) for FoI is always into the direction of the SPADs. FWHM … Full width half maximum
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TMF8820/21/28 Functional Description
**Figure 42: Field of Illumination Shown in Pseudocolors in [%] of Max Range**
The sensor field is view (FoV) depends on the chosen spad_map_id:
- dToF Sensor Field of View (FoV) 41x52º (63° diagonal calc.)
- spad_map_id=6 or 7
- 33x32º (45° diagonal calc.) spad_map_id=1 see Figure 30 and Figure 31 – fully customizable FoV.
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TMF8820/21/28 Functional Description
## **Figure 43: FoV/FoI of TMF8820/21/28**
**==> picture [399 x 145] intentionally omitted <==**
**----- Start of picture text -----**<br>
FoV<br>FoI<br>41° FoI (1/e^2)<br>47° FoI (1/e^2)<br>FoV-y (see text)<br>FoV-x (see text)<br>**----- End of picture text -----**<br>
## **7.5.3 Optical Filter Characteristics**
The on-chip optical filter blocks most of the ambient light and improves the performance especially with sunlight. It is possible to add another optical filter on top to even further improve sunlight performance.
- FWHM
92 nm
- Passband Center Wavelength 940 nm (filter only)
## 7.6 I²C Interface
The TMF8820/21/28 is controlled by an I²C bus, one interrupt pin and two GPIO pins.
Additionally see ams OSRAM device driver and/or application note TMF882X_Host_Driver_Communication_*.pdf for a detailed explanation of the I²C communication itself.
The device uses I²C serial communication protocol for communication. The device supports 7-bit chip addressing (default: 0x41) and standard, fast mode and fast mode plus modes. Read and Write
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TMF8820/21/28 Functional Description
transactions comply with the standard set by Philips (now NXP). For a complete description of the I²C protocol, please review the NXP I²C design specification.
## **Figure 44:**
## **I²C Timings**
**==> picture [436 x 111] intentionally omitted <==**
**----- Start of picture text -----**<br>
tR tF t LOW<br>SCL<br>tHIGH S<br>P S tHD:STA tHD:DAT tSU:DAT tSU:STA Sr t SU:STO P<br>VIH<br>SDA tBUF VIL<br>Stop Start<br>**----- End of picture text -----**<br>
The TMF8820/21/28 support following I²C operating modes:
- Standard mode – up to 100 kBit/s
- Fast-mode – up to 400 kBit/s
- Fast-mode-plus – up to 1 MBit/s
**Figure 45: I²C Symbol Definition**
|**Symbol**|**Definition**|**RW**|**Note**|
|---|---|---|---|
|S|Start condition after stop|R|1-bit|
|Sr|Repeated start (start condition end<br>without preceding stop condition)|R|1-bit|
|ADR|Slave address 7 bits = default 0x41|R|Slave address|
|WA|Word address|R|8-bit|
|A|Acknowledge|W|1-bit|
|N|No Acknowledge|R|1-bit|
|Data|Data/write|R or W|8-bit|
|Data(n)|Data/read|W|8-bit|
|P|Stop condition|R|1-bit|
|WA++|Slave increment word address|R|During acknowledge|
Internal to the device, an 8-bit buffer stores the register address location of the byte to read or write. This buffer auto-increments upon each byte transfer and is retained between transaction events (i.e. valid even after the master issues a P (Stop condition) and the I²C bus is released). During consecutive Read transactions, the future/repeated I²C Read transaction may omit the memory address byte normally following the chip address byte; the buffer retains the last register address +1.
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TMF8820/21/28 Functional Description
A Write transaction consists of an S, ADR, 0 (R/W flag), WA, Data (n), and P. Following each byte (9[th] clock pulse) the slave places an A or NA (ACK/NACK) on the bus. If NACK is transmitted by the slave, the master may issue a P.
## **Figure 46:**
**Byte Write and Page Write Commands**
**==> picture [430 x 105] intentionally omitted <==**
**----- Start of picture text -----**<br>
S ADRSW 0 A WA A Data A P<br>Write WA++<br>S ADRSW 0 A WA A Data 1 A .. A Data n A P<br>Write WA++ Write WA++ Write WA++<br>**----- End of picture text -----**<br>
A Read transaction consists of a S, ADR, 0 (R/W flag), WA, Sr, ADR, 1 (R/W flag), Data(n) and P. Following all but the final byte the master places an A (ACK) on the bus (9[th] clock pulse). Termination of the Read transaction is indicated by an N (NACK) being placed on the bus by the master, followed by STOP.
## **Figure 47:**
**Random Read and Sequential Read Command (example shows 2 bytes)**
**==> picture [428 x 99] intentionally omitted <==**
**----- Start of picture text -----**<br>
S<br>S ADRSW 0 A WA A ADRSR 1 A Data N P<br>r<br>Read WA++ WA++<br>S<br>S ADRSW 0 A WA A ADRSR 1 A Data 1 A ...Data n N P<br>r<br>Read WA++ Read WA++ WA++<br>**----- End of picture text -----**<br>
The default I²C address is 0x41. The address can be changed after power-up. Use the enable pin to enable only one device at a time to provide unique device addresses – see section 9.1.1.
The device is I3C tolerant – therefore it can coexist with I3C devices on the same bus. TMF8820/21/28 communicates in legacy I²C mode of the I3C bus.
## **Attention**
During standby and standby timed mode, only register 0xE0 (ENABLE) is accessible by the I²C interface.
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TMF8820/21/28 Register Description
## **8 Register Description**
## 8.1 Register Overview
Please note that the I²C register table uses pages. Therefore, the content of the registers depends on the page select register app_id and cid_rid.
## **Figure 48: Register Overview**
|**Addr**|**Name**|**<D7>**|**<D6>**|**<D5>**|**<D4>**|**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|---|---|---|---|
|**Any appid, any cid_rid – Registers always available**||||||||||
|0x00|**APPID**|appid||||||||
|0x01|**MINOR**|minor||||||||
|0xE0|**ENABLE**|0|cpu_ready|powerup_select|||||pon|
|0xE1|**INT_STATUS**|0|int7|int6|0|int4|0|int2|0|
|0xE2|**INT_ENAB**|0|int7_enab|int6_enab|0|int4_enab|0|int2_enab|0|
|0xE3|**ID**|||0|0|1|0|0|0|
|0xE4|**REVID**||||||rev_id|||
|0xE4<br>**REVID**|0xE4<br>**REVID**|rev_id|
|---|---|---|
|**appid=0x03, any cid_rid - Main**||**Application Registers**|
|0x02|**PATCH**|patch|
|0x03|**BUILD_TYPE**|build|
|0x04|**APPLICATION_ST**<br>**ATUS**|app_status|
|0x05|**MEASURE_STATU**<br>**S**|measure_status|
|0x06|**ALGORITHM_STAT**<br>**US**|alg_status|
|0x07|**CALIBRATION_ST**<br>**ATUS**|fc_status|
|0x08|**CMD_STAT**|cmd_stat|
|0x09|**PREV_CMD**|prev_cmd|
|0x10|**MODE (TMF8828**<br>**ONLY)**|mode|
|0x0A|**LIVE_BEAT**|live_beat|
|0x19|**ACTIVE_RANGE**|active_range|
|0x1C|**SERIAL_NUMBER_**<br>**0**|serial_number[7:0]|
|0x1D|**SERIAL_NUMBER_**|serial_number[15:8]|
||**1**||
|0x1E|**SERIAL_NUMBER_**<br>**2**|serial_number[23:16]|
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TMF8820/21/28 Register Description
|**Addr**|**Name**|**<D7>**<br>**<D6>**|**<D5>**|**<D4>**|**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|---|---|---|
|0x1F|**SERIAL_NUMBER_**<br>**3**|serial_number[31:24]|||||||
|0x20|**CONFIG_RESULT**|cid_rid|||||||
|0x21|**TID**|tid|||||||
|0x22|**SIZE_LSB**|size[7:0]|||||||
|0x23|**SIZE_MSB**|size[15:8]|||||||
|**appid=0x03, cid_rid=0x10 – Measurement Results**|||||||||
|0x24|**RESULT_NUMBER**|number|||||||
|0x25|**TEMPERATURE**|temperature|||||||
|0x26|**NUMBER_VALID_R**<br>**ESULTS**|valid_results|||||||
|0x28|**AMBIENT_LIGHT_0**|<br>ambient[7:0]|||||||
|0x29|**AMBIENT_LIGHT_1**|<br>ambient[15:8]|||||||
|0x2A|**AMBIENT_LIGHT_2**|<br>ambient[23:16]|||||||
|0x2B|**AMBIENT_LIGHT_3**|<br>ambient[31:24]|||||||
|0x2C|**PHOTON_COUNT_**<br>**0**|photon_count[7:0]|||||||
|0x2D|**PHOTON_COUNT_**<br>**1**|photon_count[15:8]|||||||
|0x2E|**PHOTON_COUNT_**<br>**2**|photon_count[23:16]|||||||
|0x2F|**PHOTON_COUNT_**<br>**3**|photon_count[31:24]|||||||
|0x30|**REFERENCE_COU**<br>**NT_0**|reference_count[7:0]|||||||
|0x31|**REFERENCE_COU**<br>**NT_1**|reference_count[15:8]|||||||
|0x32|**REFERENCE_COU**<br>**NT_2**|reference_count[23:16]|||||||
|0x33|**REFERENCE_COU**<br>**NT_3**|reference_count[31:24]|||||||
|0x34|**SYS_TICK_0**|sys_tick[7:0]|||||||
|0x35|**SYS_TICK_1**|sys_tick[15:8]|||||||
|0x36|**SYS_TICK_2**|sys_tick[23:16]|||||||
|0x37|**SYS_TICK_3**|sys_tick[31:24]|||||||
|0x38|**RES_CONFIDENCE**<br>**_0**|confidence0|||||||
|0x39|**RES_DISTANCE_0**<br>**_LSB**|distance0[7:0]|||||||
|0x3A|**RES_DISTANCE_0**<br>**_MSB**|distance0[15:8]|||||||
|0x3B|**RES_CONFIDENCE**<br>**_1**|confidence1|||||||
|0x3C|**RES_DISTANCE_1**<br>**_LSB**|distance1[7:0]|||||||
|0x3D|**RES_DISTANCE_1**<br>**_MSB**|distance1[15:8]|||||||
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|**Addr**|**Name**|**<D7>**<br>**<D6>**|**<D5>**|**<D4>**|**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|---|---|---|
|…|**…**||||||||
|0xA1|**RES_CONFIDENCE**<br>**_35**|confidence35|||||||
|0xA2|**RES_DISTANCE_3**<br>**5_LSB**|distance35[7:0]|||||||
|0xA3|**RES_DISTANCE_3**<br>**5_MSB**|distance35[15:8]|||||||
|**appid=0x03, cid_rid=0x16 – Configuration Page**|||||||||
|0x24|**PERIOD_MS_LSB**|period[7:0]|||||||
|0x25|**PERIOD_MS_MSB**|period[15:8]|||||||
|0x26|**KILO_ITERATIONS**<br>**_LSB**|iterations[7:0]|||||||
|0x27|**KILO_ITERATIONS**<br>**_MSB**|iterations[15:8]|||||||
|0x28|**INT_THRESHOLD_**<br>**LOW_LSB**|int_threshold_low[7:0]|||||||
|0x29|**INT_THRESHOLD_**<br>**LOW_MSB**|int_threshold_low[15:8]|||||||
|0x2A|**INT_THRESHOLD_**<br>**HIGH_LSB**|int_threshold_high[7:0]|||||||
|0x2B|**INT_THRESHOLD_**<br>**HIGH_MSB**|int_threshold_high[15:8]|||||||
|0x2C|**INT_ZONE_MASK_**<br>**0**|int_zone_mask[7:0]|||||||
|0x2D|**INT_ZONE_MASK_**<br>**1**|int_zone_mask[15:8]|||||||
|0x2E|**INT_ZONE_MASK_**<br>**2**||||||int_zone_mask[17:1<br>6]||
|0x2F|**INT_PERSISTENCE**|<br>int_persistence|||||||
|0x30|**CONFIDENCE_THR**<br>**ESHOLD**|confidence_threshold|||||||
|0x31|**GPIO_0**|driver_strength0||pre_delay0||gpio0|||
|0x32|**GPIO_1**|driver_strength1||pre_delay1||gpio1|||
|0x33|**POWER_CFG**|goto_s<br>tandby<br>_timed<br>low_power<br>_osc_on|keep_pll_r<br>unning||allow_osc<br>_retrim|pulse_<br>interru<br>pt|||
|0x34|**SPAD_MAP_ID**||||spad_map_id||||
|||logarit|||||||
|0x35|**ALG_SETTING_0**|hmic_<br>confid|||distance_<br>mode|distan<br>ces|||
|||ence|||||||
|0x36-<br>0x38||Reserved – keep at 0|||||||
|0x39|**HIST_DUMP**|||||||histogr<br>am|
|0x3A|**SPREAD_SPECTR**<br>**UM**|Reserved – keep at 0|||spread_spectrum_factor||||
|0x3B|**I2C_SLAVE_ADDR**<br>**ESS**|7bit_slave_address||||||0|
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TMF8820/21/28 Register Description
|**Addr**|**Name**|**<D7>**<br>**<D6>**<br>**<D5>**<br>**<D4>**<br>**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|
|0x3C|**OSC_TRIM_VALUE**<br>**_LSB**|osc_trim_value[7:0]||||
|0x3D|**OSC_TRIM_VALUE**<br>**_MSB**||||osc_tri<br>m_valu<br>e[8]|
|0x3E|**I2C_ADDR_CHANG**<br>**E**|gpio_change_mask||gpio_change_value||
|**appid=0x03, cid_rid=0x17/0x18**||**– User defined SPAD Configuration**||||
|0x24|**SPAD_ENABLE_FI**<br>**RST**|spad_enable_first||||
|…|**…**|||||
|0x41|**SPAD_ENABLE_L**<br>**AST**|spad_enable_last||||
|0x42|**SPAD_TDC_FIRST**|spad_tdc_first||||
|…|**…**|||||
|0x8C|**SPAD_TDC_LAST**|spad_tdc_last||||
|0x8D|**SPAD_X_OFFSET_**<br>**2**|x_offset_2||||
|0x8E|**SPAD_Y_OFFSET_**<br>**2**|y_offset_2||||
|0x8F|**SPAD_X_SIZE**|x_size||||
|0x90|**SPAD_Y_SIZE**|y_size||||
|**appid=0x03, cid_rid=0x19 – Factory Calibration**||||||
|0x24|**FACTORY_CALIBR**<br>**ATION_FIRST**|factory_calibration_first – see section 7.3||||
|…|**…**|||||
|0x60-<br>63|**CROSSTALK_ZON**<br>**E1**|crosstalk_amplitude_zone1, 32-bit value, LSB first (little-endian)||||
|0x64-<br>67|**CROSSTALK_ZON**<br>**E2**|crosstalk_amplitude_zone2, 32-bit value, LSB first (little-endian)||||
|0x68-<br>6B|**CROSSTALK_ZON**<br>**E3**|crosstalk_amplitude_zone3, 32-bit value, LSB first (little-endian)||||
|0x6C-<br>6F|**CROSSTALK_ZON**<br>**E4**|crosstalk_amplitude_zone4, 32-bit value, LSB first (little-endian)||||
|0x70-<br>73|**CROSSTALK_ZON**<br>**E5**|crosstalk_amplitude_zone5, 32-bit value, LSB first (little-endian)||||
|0x74-<br>77|**CROSSTALK_ZON**<br>**E6**|crosstalk_amplitude_zone6, 32-bit value, LSB first (little-endian)||||
|0x78-<br>7B|**CROSSTALK_ZON**<br>**E7**|crosstalk_amplitude_zone7, 32-bit value, LSB first (little-endian)||||
|0x7C-<br>7F|**CROSSTALK_ZON**<br>**E8**|crosstalk_amplitude_zone8, 32-bit value, LSB first (little-endian)||||
|0x80-<br>83|**CROSSTALK_ZON**<br>**E9**|crosstalk_amplitude_zone9, 32-bit value, LSB first (little-endian)||||
|…|**…**|||||
|0xB8-|**CROSSTALK_ZON**|crosstalk_amplitude_zone1 time muxed, 32-bit value, LSB first (little-endian) – for 4x4|||mode|
|BB|**E1_TMUX**|this represents the zone 10 as described in section 7.4.3||||
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TMF8820/21/28 Register Description
|**Addr**|**Name**|**<D7>**<br>**<D6>**<br>**<D5>**<br>**<D4>**<br>**<D3>**<br>**<D2>**|**<D1>**|**<D0>**||
|---|---|---|---|---|---|
|0xBC-<br>BF|**CROSSTALK_ZON**<br>**E2_TMUX**|crosstalk_amplitude_zone2 time muxed, 32-bit value, LSB first (little-endian)||||
|0xC0-<br>C3|**CROSSTALK_ZON**<br>**E3_TMUX**|crosstalk_amplitude_zone3 time muxed, 32-bit value, LSB first (little-endian)||||
|0xC4-<br>C7|**CROSSTALK_ZON**<br>**E4_TMUX**|crosstalk_amplitude_zone4 time muxed, 32-bit value, LSB first (little-endian)||||
|0xC8-<br>CB|**CROSSTALK_ZON**<br>**E5_TMUX**|crosstalk_amplitude_zone5 time muxed, 32-bit value, LSB first (little-endian)||||
|0xCC-<br>CF|**CROSSTALK_ZON**<br>**E6_TMUX**|crosstalk_amplitude_zone6 time muxed, 32-bit value, LSB first (little-endian)||||
|0xD0-<br>D3|**CROSSTALK_ZON**<br>**E7_TMUX**|crosstalk_amplitude_zone7 time muxed, 32-bit value, LSB first (little-endian)||||
|0xD4-<br>D7|**CROSSTALK_ZON**<br>**E8_TMUX**|crosstalk_amplitude_zone8 time muxed, 32-bit value, LSB first (little-endian)||||
|0xD8-|**CROSSTALK_ZON**|crosstalk_amplitude_zone9 time muxed, 32-bit value, LSB first (little-endian) – only||used for||
|DB|**E9_TMUX**|3x6 mode or customized SPAD maps||||
|0xDC|**CALIBRATION_ST**<br>**ATUS_FC**|fc_status_during_cal - calibration status during factory calibration – copy of register<br>0x00 success, all other values are reporting an error during calibration||0x07 –||
|…|**…**|||||
|0xDF|**FACTORY_CALIBR**<br>**ATION_LAST**|factory_calibration_last||||
|**appid=0x03, cid_rid=0x81 – Raw Data Histograms**||||||
|0x24|**SUBPACKET_NUM**<br>**BER**|subpacket_number||||
|0x25|**SUBPACKET_PAY**<br>**LOAD**|subpacket_payload||||
|0x26|**SUBPACKET_CON**<br>**FIG**||subpacket_config|||
|0x27|**SUBPACKET_DAT**<br>**A0**|subpacket_data0||||
|…|**…**|||||
|0xA6|**SUBPACKET_DAT**<br>**A127**|subpacket_data127||||
|**appid=0x80 – Bootloader Registers**||||||
|0x08|**BL_CMD_STAT**|bl_cmd_stat||||
|0x09|**BL_SIZE**|bl_size||||
|0x0A|**BL_DATA**|bl_data0 … bl_data127 - size depends on bl_cmd_stat – can be from 0|to 128|||
|…|**…**|||||
|after<br>data|**BL_CSUM**|bl_csum – actual location depends on bl_cmd_stat – can be from 0x0A|to 0x8B|||
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TMF8820/21/28 Register Description
## 8.2 Any app_id - Register Description for All Application IDs
## **8.2.1 APPID Register (Address 0x00)**
## **Figure 49: APPID Register**
|**Addr: 0x00**<br>**APPID**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>appid<br>0<br>RO|Currently running application:|
||0x03<br>Measurement application running<br>(=application major revision)<br>Please allow 6 ms after<br>RAMREMAP_RESET before reading this<br>value.|
||0x80<br>Bootloader running|
## **8.2.2 MINOR Register (Address 0x01)**
**Figure 50: MINOR Register**
|**Addr: 0x01**|**Addr: 0x01**|**MINOR**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Application minor or bootloader revision|
|7:0|minor|0|RO|Please allow 6 ms after RAMREMAP_RESET|
|||||before reading this value.|
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## **8.2.3 ENABLE Register (Address 0xE0)**
## **Figure 51: ENABLE Register**
|**Addr: 0xE0**<br>**ENABLE**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|6<br>cpu_ready<br>0<br>RO|CPU is ready to handle I²C - if this bit is zero,<br>then only the registers 0xE0 and above are<br>useable, the memory mapped I²C space is not<br>used.<br>Bit gets set only explicitly by software,<br>therefore a functional and running firmware is<br>necessary for this bit to work.|
|5:4<br>powerup_select<br>0<br>RW|Select what to do at power up. Bits reside in<br>always-on domain and survive standby mode.<br>This bit is evaluated by software only and has<br>no effect on the circuit.<br>See ams OSRAM driver how to change a<br>running application and how to reset the<br>TMF8820/21/28.|
||**Value**<br>**Description**|
||0<br>Default – start bootloader|
||1<br>Start bootloader but do not go to<br>sleep|
||2<br>Start the application currently in<br>RAM|
||3<br>Reserved, do not use|
|0<br>pon<br>1<br>RW|1=Activate oscillator<br>0=Ask cpu to go to standby<br>Activating the oscillator is implemented in<br>hardware. Whenever this register is '0' and a<br>'1' is being written, the oscillator is being<br>started and CPU receives a PON1 interrupt. It<br>is implemented in the bootloader to execute a<br>reset at this point, but the application goes to<br>an IDLE state.<br>De-activating the oscillator is a software<br>assisted process. It is important that the CPU<br>powers down all modules properly before<br>turning off the oscillator, therefore this is<br>implemented in firmware. So writing a '0' to this<br>register will trigger an internal CPU interrupt.<br>The firmware, after powering down everything,<br>sets the device into standby state.|
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## **8.2.4 INT_STATUS Register (Address 0xE1)**
**Figure 52: INT_STATUS Register**
|**Addr: 0xE1**|**Addr: 0xE1**|**INT_STATUS**|**INT_STATUS**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7||0||Reserved – leave at 0|
|||||Interrupt status for one of the status registers has|
|||||been set to a non-zero value|
|6|int7|0|R_PUSH1|**Int7 status**. If bit is asserted, and int7_enab is|
|||||asserted as well, then the INT pin will be pulled|
|||||low. Writing a '1' here will clear int7 condition.|
|||||Interrupt status for a received command has been|
|||||handled (successfully or error)|
|5|int6|0|R_PUSH1|**Int6 status**. If bit is asserted, and int6_enab is|
|||||asserted as well, then the INT pin will be pulled|
|||||low. Writing a '1' here will clear int6 condition.|
|4||0||Reserved – leave at 0|
|||||Interrupt status for raw histogram is ready for|
|||||readout|
|3|int4|0|R_PUSH1|**Int4 status**. If bit is asserted, and int4_enab is|
|||||asserted as well, then the INT pin will be pulled|
|||||low. Writing a '1' here will clear int4 condition.|
|2||0||Reserved – leave at 0|
|||||Interrupt status for measurement result is ready|
|||||for readout|
|1|int2|0|R_PUSH1|**Int2 status**. If bit is asserted, and int2_enab is|
|||||asserted as well, then the INT pin will be pulled|
|||||low. Writing a '1' here will clear int2 condition.|
|0||0||Reserved – leave at 0|
(1) R_PUSH1: This register is cleared when writing a ‘1’ to this location. This allow exact control which interrupts are cleared and guarantees that no interrupts are lost.
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## **8.2.5 INT_ENAB Register (Address 0xE2)**
## **Figure 53: INT_ENAB Register**
|**Addr: 0xE2**|**Addr: 0xE2**|**INT_ENAB**|**INT_ENAB**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7||0||Reserved – leave at 0|
|||||Interrupt enable for one of the status registers has|
|6|int7_enab|0|RW|been set to a non-zero value<br>0=Disabled, 1=Enabled; INT output is active if int7|
|||||flag is "1"|
|||||Interrupt enable for a received command has|
|5|int6_enab|0|RW|been handled (successfully or error)<br>0=Disabled, 1=Enabled; INT output is active if int6|
|||||flag is "1"|
|4||0||Reserved – leave at 0|
|||||Interrupt enable for raw histogram is ready for|
|3|int4_enab|0|RW|readout<br>0=Disabled, 1=Enabled; INT output is active if int4|
|||||flag is "1"|
|2||0||Reserved – leave at 0|
|||||Interrupt enable for measurement result is ready|
|1|int2_enab|0|RW|for readout<br>0=Disabled, 1=Enabled; INT output is active if int2|
|||||flag is "1"|
|0||0||Reserved – leave at 0|
## **8.2.6 ID Register (Address 0xE3)**
**Figure 54: ID Register**
|**Addr: 0xE3**|**Addr: 0xE3**|**ID**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|5:0|id|08|RO|Chip ID, reads 08h – do not rely on register bits 6<br>and 7 of this register.|
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## **8.2.7 REVID Register (Address 0xE4)**
**Figure 55: REVID Register**
|**Addr: 0xE4**|**Addr: 0xE4**|**REVID**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|2:0|rev_id|NA|RO|Chip revision ID|
## 8.3 appid=0x03, any cid_rid - Main Application Registers
Following registers are only available if appid=0x03 (=measurement application). These registers are always available for appid=0x03 independently of register cid_rid.
## **8.3.1 PATCH Register (Address 0x02)**
**Figure 56: PATCH Register**
|**Addr: 0x02**|**Addr: 0x02**|**PATCH**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Application patch revision|
|7:0|patch|0|RO|Please allow 6 ms after RAMREMAP_RESET|
|||||before reading this value.|
## **8.3.2 BUILD_TYPE Register (Address 0x03)**
**Figure 57: BUILD_TYPE Register**
|**Addr: 0x03**|**Addr: 0x03**|**BUILD_TYPE**|**BUILD_TYPE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Application build revision|
|7:0|build|0|RO|Please allow 6 ms after RAMREMAP_RESET|
|||||before reading this value.|
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## **8.3.3 APPLICATION_STATUS Register (Address 0x04)**
**Figure 58: APPLICATION_STATUS Register**
|**Addr: 0x04**<br>**APPLICATION_STATUS**|**Addr: 0x04**<br>**APPLICATION_STATUS**|
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>app_status<br>0<br>RO|Status information about the application|
||**Value**<br>**Description**|
||0x00<br>SUCCESS - application has no error|
||0x01<br>ERR_BIST - histogram RAM BIST returned<br>more than 1 error in at least 1 TDC RAM and<br>cannot be repaired|
||0x02<br>ERR_APP_CANT_STOP_MEASURE - the<br>application could not terminate the<br>measurement state machine. A hard shut-<br>down of the measurement state machine was<br>done|
||0x03<br>ERR_APP_TIMER_OUT_OF_RANGE - upon<br>wakeup from timed sleep the timer value was<br>out of range. Internal program error (maybe<br>RAM lost content)|
||0x04<br>ERR_UNEXPECTED_RESET - host triggered<br>a CPU reset or SW did call SystemReset|
||0x05<br>WARNING_NO_FUSES_FOUND - fuses have<br>not been programmed|
## **8.3.4 MEASURE_STATUS Register (Address 0x05)**
**Figure 59: MEASURE_STATUS Register**
|**Addr: 0x05**<br>**MEASURE_STATUS**|**Addr: 0x05**<br>**MEASURE_STATUS**|
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>measure_status<br>0<br>RO|Status information about the measurement|
||**Value**<br>**Description**|
||0x00<br>SUCCESS – measurement state machine<br>has no error|
||0x11<br>ERR_MEASURE_VCSEL - VCSEL eye<br>safety failed|
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|**Addr: 0x05**<br>**MEASURE_STATUS**|**Addr: 0x05**<br>**MEASURE_STATUS**|
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||0x12<br>ERR_MEASURE_BDV - failed to find a<br>breakdown voltage|
||0x13<br>Deprecated|
||0x14<br>Deprecated|
||0x15<br>ERR_MEASURE_CFG_TOO_MANY -<br>tried to set a third configuration|
||0x16<br>ERR_MEASURE_NOT_STARTED - tried<br>to start a measurement before configuring<br>the state machine|
||0x17<br>ERR_MEASURE_BUFFER_RETURN -<br>tried to return a buffer twice to the state<br>machine|
||0x18<br>ERR_MEASURE_TDC_LOCKUP - when<br>this error code is set, the TDC locked up<br>due to a wrong setting of the Spread<br>Spectrum.|
## **8.3.5 ALGORITHM_STATUS Register (Address 0x06)**
**Figure 60: ALGORITHM_STATUS Register**
|**Addr: 0x06**<br>**ALGORITHM_STATUS**|**Addr: 0x06**<br>**ALGORITHM_STATUS**|
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>alg_status<br>0<br>RO|Status information about the algorithm|
||**Value**<br>**Description**|
||0x00<br>SUCCESS - Algorithm has no error|
||0x21<br>ERR_ALGORITHM_EC_FAILED -<br>Algorithm could not perform electrical<br>calibration (e.g. no two peaks found)|
||0x22<br>ERR_ALGORITHM_EC_BUFFER_ERROR<br>– Electrical calibration function was called,<br>but no buffer was provided|
||0x23<br>ERR_ALGORITHM_EC_CFG_MISMATCH<br>_ERROR – Electrical calibration function<br>got mismatched config index|
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## **8.3.6 CALIBRATION_STATUS Register (Address 0x07)**
## **Figure 61: CALIBRATION_STATUS Register**
|**Addr: 0x07**<br>**CALIBRATION_STATUS**|**Addr: 0x07**<br>**CALIBRATION_STATUS**|
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>fc_status<br>0<br>RO|Status about the factory calibration (fc)|
||**Value**<br>**Description**|
||0x00<br>SUCCESS - fc has no error|
||0x31<br>WARNING_NO_FACTORY_CALIBR<br>ATION - No factory calibration<br>available, device performance may<br>be degraded.|
||0x32<br>WARNING_FACTORY_CALIBRATI<br>ON_DOES_NOT_MATCH_SPAD_M<br>ASK - Factory calibration and SPAD<br>mask do not correlate, device<br>performance may be degraded.|
## **8.3.7 CMD_STAT Register (Address 0x08)**
**Figure 62: CMD_STAT Register**
|**Addr: 0x08**<br>**CMD_STAT**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>cmd_stat<br>0<br>RW|Host writes to this register a command. Commands<br>have the value range 0x10...0xFF. Device writes to<br>this register a status. Status have the value range<br>0x00…0x0F|
||**Value**<br>**Description**|
||0x10<br>CMD_MEASURE - Measure: start a cyclic<br>measurement according to the<br>configuration|
||0x11<br>CMD_CLEAR_STATUS - Clear Status:<br>clear all status registers (note that a new<br>measurement clears them as well)|
||0x12<br>CMD_GPIO – GPIO - configure GPIO<br>pins according to the configuration|
||0x13<br>CMD_RESERVED_EC - Reserved, do<br>not use|
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|**Addr: 0x08**<br>**CMD_STAT**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||0x14<br>CMD_RESERVED_AH - Reserved, do<br>not use|
||0x15<br>CMD_WRITE_CONFIG_PAGE - Write<br>Configuration page (whatever page has<br>been loaded to registers 0x20 and<br>following will be written to the device)|
||0x16<br>CMD_LOAD_CONFIG_PAGE_COMMON<br>- Load Configuration Page 0 - common<br>configuration|
||0x17<br>CMD_LOAD_CONFIG_PAGE_SPAD_1 -<br>Load Configuration Page 1 - SPAD<br>configuration|
||0x18<br>CMD_LOAD_CONFIG_PAGE_SPAD_2 -<br>Load Configuration Page 2 - SPAD<br>configuration alternate measurement|
||0x19<br>CMD_LOAD_CONFIG_PAGE_FACTOR<br>Y_CALIB - Load Configuration Page 3 -<br>factory calibration|
||0x20<br>CMD_FACTORY_CALIBRATION -<br>Perform Factory Calibration|
||0x21<br>CMD_I2C_SLAVE_ADDRESS -<br>Command that sets the device's I²C slave<br>address to the address specified in config<br>page common ( see registers<br>I2C_SLAVE_ADDRESS and<br>I2C_ADDR_CHANGE )|
||0x65<br>Force device to TMF8820/TMF8821<br>mode via a cold start (TMF8828 only)|
||0x6C<br>Force device to TMF8828 mode via a<br>cold start (TMF8828 only)|
||0xFE<br>CMD_RESET - Reset: a software system<br>reset shall be executed|
||0xFF<br>CMD_STOP - Stop: Abort any ongoing<br>measurement|
||**Status Results (0x00-0x0F)**|
||0x00<br>STAT_OK - Ok, command accepted and<br>successfully executed|
||0x01<br>STAT_ACCEPTED - Command accepted<br>and being executed, must send a STOP<br>command to halt continues execution|
||0x02<br>STAT_ERR_CONFIG - ERROR<br>configuration not accepted, ready to<br>accept new command|
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|**Addr: 0x08**<br>**CMD_STAT**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||0x03<br>STAT_ERR_APPLICATION - ERROR<br>application encountered a severe error<br>and stopped (more details see register<br>APPLICATION_STATUS), ready to<br>accept new command|
||0x04<br>STAT_ERR_WAKEUP_TIMED - ERROR<br>wakeup timed, severe internal error,<br>device should be power cycled|
||0x05<br>STAT_ERR_RESET_UNEXPECTED -<br>ERROR unexpected reset, severe<br>internal error, device should be power<br>cycles|
||0x06<br>STAT_ERR_UNKNOWN_CMD - ERROR<br>unknown command|
||0x07<br>STAT_ERR_NO_REF_SPAD - ERROR<br>after screamer masking no reference<br>SPAD is selected anymore, change your<br>enable mask|
||0x08<br>reserved|
||0x09<br>STAT_ERR_UNKNOWN_CID - ERROR<br>tried to write a config page with unknown<br>CID, ready to accept new command|
||0x0a<br>STAT_WARNING_CONFIG_SPAD_1_N<br>OT_ACCEPTED - WARNING writing of<br>config SPAD 1 page was ignored, as pre-<br>selected SPAD mask is configured in<br>common page|
||0x0b<br>STAT_WARNING_CONFIG_SPAD_2_N<br>OT_ACCEPTED - WARNING writing of<br>config SPAD 2 page was ignored, as pre-<br>selected SPAD mask, or single user<br>defined is configured in common page|
||0x0c<br>STAT_WARNING_OSC_TRIM_NOT_AC<br>CEPTED - WARNING new osc trim value<br>was ignored, as allow_osc_retrim was not<br>set in register POWER_CONFIG|
||0x0d<br>STAT_WARNING_I2C_ADDRESS_NOT<br>_ACCEPTED - WARNING did not accept<br>new I²C address, as GPIOs did not match<br>switching condition|
||0x0e<br>STAT_ERR_UNKNOWN_MODE -<br>ERROR this mode is not supported, read<br>to accept a new command|
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## **8.3.8 PREV_CMD Register (Address 0x09)**
**Figure 63: PREV_CMD Register**
|**Addr: 0x09**|**Addr: 0x09**|**PREV_CMD**|**PREV_CMD**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|prev_cmd|0|RO|The previously executed command by the device -<br>RO to host|
## **8.3.9 MODE Register (Address 0x10)**
**Figure 64: MODE Register**
|**Addr: 0x10**<br>**MODE**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>mode<br>0<br>RO|Currently running application:|
||0x00<br>TMF8820/21/28 mode|
||0x08<br>TMF8828 mode|
## **8.3.10 LIVE_BEAT Register (Address 0x0A)**
**Figure 65: LIVE_BEAT Register**
|**Addr: 0x0A**|**Addr: 0x0A**|**LIVE_BEAT**|**LIVE_BEAT**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||A free running counter that counts every time the|
|7:0|live_beat|0|RO|application wakes up from sleep (WFI/WFE) the<br>value will be reset to 0 every time the device|
|||||wakes up from standby or standby-timed.|
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## **8.3.11 ACTIVE_RANGE Register (Address 0x19)**
**Figure 66: ACTIVE_RANGE Register**
|**Addr: 0x19**<br>**ACTIVE_RANGE**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Acces**<br>**s**|**Bit Description**|
|7:0<br>active_range<br>Depends on<br>EVM release<br>RW|The register switches between short range and long<br>range mode – see section 7.4.5 Short Range High<br>Accuracy Mode - and is only implemented for EVM<br>release 3v52 or higher.|
||**Value**<br>**Description**|
||0x00<br>Accuracy mode not supported (default if<br>function is not supported)|
||0x6E<br>Short range mode|
||0x6F<br>Long range mode (default if function is<br>supported)|
## **8.3.12 SERIAL_NUMBER_0 Register (Address 0x1C)**
## **Figure 67: SERIAL_NUMBER_0 Register**
|**Addr: 0x1C**|**Addr: 0x1C**|**SERIAL_NUMBER_0**|**SERIAL_NUMBER_0**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|serial_number[7:0]|NA|RO|Serial number bits 0-7|
## **8.3.13 SERIAL_NUMBER_1 Register (Address 0x1D)**
**Figure 68: SERIAL_NUMBER_1 Register**
|**Addr: 0x1D**|**Addr: 0x1D**|**SERIAL_NUMBER_1**|**SERIAL_NUMBER_1**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|7:0|serial_number[15:8]|NA|RO|Serial number bits 8-15|
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## **8.3.14 SERIAL_NUMBER_2 Register (Address 0x1E)**
**Figure 69:**
**SERIAL_NUMBER_2 Register**
|**Addr: 0x1E**|**Addr: 0x1E**|**SERIAL_NUMBER_2**|**SERIAL_NUMBER_2**|**SERIAL_NUMBER_2**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|7:0|serial_number[23:16]|<br>NA|RO|Serial number bits 16-23|
## **8.3.15 SERIAL_NUMBER_3 Register (Address 0x1F)**
**Figure 70:**
**SERIAL_NUMBER_3 Register**
|**Addr: 0x1F**<br>**SERIAL_NUMBER_3**|**Addr: 0x1F**<br>**SERIAL_NUMBER_3**|
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**<br>**Bit Description**||
|7:0<br>serial_number[31:24]<br>NA<br>RO<br>Serial number bits 24-31||
|**CONFIG_RESULT Register (Address 0x20)**<br>CONFIG_RESULT is the paging register, which defines what content is accessible in registers 0x24-<br>0xDF.<br>**Figure 71:**<br>**CONFIG_RESULT Register**||
|**Addr: 0x20**<br>**CONFIG_RESULT**||
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>cid_rid<br>0<br>RO|This register defines the content of registers 0x24-<br>0xDF; this is a page selection and the actual content is<br>paged into registers 0x24-0xDF<br>This register is modified using command triggered by<br>setting register cmd_stat – do not change this register<br>directly.|
||**Value**<br>**Description**|
||0x10<br>MEASUREMENT_RESULT - result<br>record of a measurement|
||0x16<br>COMMON_CID - COMMON configuration<br>page|
## **8.3.16 CONFIG_RESULT Register (Address 0x20)**
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|**Addr: 0x20**<br>**CONFIG_RESULT**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||0x17<br>SPAD_1_CID – User defined SPAD<br>configuration page 1 (first measurement<br>in time multiplexed mode)|
||0x18<br>SPAD_2_CID – User defined SPAD<br>configuration page 2 (2nd measurement<br>in time multiplexed mode)|
||0x19<br>FACTORY_CALIBRATION_CID - factory<br>calibration page ID|
||0x81<br>HIST_RAW_CID: Raw data histogram|
## **8.3.17 TID Register (Address 0x21)**
**Figure 72: TID Register**
|**Addr: 0x21**|**Addr: 0x21**|**TID**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|tid|0|RO|Transaction ID register; changes on every<br>transaction|
## **8.3.18 SIZE_LSB Register (Address 0x22)**
**Figure 73: SIZE_LSB Register**
|**Addr: 0x22**|**Addr: 0x22**|**SIZE_LSB**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||LSB of total packet size – together with|
|7:0|size[7:0]|0|RO|SIZE_MSB register define the size of the payload|
|||||starting from register 0x24 onwards.|
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## **8.3.19 SIZE_MSB Register (Address 0x23)**
## **Figure 74:**
## **SIZE_MSB Register**
|**Addr: 0x23**|**Addr: 0x23**|**SIZE_MSB**|**SIZE_MSB**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||MSB of total packet size – together with|
|7:0|size[15:8]|0|RO|SIZE_LSB register define the size of the payload|
|||||starting from register 0x24 onwards.|
## 8.4 appid=0x03, cid_rid=0x10 – Measurement Results
Following registers are only available if appid=0x03 and cid_rid=0x10 – measurement results.
## **8.4.1 RESULT_NUMBER Register (Address 0x24)**
**Figure 75: RESULT_NUMBER Register**
|**Addr: 0x24**|**Addr: 0x24**|**RESULT_NUMBER**|**RESULT_NUMBER**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|number|0|RO|Running counter or results|
## **Information**
Please note that in the TMF8828 mode, the lower 2 bits of RESULT_NUMBER (1:0) report SUBCAPTURE and the upper 6 bits (7:2) are the running counter of results.
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## **8.4.2 TEMPERATURE Register (Address 0x25)**
**Figure 76: TEMPERATURE Register**
|**Addr: 0x25**|**Addr: 0x25**|**TEMPERATURE**|**TEMPERATURE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|temperature|0|RO|Temperature of the sensor DIE in °Celsius, range<br>is -128..127|
## **8.4.3 NUMBER_VALID_RESULTS Register (Address 0x26)**
**Figure 77: NUMBER_VALID_RESULTS Register**
|**Addr: 0x26**|**Addr: 0x26**|**NUMBER_VALID_RESULTS**|**NUMBER_VALID_RESULTS**|**NUMBER_VALID_RESULTS**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|valid_results|0|RO|How many zones have reported 1 or 2 results<br>(also no-target counts as a valid result here)|
## **8.4.4 AMBIENT_LIGHT_0 Register (Address 0x28)**
**Figure 78: AMBIENT_LIGHT_0 Register**
|**Addr: 0x28**|**Addr: 0x28**|**AMBIENT_LIGHT_0**|**AMBIENT_LIGHT_0**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Summed IR ambient light received by all channels|
|7:0|ambient[7:0]|0|RO|bits 0-7<br>Note: This is not a linear measurement of the IR|
|||||light received.|
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## **8.4.5 AMBIENT_LIGHT_1 Register (Address 0x29)**
**Figure 79: AMBIENT_LIGHT_1 Register**
|**Addr: 0x29**|**Addr: 0x29**|**AMBIENT_LIGHT_1**|**AMBIENT_LIGHT_1**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Summed IR ambient light received by all channels|
|7:0|ambient[15:8]|0|RO|bits 8-15<br>Note: This is not a linear measurement of the IR|
|||||light received.|
## **8.4.6 AMBIENT_LIGHT_2 Register (Address 0x2A)**
**Figure 80: AMBIENT_LIGHT_2 Register**
|**Addr: 0x2A**|**Addr: 0x2A**|**AMBIENT_LIGHT_2**|**AMBIENT_LIGHT_2**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Summed IR ambient light received by all channels|
|7:0|ambient[23:16]|<br>0|RO|bits 16-23<br>Note: This is not a linear measurement of the IR|
|||||light received.|
## **8.4.7 AMBIENT_LIGHT_3 Register (Address 0x2B)**
**Figure 81: AMBIENT_LIGHT_3 Register**
|**Addr: 0x2B**|**Addr: 0x2B**|**AMBIENT_LIGHT_3**|**AMBIENT_LIGHT_3**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Summed IR ambient light received by all channels|
|7:0|ambient[31:24]|<br>0|RO|bits 24-31<br>Note: This is not a linear measurement of the IR|
|||||light received.|
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TMF8820/21/28 Register Description
## **8.4.8 PHOTON_COUNT_0 Register (Address 0x2C)**
## **Figure 82:**
**PHOTON_COUNT_0 Register**
|**Addr: 0x2C**|**Addr: 0x2C**|**PHOTON_COUNT_0**|**PHOTON_COUNT_0**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Summed weight of the target peak of the|
|7:0|photon_count[7:0]|<br>0|RO|closest target and all targets within 10 cm of|
|||||this target. Bits 0-7|
## **8.4.9 PHOTON_COUNT_1 Register (Address 0x2D)**
## **Figure 83:**
## **PHOTON_COUNT_1 Register**
|**Addr: 0x2D**|**Addr: 0x2D**|**PHOTON_COUNT_1**|**PHOTON_COUNT_1**|**PHOTON_COUNT_1**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Summed weight of the target peak of the|
|7:0|photon_count[15:8]|0|RO|closest target and all targets within 10 cm of|
|||||this target. Bits 8-15|
## **8.4.10 PHOTON_COUNT_2 Register (Address 0x2E)**
**Figure 84: PHOTON_COUNT_2 Register**
|**Addr: 0x2E**|**Addr: 0x2E**|**PHOTON_COUNT_2**|**PHOTON_COUNT_2**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Summed weight of the target peak of the|
|7:0|photon_count[23:16]|<br>0|RO|closest target and all targets within 10 cm of|
|||||this target. Bits 16-23|
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## **8.4.11 PHOTON_COUNT_3 Register (Address 0x2F)**
## **Figure 85:**
**PHOTON_COUNT_3 Register**
|**Addr: 0x2F**|**Addr: 0x2F**|**PHOTON_COUNT_3**|**PHOTON_COUNT_3**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Summed weight of the target peak of the|
|7:0|photon_count[31:24]|0|RO|closest target and all targets within 10 cm of|
|||||this target. Bits 24-31|
## **8.4.12 REFERENCE_COUNT_0 Register (Address 0x30)**
## **Figure 86:**
**REFERENCE_COUNT_0 Register**
|**Addr: 0x30**|**Addr: 0x30**|**REFERENCE_COUNT_0**|**REFERENCE_COUNT_0**|**REFERENCE_COUNT_0**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|reference_count[7:0]|0|RO|Weight of the reference channel peak bits<br>0-7|
## **8.4.13 REFERENCE_COUNT_1 Register (Address 0x31)**
## **Figure 87:**
**REFERENCE_COUNT_1 Register**
|**Addr: 0x31**|**Addr: 0x31**|**REFERENCE_COUNT_1**|**REFERENCE_COUNT_1**|**REFERENCE_COUNT_1**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|7:0|reference_count[15:8]|0|RO|Weight of the reference channel peak bits<br>8-15|
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## **8.4.14 REFERENCE_COUNT_2 Register (Address 0x32)**
## **Figure 88:**
**REFERENCE_COUNT_2 Register**
|**Addr: 0x32**|**Addr: 0x32**|**REFERENCE_COUNT_2**|**REFERENCE_COUNT_2**|**REFERENCE_COUNT_2**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|7:0|reference_count[23:16]|<br>0|RO|Weight of the reference channel peak bits<br>16-23|
## **8.4.15 REFERENCE_COUNT_3 Register (Address 0x33)**
**Figure 89: REFERENCE_COUNT_3 Register**
|**Addr: 0x33**|**Addr: 0x33**|**REFERENCE_COUNT_3**|**REFERENCE_COUNT_3**|**REFERENCE_COUNT_3**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|7:0|reference_count[31:24]|0|RO|Weight of the reference channel peak bits<br>24-31|
## **8.4.16 SYS_TICK_0 Register (Address 0x34)**
**Figure 90: SYS_TICK_0 Register**
|**Addr: 0x34**|**Addr: 0x34**|**SYS_TICK_0**|**SYS_TICK_0**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||System tick with a granularity of 5 MHz (200 ns) -|
|||||bits 0-7 do a blockread starting at 0x20 for correct|
|7:0|sys_tick[7:0]|0|RO|update.<br>Correct timestamps will always have bit 0 set – if|
|||||bit 0 is not set, the timestamp shall be ignored and|
|||||not used for clock skew correction.|
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## **8.4.17 SYS_TICK_1 Register (Address 0x35)**
**Figure 91:**
**SYS_TICK_1 Register**
|**Addr: 0x35**|**Addr: 0x35**|**SYS_TICK_1**|**SYS_TICK_1**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|<br>**Bit Description**|
|7:0|sys_tick[15:8]|0|RO|System tick with a granularity of 5 MHz - bits 8-15<br>do a blockread starting at 0x20 for correct update|
## **8.4.18 SYS_TICK_2 Register (Address 0x36)**
**Figure 92: SYS_TICK_2 Register**
|**Addr: 0x36**|**Addr: 0x36**|**SYS_TICK_2**|**SYS_TICK_2**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|<br>**Bit Description**|
|7:0|sys_tick[23:16]|<br>0|RO|System tick with a granularity of 5 MHz - bits 16-23<br>do a blockread starting at 0x20 for correct update|
## **8.4.19 SYS_TICK_3 Register (Address 0x37)**
**Figure 93: SYS_TICK_3 Register**
|**Addr: 0x37**|**Addr: 0x37**|**SYS_TICK_3**|**SYS_TICK_3**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|<br>**Bit Description**|
|7:0|sys_tick[31:24]|<br>0|RO|System tick with a granularity of 5 MHz - bits 24-31<br>do a blockread starting at 0x20 for correct update|
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TMF8820/21/28 Register Description
## **8.4.20 RES_CONFIDENCE_0 Register (Address 0x38)**
**Figure 94:**
**RES_CONFIDENCE_0 Register**
|**Addr: 0x38**|**Addr: 0x38**|**RES_CONFIDENCE_0**|**RES_CONFIDENCE_0**|**RES_CONFIDENCE_0**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Confidence rating of zone 1|
|7:0|confidence0|0|RO|Range 0-255 where<br>0 = No object detected|
|||||255 = Highest confidence|
## **8.4.21 RES_DISTANCE_0_LSB Register (Address 0x39)**
**Figure 95: RES_DISTANCE_0_LSB Register**
|**Addr: 0x39**|**Addr: 0x39**|**RES_DISTANCE_0_LSB**|**RES_DISTANCE_0_LSB**|**RES_DISTANCE_0_LSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|distance0[7:0]|0|RO|Distance result in [mm] of zone 1 bits 0-7|
## **8.4.22 RES_DISTANCE_0_MSB Register (Address 0x3A)**
## **Figure 96:**
**RES_DISTANCE_0_MSB Register**
|**Addr: 0x3A**|**Addr: 0x3A**|**RES_DISTANCE_0_MSB**|**RES_DISTANCE_0_MSB**|**RES_DISTANCE_0_MSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|distance0[15:8]|<br>0|RO|Distance result in [mm] of zone 1 bits 8-15|
## **8.4.23 Other Confidence / Distance Results Register (Address 0x3B-0xA3)**
Subsequent registers store the result for confidence, distance LSB and distance MSB in same order as RES_CONFIDENCE_0, RES_DISTANCE_0_LSB and RES_DISTANCE_0_MSB for zone 2 to the last zone of the selected mode (space reserved until register 0xA3).
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TMF8820/21/28 Register Description
## 8.5 appid=0x03, cid_rid=0x16 – Configuration Page
Following registers are only available if appid=0x03 and cid_rid=0x16 – configuration page.
## **8.5.1 PERIOD_MS_LSB Register (Address 0x24)**
**Figure 97:**
**PERIOD_MS_LSB Register**
|**Addr: 0x24**|**Addr: 0x24**|**PERIOD_MS_LSB**|**PERIOD_MS_LSB**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|period[7:0]|33|RW|Measurement period in milliseconds – bits 0-7|
## **8.5.2 PERIOD_MS_MSB Register (Address 0x25)**
**Figure 98: PERIOD_MS_MSB Register**
|**Addr: 0x25**|**Addr: 0x25**|**PERIOD_MS_MSB**|**PERIOD_MS_MSB**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|period[15:8]|0|RW|Measurement period in milliseconds – bits 8-15|
## **8.5.3 KILO_ITERATIONS_LSB Register (Address 0x26)**
**Figure 99: KILO_ITERATIONS_LSB Register**
|**Addr: 0x26**|**Addr: 0x26**|**KILO_ITERATIONS_LSB**|**KILO_ITERATIONS_LSB**|**KILO_ITERATIONS_LSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|iterations[7:0]|25|RW|Measurement iterations times 1024 – bits 0-7<br>e.g. 537 represents 549888 iterations|
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TMF8820/21/28 Register Description
## **8.5.4 KILO_ITERATIONS_MSB Register (Address 0x27)**
**Figure 100:**
**KILO_ITERATIONS_MSB Register**
|**Addr: 0x27**|**Addr: 0x27**|**KILO_ITERATIONS_MSB**|**KILO_ITERATIONS_MSB**|**KILO_ITERATIONS_MSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|iterations[15:8]|<br>2|RW|Measurement iterations times 1024 – bits 8-15<br>e.g. 537 represents 549888 iterations|
## **8.5.5 INT_THRESHOLD_LOW_LSB Register (Address 0x28)**
**Figure 101:**
**INT_THRESHOLD_LOW_LSB Register**
|**Addr: 0x28**|**Addr: 0x28**|**INT_THRESHOLD_LOW_LSB**|**INT_THRESHOLD_LOW_LSB**|**INT_THRESHOLD_LOW_LSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Bits 0-7 of int_threshold_low - if|
|||||int_persistance>0 an interrupt for a result|
|7:0|int_threshold_low[7:0]|0|RW|will only be raised if any of the object<br>distances enabled by int_zone_mask is|
|||||farther than int_threshold_low[mm] and|
|||||closer than int_threshold_high[mm]|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
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TMF8820/21/28 Register Description
## **8.5.6 INT_THRESHOLD_LOW_MSB Register (Address 0x29)**
**Figure 102:**
**INT_THRESHOLD_LOW_MSB Register**
|**Addr: 0x29**|**Addr: 0x29**|**INT_THRESHOLD_LOW_MSB**|**INT_THRESHOLD_LOW_MSB**|**INT_THRESHOLD_LOW_MSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Bits 8-15 of int_threshold_low – if|
|||||int_persistance>0 an interrupt for a result|
|7:0|int_threshold_low[15:8]|<br>0|RW|will only be raised if any of the object<br>distances enabled by int_zone_mask is|
|||||farther than int_threshold_low[mm] and|
|||||closer than int_threshold_high[mm]|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
## **8.5.7 INT_THRESHOLD_HIGH_LSB Register (Address 0x2A)**
## **Figure 103:**
**INT_THRESHOLD_HIGH_LSB Register**
|**Addr: 0x2A**|**Addr: 0x2A**|**INT_THRESHOLD_HIGH_LSB**|**INT_THRESHOLD_HIGH_LSB**|**INT_THRESHOLD_HIGH_LSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Bits 0-7 of int_threshold_high – if|
|||||int_persistance>0 an interrupt for a result|
|7:0|int_threshold_high[7:0]|0|RW|will only be raised if any of the object<br>distances enabled by int_zone_mask is|
|||||farther than int_threshold_low[mm] and|
|||||closer than int_threshold_high[mm]|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
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TMF8820/21/28 Register Description
## **8.5.8 INT_THRESHOLD_HIGH_MSB Register (Address 0x2B)**
## **Figure 104:**
**INT_THRESHOLD_HIGH_MSB Register**
|**Addr: 0x2B**|**Addr: 0x2B**|**INT_THRESHOLD_HIGH_MSB**|**INT_THRESHOLD_HIGH_MSB**|**INT_THRESHOLD_HIGH_MSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Bits 8-15 of int_threshold_high – if|
|||||int_persistance>0 an interrupt for a result|
|7:0|int_threshold_high[15:8]|0|RW|will only be raised if any of the object<br>distances enabled by int_zone_mask is|
|||||farther than int_threshold_low[mm] and|
|||||closer than int_threshold_high[mm]|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
## **8.5.9 INT_ZONE_MASK_0 Register (Address 0x2C)**
## **Figure 105:**
## **INT_ZONE_MASK_0 Register**
|**Addr: 0x2C**|**Addr: 0x2C**|**INT_ZONE_MASK_0**|**INT_ZONE_MASK_0**|**INT_ZONE_MASK_0**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||Bits 0-7 of int_zone_mask – if|
|||||int_persistance>0 an interrupt for a result|
|||||will only be raised if any of the object|
|||||distances enabled by int_zone_mask is|
|||||farther than int_threshold_low[mm] and|
|7:0|int_zone_mask[7:0]|0|RW|closer than int_threshold_high[mm]|
|||||Bit 0 – Zone 1|
|||||Bit 1 – Zone 2|
|||||…|
|||||Bit 7 – Zone 8|
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TMF8820/21/28 Register Description
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
## **8.5.10 INT_ZONE_MASK_1 Register (Address 0x2D)**
## **Figure 106:**
## **INT_ZONE_MASK_1 Register**
|**Addr: 0x2D**|**Addr: 0x2D**|**INT_ZONE_MASK_1**|**INT_ZONE_MASK_1**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Bits 8-15 of int_zone_mask – If|
|||||int_persistance>0 an interrupt for a|
|||||result will only be raised if any of the|
|||||object distances enabled by|
|||||int_zone_mask is farther than|
|7:0|int_zone_mask[15:8]|0|RW|int_threshold_low[mm] and closer than<br>int_threshold_high[mm]|
|||||Bit 0 – Zone 9|
|||||Bit 1 – Zone 10|
|||||…|
|||||Bit 7 – Zone 16|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
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TMF8820/21/28 Register Description
## **8.5.11 INT_ZONE_MASK_2 Register (Address 0x2E)**
## **Figure 107:**
**INT_ZONE_MASK_2 Register**
|**Addr: 0x2E**|**Addr: 0x2E**|**INT_ZONE_MASK_2**|**INT_ZONE_MASK_2**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Bits 16-17 of int_zone_mask – if|
|||||int_persistance>0 an interrupt for a|
|||||result will only be raised if any of the|
|||||object distances enabled by|
|1:0|int_zone_mask[17:16]|0|RW|int_zone_mask is farther than<br>int_threshold_low[mm] and closer than|
|||||int_threshold_high[mm]|
|||||Bit 0 – Zone 17|
|||||Bit 1 – Zone 18|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
## **8.5.12 INT_PERSISTENCE Register (Address 0x2F)**
## **Figure 108: INT_PERSISTENCE Register**
|**Addr: 0x2F**|**Addr: 0x2F**|**INT_PERSISTENCE**|**INT_PERSISTENCE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Number of consecutive measurements|
|||||that find a target inside the threshold|
|||||range to trigger an interrupt.|
|||||0 means each measurement that finds a|
|7:0|int_persistence|0|RW|target inside the threshold range will<br>trigger an interrupt.|
|||||1 means there have to be two|
|||||consecutive measurements that find a|
|||||target inside the threshold range will|
|||||trigger an interrupt.|
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TMF8820/21/28 Register Description
|**Addr: 0x2F**|**Addr: 0x2F**|**INT_PERSISTENCE**|**INT_PERSISTENCE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||For interrupt masking function to work,|
|||||also set distances=1 (register 0x35) and|
|||||histogram=0 (register 0x39)|
|||||If int_persistance>0 an interrupt for a|
|||||result will only be raised if any of the|
|||||object distances enabled by|
|||||int_zone_mask is farther than|
|||||int_threshold_low[mm] and closer than|
|||||int_threshold_high[mm]|
## **Information**
Please note that in TMF8828 mode, the device does not have the ability to generate an interrupt based on threshold excursions and as such registers at addresses from 0x28 to 0x2F are ignored.
## **8.5.13 CONFIDENCE_THRESHOLD Register (Address 0x30)**
**Figure 109: CONFIDENCE_THRESHOLD Register**
|**Addr: 0x30**|**Addr: 0x30**|**CONFIDENCE_THRESHOLD**|**CONFIDENCE_THRESHOLD**|**CONFIDENCE_THRESHOLD**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Only objects which have a confidence|
|7:0|confidence_threshold|<br>6|RW|level equal or higher than this will be|
|||||reported.|
## **8.5.14 GPIO_0 Register (Address 0x31)**
**Figure 110: GPIO_0 Register**
|**Addr: 0x31**<br>**GPIO_0**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:6<br>driver_strength0<br>0<br>RW|Pin GPIO0 driver strength setting|
||**Value**<br>**Description**|
||0<br>Default setting|
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TMF8820/21/28 Register Description
|**Addr: 0x31**<br>**GPIO_0**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||1<br>2x driving strength|
||2<br>3x driving strength|
||3<br>4x driving strength|
|4:3<br>pre_delay0<br>0<br>RW|Pin GPIO0 pre-delay setting only for gpio0=3 or 4|
||**Value**<br>**Description**|
||0<br>No delay|
||1<br>GPIO0 is asserted 100 µs before the<br>VCSEL pulse|
||2<br>GPIO0 is asserted 200 µs before the<br>VCSEL pulse|
|2:0<br>gpio0<br>0<br>RW|Pin GPIO0 configuration|
||**Value**<br>**Description**|
||0<br>Tristate|
||1<br>Input active high|
||2<br>Input active low|
||3<br>Output active low when VCSEL is<br>pulsing – do not set gpio1 to 3 or 4 if<br>this is used|
||4<br>Output active high when VCSEL is<br>pulsing – do not set gpio1 to 3 or 4 if<br>this is used|
||5<br>Output always high|
||6<br>Output always low|
## **8.5.15 GPIO_1 Register (Address 0x32)**
**Figure 111: GPIO_1 Register**
|**Addr: 0x32**<br>**GPIO_1**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:6<br>driver_strength1<br>0<br>RW|Pin GPIO1 driver strength setting|
||**Value**<br>**Description**|
||0<br>Default setting|
||1<br>2x driving strength|
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|**Addr: 0x32**<br>**GPIO_1**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||2<br>3x driving strength|
||3<br>4x driving strength|
|4:3<br>pre_delay1<br>0<br>RW|Pin GPIO1 pre-delay setting only for gpio0=3 or 4|
||**Value**<br>**Description**|
||0<br>No delay|
||1<br>GPIO1 is asserted 100 µs before the<br>VCSEL pulse|
||2<br>GPIO1 is asserted 200 µs before the<br>VCSEL pulse|
|2:0<br>gpio1<br>0<br>RW|Pin GPIO1 configuration|
||**Value**<br>**Description**|
||0<br>Tristate|
||1<br>Input active high|
||2<br>Input active low|
||3<br>Output active low when VCSEL is<br>pulsing – do not set gpio0 to 3 or 4 if<br>this is used|
||4<br>Output active high when VCSEL is<br>pulsing – do not set gpio0 to 3 or 4 if<br>this is used|
||5<br>Output always high|
||6<br>Output always low|
## **8.5.16 POWER_CFG Register (Address 0x33)**
**Figure 112: POWER_CFG Register**
|**Addr:**|**0x33**|**POWER_CFG**|**POWER_CFG**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||If possible go to standby timed to save power|
|7|goto_standby_timed|<br>0|RW|when waiting for measurement period to expire|
|||||(PERIOD_MS_*)|
|6|low_power_osc_on|0|RW|Use low power oscillator in standby timed mode|
|5|keep_pll_running|0|RW|In idle mode keep PLL running|
|4||0|RW|Reserved – keep at 0|
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TMF8820/21/28 Register Description
|**Addr:**|**0x33**|**POWER_CFG**|**POWER_CFG**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|3|allow_osc_retrim|0|RW|If set oscillator retrimming is allowed (register<br>OSC_TRIM_VALUE_*)|
|||||If set the INT pin has pulse behavior and shall|
|2|pulse_interrupt|0|RW|not be cleared by the host, if cleared it is a level<br>interrupt that shall be cleared by the host before|
|||||reading the results|
|1:0|reserved|0|RW|Reserved – keep at 0|
## **8.5.17 SPAD_MAP_ID Register (Address 0x34)**
**Figure 113: SPAD_MAP_ID Register**
|**Addr: 0x34**<br>**SPAD_MAP_ID**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|3:0<br>spad_map_id<br>1<br>RW|Select SPAD map, which defines FoV|
||**Value**<br>**Description**|
||0<br>Reserved – do not use|
||1<br>3x3 normal mode 33°x32° FoV|
||2<br>3x3 macro 1 mode 33°x47° FoV off center (use<br>macro 1 or macro 2 depending if camera is<br>above or below TMF8820/21/28).|
||3<br>3x3 macro 2 mode 33°x47° FoV|
||4<br>Only TMF8821: 4x4 macro 1 mode 33°x47° FoV<br>(use macro 1 or macro 2 depending if camera is<br>above or below TMF8821).|
||5<br>Only TMF8821: 4x4 macro 2 mode 33°x47° FoV|
||6<br>3x3 wide mode 41°x52° FoV|
||7<br>Only TMF8821: 4x4 normal mode 41°x52° FoV|
||8-9<br>Reserved – do not use|
||10<br>Only TMF8821: 3x6 mode, 33°x60° FoV|
||11<br>3x3 mode 33°x32° FoV, checkerboard – disable<br>1st, 3rd, 5th… (use for high ambient light)|
||12<br>3x3 mode 33°x32° FoV, inverted checkerboard –<br>disable 2nd, 4th, 6th… (use for high ambient light)|
||13<br>Only TMF8821: 4x4 narrow mode 33°x42° FoV|
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|**Addr: 0x34**<br>**SPAD_MAP_ID**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
||14<br>User defined mode, single measurement mode<br>using config_page_spad1 only|
||15<br>Only TMF8821: User defined mode, time<br>multiplexed measurement mode using<br>config_page_spad1 and 2 (note: in TMF8828<br>mode, this bit will be set when read but the user<br>cannot define the SPAD mask)|
## **8.5.18 ALG_SETTING_0 Register (Address 0x35)**
**Figure 114: ALG_SETTING_0 Register**
|**Addr: 0x35**|**Addr: 0x35**|**ALG_SETTING_0**|**ALG_SETTING_0**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||This bit defines the confidence value encoding –|
|7|logarithmic_co<br>nfidence|0|RW|see section 7.4.7<br>0 … linear encoding|
|||||1 … logarithmic encoding|
|6:3||0|RW|Reserved – keep at 0|
|2|distances|1|RW|If set do report distance results|
|1:0|reserved|0|RW|Reserved – keep at 0|
Register 0x36-0x38 is reserved for future extensions – keep registers at default value of 0x00.
## **8.5.19 HIST_DUMP Register (Address 0x39)**
**Figure 115: HIST_DUMP Register**
|**Addr: 0x39**|**Addr: 0x39**|**HIST_DUMP**|**HIST_DUMP**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|<br>**Bit Description**|
|7:1|reserved|0|RW|Reserved – keep at 0|
|0|histogram|0|RW|If set dump 24-bit raw histograms; do not set if<br>int_persistence > 0|
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TMF8820/21/28 Register Description
|**Addr: 0x39**|**Addr: 0x39**|**HIST_DUMP**|**HIST_DUMP**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|<br>**Bit Description**|
|||||See ams OSRAM device driver and/or application|
|||||note TMF882X_Host_Driver_Communication_*.pdf|
|||||for interpretation of this value.|
## **8.5.20 SPREAD_SPECTRUM Register (Address 0x3A)**
**Figure 116:**
**SPREAD_SPECTRUM Register**
|**Addr: 0x3A**|**Addr: 0x3A**|**SPREAD_SPECTRUM**|**SPREAD_SPECTRUM**|**SPREAD_SPECTRUM**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|<br>**Bit Description**|
|7:3|reserved|0|RW|Reserved – keep at 0|
|||||Spread spectrum configuration to avoid aliasing of|
|2:0|spread_spectr<br>um_factor|0|RW|far objects to closer distance – valid range 0…5. If<br>set >0, this jitters the VCSEL pulses, which widens<br>the frequency band for EMC emission.|
|||||DO NOT SET HIGHER THAN 5.|
## **Attention**
Use the latest firmware version to use the register spread_spectrum_factor.
## **8.5.21 I2C_SLAVE_ADDRESS Register (Address 0x3B)**
**Figure 117: I2C_SLAVE_ADDRESS Register**
|**Addr: 0x3B**|**Addr: 0x3B**|**I2C_SLAVE_ADDRESS**|**I2C_SLAVE_ADDRESS**|**I2C_SLAVE_ADDRESS**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|<br>**Access**|**Bit Description**|
|||||I²C slave 7-bit address, a change requires the|
|7:1|7bit_slave_address|<br>0x41|RW|command CMD_I2C_SLAVE_ADDRESS to be<br>executed; see register I2C_ADDR_CHANGE|
|||||(0x3E) for conditions for this change|
|0|reserved|0|RW|Reserved – keep at 0|
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## **8.5.22 OSC_TRIM_VALUE_LSB Register (Address 0x3C)**
**Figure 118:**
**OSC_TRIM_VALUE_LSB Register**
|**Addr: 0x3C**|**Addr: 0x3C**|**OSC_TRIM_VALUE_LSB**|**OSC_TRIM_VALUE_LSB**|**OSC_TRIM_VALUE_LSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|osc_trim_value[7:0]|0|RW|Oscillator trim value is a 9-bit signed<br>value – bits 0-7|
## **8.5.23 OSC_TRIM_VALUE_MSB Register (Address 0x3D)**
**Figure 119:**
**OSC_TRIM_VALUE_MSB Register**
|**Addr: 0x3D**|**Addr: 0x3D**|**OSC_TRIM_VALUE_MSB**|**OSC_TRIM_VALUE_MSB**|**OSC_TRIM_VALUE_MSB**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:1|reserved|||Reserved – keep at 0|
|0|osc_trim_value[8]|0|RW|Oscillator trim value is a 9-bit signed<br>value – bit 8|
## **8.5.24 I2C_ADDR_CHANGE Register (Address 0x3E)**
**Figure 120: I2C_ADDR_CHANGE Register**
|**Addr:**|**0x3E**|**I2C_ADDR_CHANGE**|**I2C_ADDR_CHANGE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|3:2|gpio_change_mask|<br>0|RW|See gpio_change_value|
|||||The command CMD_I2C_SLAVE_ADDRESS|
|||||will only be executed if (gpio_data &|
|1:0|gpio_change_value|<br>0|RW|gpio_change_mask) == (gpio_change_value &<br>gpio_change_mask)|
|||||Where gpio_data = [state of GPIO1, state of|
|||||GPIO0]|
(1) If the I²C address change shall be done in any case, set gpio_change_mask = 0 and gpio_change_value = 0.
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TMF8820/21/28 Register Description
## 8.6 appid=0x03, cid_rid=0x17/0x18 – User Defined SPAD Configuration
Following registers are only available if appid=0x03 and cid_rid=0x17/0x18 – SPAD configuration. For cid_rid=0x17 these registers apply for non time multiplexed mode (3x3) or for the first measurement in time multiplexed mode (4x4 – only TMF8821). cid_rid=0x18 is only available in TMF8821 and used for the second measurement in time multiplexed mode (4x4).
Use ams OSRAM device driver to access these registers – they provide a high level interface to configure the SPAD mask.
## **Information**
Please note that in TMF8828 mode, user defined SPAD masks are not available and any attempt to store a SPAD configuration will result in a warning in the status register.
## **8.6.1 SPAD_ENABLE_FIRST Register (Address 0x24)**
## **Figure 121: SPAD_ENABLE_FIRST Register**
|**Addr: 0x24**|**Addr: 0x24**|**SPAD_ENABLE_FIRST**|**SPAD_ENABLE_FIRST**|**SPAD_ENABLE_FIRST**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|spad_enable_first|0|RW|Start of SPAD enable mask|
## **8.6.2 SPAD_ENABLE_LAST Register (Address 0x41)**
## **Figure 122: SPAD_ENABLE_LAST Register**
|**Addr: 0x41**|**Addr: 0x41**|**SPAD_ENABLE_LAST**|**SPAD_ENABLE_LAST**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|spad_enable_last|0|RW|Start of SPAD enable mask|
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TMF8820/21/28 Register Description
## **8.6.3 SPAD_TDC_FIRST Register (Address 0x42)**
**Figure 123:**
**SPAD_TDC_FIRST Register**
|**Addr: 0x42**|**Addr: 0x42**|**SPAD_TDC_FIRST**|**SPAD_TDC_FIRST**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|spad_tdc_first|0|RW|Start of SPAD to TDC channel select mask|
## **8.6.4 SPAD_TDC_LAST Register (Address 0x8C)**
**Figure 124: SPAD_TDC_LAST Register**
|**Addr: 0x8C**|**Addr: 0x8C**|**SPAD_TDC_LAST**|**SPAD_TDC_LAST**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|spad_tdc_last|0|RW|Start of SPAD to TDC channel select mask|
## **8.6.5 SPAD_X_OFFSET_2 Register (Address 0x8D)**
**Figure 125: SPAD_X_OFFSET_2 Register**
|**Addr: 0x8D**|**Addr: 0x8D**|**SPAD_X_OFFSET_2**|**SPAD_X_OFFSET_2**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|x_offset_2|0|RW|Signed offset in x-direction in Q1 from the FoV<br>center (Q1 = signed number multiplied by 2)|
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TMF8820/21/28 Register Description
## **8.6.6 SPAD_Y_OFFSET_2 Register (Address 0x8E)**
**Figure 126: SPAD_Y_OFFSET_2 Register**
|**Addr: 0x8E**|**Addr: 0x8E**|**SPAD_Y_OFFSET_2**|**SPAD_Y_OFFSET_2**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|y_offset_2|0|RW|Signed offset in y-direction in Q1 from the FoV<br>center (Q1 = signed number multiplied by 2)|
## **8.6.7 SPAD_X_SIZE Register (Address 0x8F)**
**Figure 127: SPAD_X_SIZE Register**
|**Addr: 0x8F**|**Addr: 0x8F**|**SPAD_X_SIZE**|**SPAD_X_SIZE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|x_size|0|RW|Size in full SPADs of the SPAD mask in x-<br>direction (valid range is 1..18)|
## **8.6.8 SPAD_Y_SIZE Register (Address 0x90)**
**Figure 128: SPAD_Y_SIZE Register**
|**Addr: 0x90**|**Addr: 0x90**|**SPAD_Y_SIZE**|**SPAD_Y_SIZE**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|y_size|0|RW|Size in full SPADs of the SPAD mask in y-<br>direction (valid range is 1..10)|
## 8.7 appid=0x03, cid_rid=0x19 – Factory Calibration
Following registers are only available if appid=0x03 and cid_rid=0x19 – Factory calibration.
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TMF8820/21/28 Register Description
## **8.7.1 FACTORY_CALIBRATION_FIRST Register (Address 0x24)**
**Figure 129:**
**FACTORY_CALIBRATION_FIRST Register**
|**Addr: 0x24**|**Addr: 0x24**|**FACTORY_CALIBRATION_FIRST**|**FACTORY_CALIBRATION_FIRST**|**FACTORY_CALIBRATION_FIRST**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|factory_calibration_first|<br>0|RW|Start of factory calibration data block|
For crosstalk registers see Figure 48.
## **8.7.2 CALIBRATION_STATUS_FC Register (Address 0xDC)**
## **Figure 130:**
## **CALIBRATION_STATUS_FC Register**
|**Addr: 0xDC**|**Addr: 0xDC**|**CALIBRATION_STATUS_FC**|**CALIBRATION_STATUS_FC**|**CALIBRATION_STATUS_FC**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Calibration status during factory|
|7:0|fc_status_during_cal|0|RW|calibration – copy of register 0x07 –<br>0x00 success, all other values are|
|||||reporting an error during calibration|
## **8.7.3 FACTORY_CALIBRATION_LAST Register (Address 0xDF)**
**Figure 131: FACTORY_CALIBRATION_LAST Register**
|**Addr: 0xDF**|**Addr: 0xDF**|**FACTORY_CALIBRATION_LAST**|**FACTORY_CALIBRATION_LAST**|**FACTORY_CALIBRATION_LAST**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|factory_calibration_last|0|RW|End of factory calibration data block|
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TMF8820/21/28 Register Description
## 8.8 appid=0x03, cid_rid=0x81 – Raw Data Histograms
Following registers are only available if appid=0x03 and cid_rid=0x81 – Raw data histograms. ams OSRAM recommends to use ams OSRAM device driver how to use these registers.
## **8.8.1 SUBPACKET_NUMBER Register (Address 0x24)**
**Figure 132: SUBPACKET_NUMBER Register**
|**Addr: 0x24**|**Addr: 0x24**|**SUBPACKET_NUMBER**|**SUBPACKET_NUMBER**|**SUBPACKET_NUMBER**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Subpacket number – see ams OSRAM|
|7:0|subpacket_number|<br>0|RW|device driver and/or application note<br>TMF882X_Host_Driver_Communication_*.p|
|||||df for interpretation of this value|
## **8.8.2 SUBPACKET_PAYLOAD Register (Address 0x25)**
**Figure 133: SUBPACKET_PAYLOAD Register**
|**Addr: 0x25**|**Addr: 0x25**|**SUBPACKET_PAYLOAD**|**SUBPACKET_PAYLOAD**|**SUBPACKET_PAYLOAD**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|subpacket_payload|<br>0x80|RW|Size of payload – always 0x80|
## **8.8.3 SUBPACKET_CONFIG Register (Address 0x26)**
**Figure 134: SUBPACKET_CONFIG Register**
|**Addr: 0x26**|**Addr: 0x26**|**SUBPACKET_CONFIG**|**SUBPACKET_CONFIG**||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||0 = No time multiplex or first timeslot of|
|0|subpacket_config|0|RW|time multiplex<br>1 = Second timeslot of time multiplex (only|
|||||TMF8821)|
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TMF8820/21/28 Register Description
## **8.8.4 SUBPACKET_DATA0 Register (Address 0x27)**
**Figure 135: SUBPACKET_DATA0 Register**
|**Addr:**|**0x27**|**SUBPACKET_DATA0**|**SUBPACKET_DATA0**|**SUBPACKET_DATA0**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||First data byte of this subpacket – see|
|||||ams OSRAM device driver and/or application|
|7:0|subpacket_data0|0|RW|note|
|||||TMF882X_Host_Driver_Communication_*.pdf|
|||||for interpretation of this value|
## **8.8.5 SUBPACKET_DATA127 Register (Address 0xA6)**
**Figure 136: SUBPACKET_DATA127 Register**
|**Addr:**|**0xA6**|**SUBPACKET_DATA127**|**SUBPACKET_DATA127**|**SUBPACKET_DATA127**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|||||Last data byte of this subpacket – see|
|||||ams OSRAM device driver and/or application|
|7:0|subpacket_data127|<br>0|RW|note|
|||||TMF882X_Host_Driver_Communication_*.pdf|
|||||for interpretation of this value|
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## 8.9 appid=0x80 – Bootloader Registers
Following registers are only available if appid=0x80 (Bootloader). ams OSRAM recommends to use ams OSRAM device driver to operate the bootloader.
## **8.9.1 BL_CMD_STAT (Address 0x08)**
## **Figure 137: BL_CMD_STAT Register**
|**Addr: 0x08**<br>**BL_CMD_STAT**||
|---|---|
|**Bit**<br>**Bit Name**<br>**Default**<br>**Access**|**Bit Description**|
|7:0<br>bl_cmd_stat<br>0<br>RW|Write: Bootloader Command – see section 8.9.5<br>Bootloader Commands<br>Read: Bootloader Status:|
||**Value**<br>**Description**|
||0x00<br>STAT_READY - the last command<br>executed successfully|
||0x01<br>STAT_ERR_SIZE - the last command<br>had a size mismatch|
||0x02<br>STAT_ERR_CSUM - the last command<br>had a faulty checksum or was unknown|
||0x03<br>STAT_ERR_RANGE - the last command<br>tried to access RAM out of range|
||0x04<br>STAT_ERR_MORE - the last command<br>caused an error and there is more<br>information in the response|
## **8.9.2 BL_SIZE (Address 0x09)**
**Figure 138: BL_SIZE Register**
|**Addr: 0x09**|**Addr: 0x09**|**BL_SIZE**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|6:0|bl_size|0|RW|Data size in bytes|
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TMF8820/21/28 Register Description
## **8.9.3 BL_DATA (Address 0x0A-0x8A)**
**Figure 139:**
**BL_DATA Register**
|**Addr: 0x0A-0x8A**|**Addr: 0x0A-0x8A**|**BL_DATA**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|bl_data0 …<br>bl_data127|0|RW|Up to 128 data bytes for bootloader commands|
## **8.9.4 BL_CSUM (Address after bl_data*)**
The actual I²C address of BL_SUM depends on the length of the payload (bl_data0-bl_data127); BL_SUM always is after the last data byte.
Note: If there is no databyte, BL_SUM address is 0x0A.
**Figure 140: BL_CSUM Register**
|**Addr: After bl_data***|**Addr: After bl_data***|**BL_CSUM**|||
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|bl_csum|0|RW|Checksum for Sum(Command + Data Size + Data<br>itself) XOR 0xFF|
## **8.9.5 Bootloader Commands**
The following commands (bl_cmd_stat) are supported by the bootloader:
## **Figure 141: Bootloader Commands**
|**Command**|**Value**|**Meaning**|
|---|---|---|
|RAMREMAP_RESET|0x11|Remap RAM to Address 0 and Reset|
|DOWNLOAD_INIT|0x14|Initialize for RAM download from host to TMF8820/21/28|
|RAM_BIST|0x2A|Build in self-test of RAM (pattern test)|
|I2C_BIST|0x2C|Build in self-test of I²C RAM (pattern test)|
|W_RAM|0x41|Write RAM Region (Plain = not encoded into e.g. Intel Hex<br>Records)|
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TMF8820/21/28 Register Description
|**Command**|**Value**|**Meaning**|
|---|---|---|
|ADDR_RAM|0x43|Set the read/write RAM pointer to a given address|
## **RAMREMAP_RESET = Execute Program Downloaded to RAM**
This command remaps the RAM to address 0 and performs a System reset. Before executing this command, set powerup_select = 2
Command is performed immediately without any delay.
After this the application that is located in RAM will be running. If there is no valid application you will need to do a HW reset (toggle enable pin or power cycle).
## **Figure 142: RAMREMAP_RESET**
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_CMD_STAT|0x11|REMAP RAM to 0 and RESET|
|BL_SIZE|0|No parameters|
|BL_CSUM|0xEE||
## **DOWNLOAD_INIT**
This command is used to initialize the download HW for secure devices.
## **Figure 143: DOWNLOAD_INIT**
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_CMD_STAT|0x14|Initialize the HW for download from host to<br>TMF8820/21/28 RAM|
|BL_SIZE|1||
|BL_DATA0|0..0xFF|Seed|
|BL_CSUM|0..0xFF||
## **RAM_BIST**
This command is to perform a RAM pattern test on the main RAM region.
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TMF8820/21/28 Register Description
## **Figure 144: RAM_BIST**
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_CMD_STAT|0x2A|Start pattern testing on the RAM|
|BL_SIZE|0||
|BL_CSUM|0xD5||
BL_CMD_STAT will report pass / fail of the test.
## **I2C_BIST**
This command is to perform a RAM pattern test on the I²C RAM region.
**Figure 145: I2C_BIST**
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_CMD_STAT|0x2C|Start pattern testing on the I²C RAM|
|BL_SIZE|0||
|BL_CSUM|0xD3||
During execution of this test cpu_ready=0. Wait until cpu_ready=1 and then BL_CMD_STAT will report pass / fail of the test.
## **W_RAM**
This command writes the given data to a defined RAM region. Note that the RAM pointer has first to be set by the command ADDR_RAM. After the command is successfully executed, the RAM pointer will point to the first byte after the written region.
**Figure 146: W_RAM**
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_CMD_STAT|0x41|Write to main RAM|
|BL_SIZE|0..0x80|Number of bytes to be written|
|BL_DATA0|0..0xFF|1stbyte to be written|
|BL_DATA1|0..0xFF|2ndbyte to be written|
|…|||
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TMF8820/21/28 Register Description
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_DATA127|0..0xFF|128thbyte to be written (only if size was 0x80)|
|BL_CSUM|0..0xFF|The CSUM comes immediately after the data.|
## **ADDR_RAM**
This command is to specify the RAM pointer location for the next R_RAM or W_RAM command.
## **Figure 147: ADDR_RAM**
|**Address**|**Value**|**Meaning**|
|---|---|---|
|BL_CMD_STAT|0x43|Specify the address of the next RAM read or write.|
|BL_SIZE|2||
|BL_DATA0|0..0xFF|LSB of address in RAM|
|BL_DATA1|0..0xFF|MSB of address in RAM|
|BL_CSUM|0..0xFF||
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TMF8820/21/28 Application Information
## **9 Application Information**
## 9.1 Schematic
The TMF8820/21/28 needs only 3 small 0402 external capacitors for operation:
## **Figure 148:**
## **TMF8820/21/28 Application Schematic**
**==> picture [430 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
0.1µF/6V3 VDD Air gap + glass<br>Camera or<br>SYNC<br>other GNDV VDDV<br>Illuminator TMF8820/21/28<br>VIO<br>GPIO1<br>GPIO0 Optics<br>Control<br>Driver VCSEL<br>EN Reflective<br>INT Internal cross Surface<br>Host Data SPAD, Reflection talk<br>SDA<br>Process TDC and<br>SCL Optical<br>Histogram<br>Cortex® M0+ Filter<br>Background<br>VDD GND GNDC VDDC Light<br>VDD 2x<br>0.1µF/6V3<br>**----- End of picture text -----**<br>
The SYNC signal connected to GPIO1 can be used to immediately interrupt the TMF8820/21/28 VCSEL operation if the high power illuminator is operating or to sync to a camera operation. Ensure that SYNC does not exceed the VDD supply of TMF8820/21/28 as otherwise an internal protection diode will start conducting. On SYNC assertion, the VCSEL is immediately switched off (typically after 10 µs), on SYNC de-assertion the VCSEL operation is resumed.
GPIO0 can be used as a general GPIO output signal.
The signals INT/SDA/SCL need an external pull-up resistor to the VIO supply (typically 1.8 V).
## **9.1.1 Operating Several TMF8820/21/28 Devices on a Single I²C Bus**
Several TMF8820/21/28 devices can share a single I²C bus if there are dedicated enable (EN) connections to each of these devices.
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TMF8820/21/28 Application Information
## **Figure 149:**
## **Sharing a Single I²C Bus for Operating Several TMF8820/21/28s**
**==> picture [412 x 364] intentionally omitted <==**
**----- Start of picture text -----**<br>
Air gap + glass<br>TMF8820/21/28<br>TOF Sensor Optics<br>EN1<br>Driver VCSEL<br>GPIO1 Reflective<br>GPIO0 Control<br>Internal Surface<br>Host<br>SDA SPAD, Reflection<br>Data<br>SCL TDC and<br>Process Optical<br>Histogram<br>Cortex® M0+ Filter<br>TMF8820/21/28<br>TOF Sensor Optics<br>EN2<br>Driver VCSEL<br>GPIO1 Reflective<br>INT2 GPIO0 Control Internal Surface<br>SDA SPAD, Reflection<br>Data<br>SCL TDC and<br>Process Optical<br>Histogram<br>® Filter<br>Cortex M0+<br>TMF8820/21/28<br>TOF Sensor Optics<br>EN3<br>Driver VCSEL<br>GPIO1 Reflective<br>GPIO0 Control<br>Internal Surface<br>SDA SPAD, Reflection<br>Data<br>SCL TDC and<br>Process Optical<br>Histogram<br>® Filter<br>Cortex M0+<br>INT1<br>**----- End of picture text -----**<br>
The procedure to initialize the devices to different I²C addresses is as follows:
**1.** Set EN1=0, EN2=0, EN3=0 (reset all devices)
**2.** Set EN1=1
**3.** Download firmware to first TMF8820/21/28
**4.** Reprogram I²C address for first TMF8820/21/28 using cmd_stat = CMD_I2C_SLAVE_ADDRESS where 7bit_slave_address(0x3B) = I²C address for first TMF8820/21/28; set gpio_change_mask = 0 and gpio_change_value = 0.
**5.** Set EN2=1
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TMF8820/21/28 Application Information
**6.** Download firmware to second TMF8820/21/28
**7.** Reprogram I²C address for second TMF8820/21/28 using cmd_stat = CMD_I2C_SLAVE_ADDRESS where 7bit_slave_address(0x3B) = I²C address for second TMF8820/21/28; set gpio_change_mask = 0 and gpio_change_value = 0.
**8.** Set EN3=1
**9.** Download firmware to third TMF8820/21/28
**10.** Reprogram I²C address for third TMF8820/21/28 using cmd_stat = CMD_I2C_SLAVE_ADDRESS where 7bit_slave_address(0x3B) = I²C address for third TMF8820/21/28; set gpio_change_mask = 0 and gpio_change_value = 0.
**11.** If there are further devices, repeat last three steps accordingly.
## 9.2 PCB Layout
## **Figure 150: PCB Layout Recommendation**
**==> picture [446 x 354] intentionally omitted <==**
**----- Start of picture text -----**<br>
GND PLANE<br>VDD VDDC VDDV VDD<br>(0402)<br>GND (0402) GNDC GNDV (0402) GND<br>GPIO0 GPIO0 GPIO1 GPIO1<br>INT INT EN EN<br>SCL SCL GND GND<br>SDA SDA VDD (0402) VDD<br>VDDC VDDV<br>C C<br>VDD<br>C<br>**----- End of picture text -----**<br>
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TMF8820/21/28 Application Information
## 9.3 External Components
The TMF8820/21/28 only need three small 0402 sized capacitors for operation. Use GRM155R70J104KA01 (0402 X7R 0.1 µF 6.3 V) or capacitors with same or better performance for CVDDC, CVDD and CVDDV.
Add pull-up resistors (e.g. 10 k) on pins SCL, SDA and INT.
## 9.4 PCB Pad Layout
**Figure 151: PCB Pad Layout**
- (1) All linear dimensions are in millimeters.
- (2) Dimension tolerances are 0.05 mm unless otherwise noted.
- (3) This drawing is subject to change without notice.
Use the PCB pad layout as a recommendation only. The actual pad layout shall be optimized for the customer production line.
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TMF8820/21/28 Application Information
## 9.5 Software Drivers
ams OSRAM recommends to use one of the available software drivers to operate the TMF8820/21/28. The drivers are available from the ams.com website:
- For TMF8820, see ams.com/tmf8820
- For TMF8821, see ams.com/tmf8821
- For TMF8828, see ams.com/tmf8828
The following drivers are available:
## **Figure 152: Available Drivers**
|**Type**|**File**|**Explanation**|
|---|---|---|
|||Use for any Linux system (e.g. Android) where|
|Linux|TMF882x_Driver_Linux_v*.zip and<br>TMF882x_Driver_Linux_Source_v*.zip|<br>the driver is running on the application processor.<br>This is the driver running on TMF882x evaluation|
|||kit.|
|||Driver and several examples for using of the|
|||TMF8820/21/28 bundled inside a software|
|SDK|TMF882x_Driver_SDK_Source_v*.zip|development kit – the driver works out of the box<br>using the tmf882x-mcu-shield-evm boards and an|
|||NXP LPC55S69-EVK, but should make porting to|
|||other hardware platforms easier.|
|||MCU driver – sometimes referenced as bare|
|||metal driver – the hardware functions for|
|MCU|TMF882x_Driver_MCU_Source_v*.zip|<br>executing the I²C routines can be easily replaced|
|||to simply port this driver to systems without|
|||operating system or systems not running Linux|
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TMF8820/21/28 Package Drawings & Markings
## **10 Package Drawings & Markings**
## **Figure 153:**
## **OLGA12 Package Outline Drawing**
||~~SS~~|||||
|---|---|---|---|---|
|VCSEL<br>r|~~SS~~|<br>IK=-— (A2)|(A1)|**Ref.**<br>**Min**<br>**Nom**<br>**Max**<br>A<br>1.3<br>1.4<br>1.5<br>A1<br>0.2<br>REF<br>A2<br>1.2<br>REF<br>D<br>4.6<br>BSC<br>~~TT~~<br>~~ee~~||
|_|<br>|<br>oe|||E<br>W<br>L<br>e<br>n<br>~~|~~<br>~~|) ~~<br>~~|~~ <br>~~|~~<br>~~**|**~~|2<br>BSC<br>0.45<br>0.5<br>0.55<br>0.3<br>0.35<br>0.4<br>0.82<br>BSC<br>12<br>~~|Tt~~<br> ~~|~~<br>~~|~~<br>~~|~~<br> ~~|~~<br>|<br>~~|~~<br>~~|~~<br>~~|~~<br>~~ft~~|
||5<br>=<br>(Blea||D1|4.1<br>BSC|
||||E1|1.35<br>BSC|
||||SD|0.41<br>BSC|
||||aaa|aaa<br>0.1|
||||ddd|ddd<br>0.08|
(1) All dimensions are in millimeters. Angles in degrees.
(2) Dimensioning and tolerancing conform to ASME Y14.5M-1994.
(3) n is the total number of terminals.
(4) This package contains no lead (Pb).
(5) This drawing is subject to change without notice.
- (6) 8-digit tracecode only on bottom side of the package.
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TMF8820/21/28 Tape & Reel Information
## **11 Tape & Reel Information**
## **Figure 154:**
## **Tape and Reel Drawing**
- (1) All linear dimensions are in millimeters. Dimension tolerance is ± 0.10 mm unless otherwise noted.
- (2) The dimensions on this drawing are for illustrative purposes only. Dimensions of an actual carrier may vary slightly.
- (3) Symbols on drawing A0, B0, and K0 are defined in ANSI EIA Standard 481-B 2001.
- (4) There are two reel sizes available (see section Ordering Information)
- i) 7” reels: Each reel is 7 inch in diameter and contains 500 parts.
- ii) 13” reels: Each reel is 13 inch in diameter and contains 4000 parts.
- (5) ams OSRAM packaging tape and reel conform to the requirements of EIA Standard 481-B.
- (6) In accordance with EIA standard, device pin 1 is located next to sprocket holes in the tape.
- (7) This drawing is subject to change without notice.
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TMF8820/21/28 Soldering & Storage Information
## **12 Soldering & Storage Information**
## 12.1 Soldering Information
The package has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate.
The solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a PCB. Temperature is measured on top of component. The components shall be limited to a maximum of three passes through this solder reflow profile.
## **Figure 155: Solder Reflow Profile Graph**
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TMF8820/21/28 Soldering & Storage Information
## **Figure 156: Solder Reflow Profile**
|**Parameter**|**Reference**|**Device**|
|---|---|---|
|Average temperature gradient in preheating||2.5 °C/s|
|Soak time|tsoak|2 to 3 minutes|
|Time above 217 °C (T1)|t1|Max 60 s|
|Time above 230 °C (T2)|t2|Max 50 s|
|Time above Tpeak– 10 °C (T3)|t3|Max 10 s|
|Peak temperature in reflow|Tpeak|260 °C|
|Temperature gradient in cooling||Max −5 °C/s|
## 12.2 Storage Information
## **12.2.1 Moisture Sensitivity**
Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package.
To ensure the package contains the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping. Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use.
## **Shelf Life**
The calculated shelf life of the device in an unopened moisture barrier bag is 24 months from the date code on the bag when stored under the following conditions:
- Shelf Life: 24 months
- Ambient Temperature: <40 °C
- Relative Humidity: <90 %
Rebaking of the devices will be required if the devices exceed the 24 months shelf life or the Humidity Indicator Card shows that the devices were exposed to conditions beyond the allowable moisture region.
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TMF8820/21/28 Soldering & Storage Information
## **Floor Life**
The module has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices are stored under the following conditions:
- Floor Life: 168 hours
- Ambient Temperature: <30 °C
- Relative Humidity: <60 %
If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior to solder reflow or dry packing.
## **Rebaking Instructions**
When the shelf life or floor life limits have been exceeded, rebake at 50 °C for 12 hours.
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TMF8820/21/28 Laser Eye Safety
## **13 Laser Eye Safety**
The TMF8820/21/28 is designed to meet the Class 1 laser safety limits including single faults in compliance with IEC 60825-1:2014 and EN 60825-1:2014/A11:2021. This applies to the stand-alone device and the included software supplied by ams OSRAM. In an end application system environment, the system may need to be tested to ensure it remains compliant. The system must not include any additional lens to concentrate the laser light or parameters set outside of the recommended operating conditions. Use outside of the recommended condition or any physical modification to the module during development could result in hazardous levels of radiation exposure.
## **Figure 157: Laser Eye Safety Certificate**
IEC 60825-1:2014 and EN 60825-1:2014/A11:2021
Complies with 21 CFR 1040.10 and 1040.11 except for conformance with IEC 60825-1 Ed. 3., as described in Laser Notice No. 56, dated May 8, 2019.
## **CAUTION**
Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.
Example: Adding a converging lens on top of the TMF8820/21/28
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TMF8820/21/28 Revision Information
## **14 Revision Information**
|**Document Status**|**Product Status**|**Definition**|
|---|---|---|
|Product Preview|Pre-Development|<br>Information in this datasheet is based on product ideas in the planning phase|
|||of development. All specifications are design goals without any warranty and|
|||are subject to change without notice|
|Preliminary Datasheet|Pre-Production|Information in this datasheet is based on products in the design, validation or|
|||qualification phase of development. The performance and parameters shown|
|||in this document are preliminary without any warranty and are subject to|
|||change without notice|
|Datasheet|Production|Information in this datasheet is based on products in ramp-up to full production|
|||or full production which conform to specifications in accordance with the terms|
|||of ams-OSRAM AG standard warranty as given in the General Terms of Trade|
## **Other Definitions**
Draft / Preliminary:
The draft / preliminary status of a document indicates that the content is still under internal review and subject to change without notice. ams-OSRAM AG does not give any warranties as to the accuracy or completeness of information included in a draft / preliminary version of a document and shall have no liability for the consequences of use of such information.
Short Datasheet:
A short datasheet is intended for quick reference only, it is an extract from a full datasheet with the same product number(s) and title. For detailed and full information always see the relevant full datasheet. In case of any inconsistency or conflict with the short datasheet, the full datasheet shall prevail.
|**Changes from previous version to current revision v8-00**|**Page**|
|---|---|
|Added amendment for laser eye safety to EN 60825-1:2014/A11:2021.|99|
- Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
- Correction of typographical errors is not explicitly mentioned.
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TMF8820/21/28 Legal Information
## **15 Legal Information**
## **Copyright & Disclaimer**
Copyright ams-OSRAM AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
Devices sold by ams-OSRAM AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of Trade. ams-OSRAM AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams-OSRAM AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams-OSRAM AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams-OSRAM AG for each application. This product is provided by ams-OSRAM AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed.
ams-OSRAM AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams-OSRAM AG rendering of technical or other services.
## **Product and functional safety devices/applications or medical devices/applications:**
ams-OSRAM AG components are not developed, constructed or tested for the application as safety relevant component or for the application in medical devices. ams-OSRAM AG products are not qualified at module and system level for such application.
In case buyer – or customer supplied by buyer – considers using ams-OSRAM AG components in product safety devices/applications or medical devices/applications, buyer and/or customer has to inform the local sales partner of amsOSRAM AG immediately and ams-OSRAM AG and buyer and /or customer will analyze and coordinate the customer-specific request between ams-OSRAM AG and buyer and/or customer.
## **ams OSRAM Semiconductor RoHS Compliance Statement**
**RoHS Compliant:** The term RoHS compliant means that ams-OSRAM AG semiconductor products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories plus additional 4 substance categories (per amendment EU 2015/863), including the requirement that lead not exceed 0.1% by weight in homogeneous materials.
**Important Information:** The information provided in this statement represents ams-OSRAM AG knowledge and belief as of the date that it is provided. ams-OSRAM AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams-OSRAM AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams-OSRAM AG and ams-OSRAM AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
## **Headquarters**
Please visit our website at ams-osram.com
ams-OSRAM AG For information about our products go to Products Tobelbader Strasse 30 For technical support use our Technical Support Form 8141 Premstaetten For feedback about this document use Document Feedback Austria, Europe For sales offices and branches go to Sales Offices / Branches Tel: +43 (0) 3136 500 0 For distributors and sales representatives go to Channel Partners
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Updated at April 23, 2026
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