Image not available
Illustrative purposes only
SX1508BIULTRT
8 CHAN LOW VOLT I2C GPIO + PWM# 23AH8951
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: SEMTECH
- Product type: I/O Expanders
- No. of Pins: 20Pins
- No. of I/O's: 8I/O's
- Bus Frequency: 400kHz
- IC Interface Type: I2C
- Chip Configuration: 8bit
- Supply Voltage Max: 3.6V
- Supply Voltage Min: 1.425V
- Interface Case Style: TQFN
| Delivery and price | |
|---|---|
| Units per pack | 1000 |
| Price | 0.966 € |
| Current stock | 1000+ |
| Lead time | 7 days |
Datasheet
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **SX1508B/SX1509B**
## **World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
**GENERAL DESCRIPTION KEY PRODUCT FEATURES** ~~PO ae~~
- 1.2V to 3.6V Low Operating Voltage with Dual Independent I/O Rails (VCC1, VCC2)
The SX1508B and SX1509B are complete ultra low voltage General Purpose parallel Input/Output (GPIO) expanders ideal for low power handheld battery powered equipment. This family of GPIOs comes in 8-, 16-channel configuration and allows easy serial expansion of I/O through a standard 400kHz I[2] C interface. GPIO devices can provide additional control and monitoring when the microcontroller or chipset has insufficient I/O ports, or in systems where serial communication and control from a remote location is advantageous.
- Enable Direct Level Shifting Between I/O Banks and Host Controller
- 5.5V Tolerant I/Os, Up to 15mA Output Sink on All I/Os (No Total Sink Current Limit)
- Integrated LED Driver for Enhanced Lighting
- Intensity Control (256-step PWM)
- Blink Control (224 On/Off values)
- Breathing Control (224 Fade In/Out values)
These devices can also act as a level shifter to connect a microcontroller running at one voltage level to a component running at a different voltage level, thus eliminating the need for extra level translating circuits. The core is operating as low as 1.425V while the dual I/O banks can operate between 1.2V and 3.6V independent of the core voltage and each other (5.5V tolerant).
- On-Chip Keypad Scanning Engine
- Support Up to 8x8 Matrix (64 Keys)
- Configurable Input Debouncer
- 8/16 Channels of True Bi-directional Style I/O Programmable Pull-up/Pull-down
- Push/Pull or Open-drain outputs
- Programmable Polarity
The SX1508B and SX1509B feature a fully programmable LED Driver with internal oscillator for enhanced lighting control such as intensity (via 256step PWM), blinking and breathing (fade in/out) make them highly versatile for a wide range of LED applications.
- Open Drain Active Low Interrupt Output (NINT)
- Bit Maskable
- Programmable Edge Sensitivity
- Built-in Clock Management (Internal 2MHz Oscillator/External Clock Input, 7 clock values) OSCIO can be Configured as GPO
In addition, keypad applications are also supported with an on-chip scanning engine that enables continuous keypad monitoring up to 64 keys without any additional host interaction reducing bus activity.
- 400kHz I[2] C Compatible Slave Interface
- 4 User-Selectable I²C Slave Addresses
- Power-On Reset and Reset Input (NRESET)
The SX1508B and SX1509B have the ability to generate mask-programmable interrupts based on a falling/rising edge of any of its GPIO lines. A dedicated pin (NINT) indicates to a host controller that a state change occurred on one or more of the lines. Each GPIO is programmable via a bank of 8-bit configuration registers that include data, direction, pull-up/pull-down, interrupt mask and interrupt registers. These I/O expanders feature small footprint packages and are rated from -40°C to +85°C temperature range.
- Ultra Low Current Consumption: 1uA Typ
- -40°C to +85°C Operating Temperature Range
- Up to 2kV HBM ESD Protection
- Small Footprint Packages
- Pb & Halogen Free, RoHS/WEEE compliant
## ~~[~~ **TYPICAL APPLICATIONS**
- Cell phones, PDAs, MP3 players
- Digital camera, Notebooks, GPS Units
- • Any battery powered equipment
## ~~ee~~ **ORDERING INFORMATION**
|**Part Number **|**I/Os**|**Package**|**Marking**|
|---|---|---|---|
|SX1508BIULTRT|8|**age**<br>QFN-UT-20|**g**<br>GAA2|
|SX1509BIULTRT|16|QFN-UT-28|GBA3|
|SX1508BEVK|8|Evaluation Kit|-|
|SX1509BEVK|16|Evaluation Kit|-|
**==> picture [178 x 129] intentionally omitted <==**
**----- Start of picture text -----**<br>
LEVEL SHIFTING<br>VCC1<br>_ 1.2 - 3.6V<br>IO0<br>IO1<br>Host = 1.425 - 3.6VVDDM IO2IO3 FULL LED DRIVE<br>Controller I2C SX1508B VCC2<br>NINT 1.2 - 3.6V<br>NRESET IO4<br>IO5<br>IO6<br>IO7 KEYPAD SCANNING<br>BUTTON CONTROL<br>OSCIO<br>ADDR0 ADDR1<br>**----- End of picture text -----**<br>
Rev 4 – 26[th] April 2011
www.semtech.com
1
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
**ADVANCED COMMUNICATIONS & SENSING** LC
## **Table of Contents**
|**Table of Contents**|**Table of Contents**|**Table of Contents**|
|---|---|---|
|**GENERALDESCRIPTION..................................................................................................................... 1**|||
|**ORDERINGINFORMATION................................................................................................................... 1**|||
|**KEYPRODUCTFEATURES.................................................................................................................. 1**|||
|**TYPICALAPPLICATIONS ..................................................................................................................... 1**|||
|**1**|**PIN DESCRIPTION ...................................................................................................................... 4**||
|**1.1**|**SX1508B 8-channel I2C GPIO with LED Driver and Keypad Engine**|**4**|
|**1.2**|**SX1509B 16-channel I2C GPIO with LED Driver and Keypad Engine**|**5**|
|**1.3**|**I/Os Feature Summary**|**6**|
|**2**|**ELECTRICALCHARACTERISTICS............................................................................................... 7**||
|**2.1**|**Absolute Maximum Ratings**|**7**|
|**2.2**|**Electrical Specifications**|**7**|
|**3**|**TYPICALOPERATINGCHARACTERISTICS ............................................................................... 10**|**............................................................................... 10**|
|**4**|**BLOCKDETAILEDDESCRIPTION............................................................................................. 11**|**............................................................................................. 11**|
|**4.1**|**SX1508B 8-channel I2C GPIO with LED Driver and Keypad Engine**|**11**|
|**4.2**|**SX1509B 16-channel I2C GPIO with LED Driver and Keypad Engine**|**11**|
|**4.3**|**Reset**|**12**|
||4.3.1<br>Hardware (NRESET)|12|
||4.3.2<br>Software (RegReset)|12|
|**4.4**|**2-Wire Interface (I2C)**|**12**|
||4.4.1<br>WRITE|13|
||4.4.2<br>READ|13|
|**4.5**|**I/O Banks**|**14**|
||4.5.1<br>Input Debouncer|14|
||4.5.2<br>Keypad Scanning Engine|14|
||4.5.3<br>Level Shifter|15|
||4.5.4<br>Polarity Inverter|16|
|**4.6**|**Interrupt (NINT)**|**16**|
|**4.7**|**Clock Management**|**17**|
|**4.8**|**LED Driver**|**17**|
||4.8.1<br>Overview|17|
||4.8.2<br>Static Mode|18|
||4.8.3<br>Single Shot Mode|18|
||4.8.4<br>Blink Mode|19|
||4.8.5<br>LED Driver Modes|19|
||4.8.6<br>Synchronization of LED Drivers across several ICs|20|
||4.8.7<br>Tutorial|20|
|**5**|**CONFIGURATIONREGISTERS.................................................................................................. 22**|**.................................................................................................. 22**|
|**5.1**|**SX1508B 8-channel GPIO with LED Driver and Keypad Engine**|**22**|
|**5.2**|**SX1509B 16-channel GPIO with LED Driver and Keypad Engine**|**26**|
|**6**|**APPLICATIONINFORMATION ................................................................................................... 32**|**................................................................................................... 32**|
|**6.1**|**Typical Application Circuit**|**32**|
|**6.2**|**Typical LED Connection**|**32**|
|**7**|**PACKAGINGINFORMATION ..................................................................................................... 33**|**..................................................................................................... 33**|
|**7.1**|**QFN-UT 20-pin Outline Drawing**|**33**|
|**7.2**|**QFN-UT 20-pin Land Pattern**|**33**|
Rev 4 – 26[th] April 2011 2
www.semtech.com
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
|**ADVANCED COMMUNICATIONS & SENSING**<br>**7.3**<br>**QFN-UT 28-pin Outline Drawing**<br>LC|**ADVANCED COMMUNICATIONS & SENSING**<br>**7.3**<br>**QFN-UT 28-pin Outline Drawing**<br>LC|**ADVANCED COMMUNICATIONS & SENSING**<br>**7.3**<br>**QFN-UT 28-pin Outline Drawing**<br>LC|**34**|
|---|---|---|---|
||**7.4**|**QFN-UT 28-pin Land Pattern**|**34**|
|**8**||**SOLDERINGPROFILE .............................................................................................................. 35**|**.............................................................................................................. 35**|
|**9**||**MARKINGINFORMATION ......................................................................................................... 36**|**......................................................................................................... 36**|
Rev 4 – 26[th] April 2011
www.semtech.com
3
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **1 PIN DESCRIPTION**
## **1.1 SX1508B 8-channel I[2] C GPIO with LED Driver and Keypad Engine**
|**Pin**|**Symbol**|**Type **|**Description**|
|---|---|---|---|
|1<br>~~a~~<br>~~rTCOUrT™~“—SCSC'YL.C‘C'L)~~|NRESET<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|DI<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|Active low reset input<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~———..TCCCOCOC™CO~~<br>~~CY~~|
|2<br>~~rTCOUrT™~“—SCSC'YL.C‘C'L)~~|SDA<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|DIO<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|I2C serial data line<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~———..TCCCOCOC™CO~~<br>~~CY~~|
|3<br>~~rT COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~a~~|SCL<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|DI<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|I2C serial clock line<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~———..TCCCOCOC™CO~~<br>~~CY~~|
|4|ADDR0<br>~~ee~~|DI<br>~~ee~~|Address input bit 0,connect to VDDM or GND|
|5<br>~~a~~|I/O[0]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[0], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM)|
|6|I/O[1]<br>~~ee ~~|DIO(*1)<br> ~~ee~~|I/O[1], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM)|
|7<br>~~a~~|VCC1|P|Supplyvoltage for Bank A I/O[3-0]|
|8|GND<br>~~ee~~|P<br>~~ee~~|Ground Pin|
|9<br>~~a~~|I/O[2]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[2], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking|
|10|I/O[3]<br>~~ee ~~|DIO(*1)<br> ~~ee~~|I/O[3], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)|
|11<br>~~a~~<br>~~rTCOUrT™~“—SCSC'YL.C‘C'L)~~|NINT<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|DO<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|Active low interrupt output<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~———..TCCCOCOC™CO~~<br>~~CY~~|
|12<br>~~rTCOUrT™~“—SCSC'YL.C‘C'L)~~|ADDR1<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|DI<br>~~(*1)~~<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|Address input bit 1,connect to VDDM or GND<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~———..TCCCOCOC™CO~~<br>~~CY~~|
|13<br>~~rT COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~a~~|OSCIO<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|DIO~~(*1)~~<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~|Oscillator input/output,can also be used as GPO<br>~~COUrT™~“—SCSC'YL.C‘C'L)~~<br>~~———..TCCCOCOC™CO~~<br>~~CY~~|
|14|VDDM<br>~~ee~~|P<br>~~ee~~|Main supplyvoltage|
|15<br>~~a~~|I/O[4]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[4], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM)|
|16|I/O[5]<br>~~ee ~~|DIO(*1)<br> ~~ee~~|I/O[5], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM)|
|17<br>~~a~~|VCC2|P|Supplyvoltage for Bank B I/O[7-4]|
|18|GND<br>~~ee~~|P<br>~~ee~~|Ground Pin|
|19<br>~~a~~|I/O[6]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[6], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking|
|20|I/O[7]<br>~~ee ~~|DIO(*1)<br> ~~ee~~|I/O[7], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)|
D/I/O/P: Digital/Input/Output/Power (*1) This pin is programmable through the I2C interface
_Table 1 – SX1508B Pin Description_
**==> picture [207 x 188] intentionally omitted <==**
**----- Start of picture text -----**<br>
O ritititli<br>20} is) fe) iz) te)<br>NRESET Ya Ge I/O[4]<br>a ' a<br>SDA Ts]J Hi TOP VIEW ii (a4aaalias VDDM<br>SCL OSCIO<br>ADDR0 GND ADDR1<br>L. | (PAD) eee<br>I/O[0] NINT<br>es<br>fel (7) fel (9) fo<br>I/O[7] I/O[6] GND VCC2 I/O[5]<br>I/O[1] VCC1 GND I/O[2] I/O[3]<br>**----- End of picture text -----**<br>
_Figure 1 – SX1508B QFN-UT-20 Pinout_
Rev 4 – 26[th] April 2011
www.semtech.com
4
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
~~LT~~ **ADVANCED COMMUNICATIONS & SENSING**
## **1.2 SX1509B 16-channel I[2] C GPIO with LED Driver and Keypad Engine**
|**Pin**<br>~~eT~~|**Symbol**<br>~~eT~~|**Type **<br>~~eT~~|**Description**<br>~~eT~~|
|---|---|---|---|
|1<br>~~a~~|I/O[2]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[2], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~ee~~|
|2<br>~~a~~|I/O[3]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[3], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~ee~~|
|3<br>~~a~~|GND<br>~~a~~|P|Ground Pin|
|4<br>~~a~~|VCC1<br>~~a~~|P|Supplyvoltage for Bank A I/O[7-0]|
|5<br>~~a~~|I/O[4]<br>~~aee~~|DIO(*1)<br>~~ee~~|I/O[4], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|6<br>~~a~~|I/O[5]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[5], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|7<br>~~a~~|I/O[6]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[6], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|8<br>~~a~~|I/O[7]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[7], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|9<br>~~a~~|NINT<br>~~a~~|DO|Active low interrupt output|
|10<br>~~a~~|ADDR1<br>~~a~~|DI<br>~~(*1)~~|Address input bit 1,connect to VDDM or GND|
|11<br>~~a~~|OSCIO<br>~~a~~|DIO~~(*1)~~|Oscillator input/output,can also be used as GPO|
|12<br>~~a~~|VDDM<br>~~a~~|P|Main supplyvoltage|
|13<br>~~a~~|I/O[8]<br>~~aee~~|DIO(*1)<br>~~ee~~|I/O[8], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~ee~~|
|14<br>~~a~~|I/O[9]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[9], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~ee~~|
|15<br>~~a~~|I/O[10]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[10], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~ee~~|
|16<br>~~a~~|I/O[11]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[11], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~ee~~|
|17<br>~~a~~|GND<br>~~a~~|P|Ground Pin|
|18<br>~~a~~|VCC2<br>~~a~~|P|Supplyvoltage for Bank B I/O[15-8]|
|19<br>~~a~~|I/O[12]<br>~~aee~~|DIO(*1)<br>~~ee~~|I/O[12], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|20<br>~~a~~|I/O[13]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[13], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|21<br>~~a~~|I/O[14]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[14], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|22<br>~~a~~|I/O[15]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[15], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking,Breathing (Fade In/Out)<br>~~ee~~|
|23<br>~~a~~|NRESET<br>~~a~~|DI|Active low reset input|
|24<br>~~a~~<br>~~RS~~|SDA<br>~~a~~<br>~~Qe~~|DIO<br>~~Qe~~|I2C serial data line<br>~~Qe~~|
|25<br>~~RS~~<br>~~RS~~|SCL<br>~~Qe~~|DI<br>~~Qe~~|I2C serial clock line<br>~~Qe~~<br>~~Q~~|
|26<br>~~RS~~<br>~~RS~~|ADDR0<br>~~Qe~~|DI<br>~~Qe~~|Address input bit 0,connect to VDDM or GND<br>~~Qe~~<br>~~Q~~|
|27<br>~~RS~~<br>~~a~~|I/O[0]<br>~~ee~~|DIO(*1)<br>~~ee~~|I/O[0], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~Q~~<br>~~ee~~|
|28<br><br>~~a~~|I/O[1]<br>|DIO(*1)<br>|I/O[1], at power-on configured as an input<br>LED driver : Intensitycontrol(PWM),Blinking<br>~~2~~|
_Figure 2 – SX1509B QFN-UT-28 Pinout_
Rev 4 – 26[th] April 2011
www.semtech.com
5
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **1.3 I/Os Feature Summary**
**==> picture [336 x 229] intentionally omitted <==**
**----- Start of picture text -----**<br>
SX1508B SX1509B<br>I/O LED Driver Keypad LED Driver Keypad<br>PWM Blink Breathe Row Col. PWM Blink Breathe Row Col.<br>0 a √ √ √ √ √<br>1 LR √ es √ √ √ √<br>2 LR √ √ es √ √ √ √<br>3 LR √ √ √ es √ √ √ √<br>4 LR √ es √ √ √ √ √<br>5 LR √ es √ √ √ √ √<br>6 LR √ √ es √ √ √ √ √<br>7 LR √ es √ √ √ √ √ √ √<br>8 aa √ √ √<br>9 a √ √ √<br>10 a √ √ √<br>11 a √ √ √<br>12 a √ √ √ √<br>13 a √ √ √ √<br>14 a √ √ √ √<br>15 ee √ √ √ ee √<br>**----- End of picture text -----**<br>
_Table 3 – I/Os Feature Summary_
Please note that in addition to table above, all I/Os feature bank-to-bank and bank-to-host level shifting.
Rev 4 – 26[th] April 2011
www.semtech.com
6
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
~~LO~~ **ADVANCED COMMUNICATIONS & SENSING**
## ~~|~~ **2 ELECTRICAL CHARACTERISTICS**
## **2.1 Absolute Maximum Ratings**
Stress above the limits listed in the following table may cause permanent failure. Exposure to absolute ratings for extended time periods may affect device reliability. The limiting values are in accordance with the Absolute Maximum Rating System (IEC 134). All voltages are referenced to ground (GND).
|**Symbol**|**Description**|**Min**|**Max**|**Unit**|
|---|---|---|---|---|
|Vmax_VDDM<br>~~a~~|Mainsupplyvoltage<br>~~a~~<br>~~CC~~|-0.4<br>~~a~~<br>~~CC~~|3.7<br>~~a~~<br>~~CC~~|V<br>~~a~~<br>~~CC~~|
|max_VDDM<br>Vmax_VCC1-2<br>~~a~~|Digital I/Opin supplyvoltage<br>|- 0.4<br><br>~~ee ee~~|3.7<br><br>~~ee~~|V<br><br>~~ee~~|
|VES_HBM<br>~~ee~~|Electrostatic handlingHBM model(1)(SX1508B)<br>~~ee~~|-<br>~~ee~~<br>~~ee ee~~|2000<br>~~ee~~<br>~~ee~~|V<br>~~ee~~<br>~~ee~~|
||Electrostatic handlingHBM model(1)(SX1509B)<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee ee~~<br>~~ee~~|1500<br>~~ee~~<br>~~ee~~<br>~~ee~~||
|VES_CDM<br>~~a~~|Electrostatic handlingCDM model<br>|-<br>~~ee ee~~<br>|1000<br>~~ee~~<br>|V<br>~~ee~~<br>|
|VES_MM<br>~~ee~~|Electrostatic handlingMM model(SX1508B)<br>~~ee~~|-<br>~~ee~~|200<br>~~ee~~|V<br>~~ee~~|
||Electrostatic handlingMM model(SX1509B)<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~|150<br>~~ee~~<br>~~ee~~||
|TA<br>~~a~~|Operatingambient temperature range<br>~~a~~|-40<br>~~a~~|+85<br>~~a~~|°C<br>~~a~~|
|TC<br>~~a~~|Junction temperature range<br>~~a~~|-40<br>~~a~~|+125<br>~~a~~|°C<br>~~a~~|
|TSTG<br>~~a~~|Storage temperature range<br>~~a~~|-55<br>~~a~~|+150<br>~~a~~|°C<br>~~a~~|
|Ilat<br>~~a~~|Latchup-free inputpin current(2)<br>~~a~~|+/-100<br>~~a~~|-<br>~~a~~|mA<br>~~a~~|
(1) Tested according to JESD22-A114A (2) Static latch-up values are valid at maximum temperature according to JEDEC 78 specification
_Table 4 - Absolute Maximum Ratings_
## **2.2 Electrical Specifications**
Table below assumes default registers values, unless otherwise specified. Typical values are given for TA = +25°C, VDDM=VCC1=VCC2=3.3V.
|**Symbol**|**Description**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**Supply**<br>~~|~~|||||||
|VDDM<br>~~a~~|Main supply voltage<br>~~a~~<br>~~a~~|~~a~~<br>~~a~~|1.425<br>~~a~~<br>~~a~~|-<br>~~a~~<br>~~a~~|3.6<br>~~a~~<br>~~a~~|V<br>~~a~~<br>~~a~~|
|VCC1,2<br>~~a~~|I/O banks supply voltage||1.2|-|3.6|V|
|IDDM|Main supply current<br>(SX1508B, I2C inactive)<br>~~Se~~|Oscillator OFF<br>~~a~~<br>~~Se~~|-<br>~~a~~<br>~~Se~~|1<br>~~a~~<br>~~Se~~|5<br>~~a~~<br>~~Se~~|µA<br>~~Se~~<br>~~a~~|
|||Internal osc. (2MHz)<br>~~Se~~|-<br>~~Se~~|175<br>~~Se~~|235<br>~~Se~~||
|||External osc. (32kHz)<br>~~Se~~<br>~~a~~|-<br>~~Se~~<br>~~a~~|10<br>~~Se~~<br>~~a~~|-<br>~~Se~~<br>~~a~~||
||Main supply current<br>(SX1509B, I2C inactive)<br>~~(1)~~|Oscillator OFF<br>~~a~~|-<br>~~a~~|1<br>~~a~~|5<br>~~a~~|µA<br>~~a~~<br>~~a~~|
|||Internal osc. (2MHz)|-|365|460||
|||External osc. (32kHz)<br>~~a~~|-<br>~~a~~|10<br>~~a~~|-<br>~~a~~||
|ICC1,2<br>~~a~~|I/O banks supply current~~(1)~~<br>~~a~~|~~a~~|-<br>~~a~~|1<br>~~a~~|2<br>~~a~~|µA<br>~~a~~|
|**I/Os set as Input**<br>~~|~~|||||||
|VIH|High level input voltage|VCC1,2 >= 2V|0.7*<br>VCC1,2|-<br>~~ee~~|5.5(8)|V|
|||VCC1,2 < 2V<br>~~ee~~|0.8*<br>VCC1,2<br>~~ee~~|-<br>~~ee~~<br>~~ee~~|5.5(8)<br>~~ee~~||
|VIL<br>~~a~~|Low level input voltage<br>|VCC1,2 >= 2V<br>|-0.4<br>|-<br>~~ee~~<br>~~ee~~<br>|0.3*<br>VCC1,2<br>|V<br>|
|||VCC1,2 < 2V<br>~~ee~~<br>|-0.4<br>~~ee~~<br>|-<br>~~ee~~<br>~~ee~~<br>|0.2*<br>VCC1,2<br>~~ee~~<br>||
|ILEAK<br>~~a~~|Input leakage current<br>|Assuming no active<br>pull-up/down<br>|-1<br>|-<br>~~ee~~<br>|1<br>|µA<br>|
|CI<br>~~a~~|Input capacitance<br>~~a~~|-<br>~~a~~|-<br>~~a~~|-<br>~~a~~|10<br>~~a~~|pF<br>~~a~~|
|**I/Os set as Output**<br>~~|~~<br>~~eeeeeee~~|||||||
|VOH<br>~~ee~~|High level output voltage<br>~~ee~~|-<br>~~ee~~|VCC1,2<br>–0.3<br>~~ee~~|-<br>~~eee~~|VCC1,2<br>~~eee~~|V<br>~~eee~~|
|VOL<br>~~ee~~|Low level output voltage<br>~~ee~~|-<br>~~ee~~|-0.4<br>~~ee~~|-<br>~~eee~~|0.3<br>~~(2)~~<br>~~eee~~|V<br>~~eee~~|
|IOH<br>~~ee~~|High level output source current<br>~~ee ~~|VCC1,2 >=2V<br> ~~ee~~|-<br>~~ee ~~|-<br> ~~eee~~|8~~(2)~~<br>~~(2)~~<br>~~eee~~|mA<br>~~eee~~|
|||VCC1,2 < 2V<br>~~a~~|-<br>~~a~~|-<br>~~a~~|2~~(2)~~<br>~~(2)~~<br>~~a~~||
|IOL|Low level output sink current|VCC1,2 >=2V|-|-|15~~(2)~~<br>~~(2)~~|mA|
|||VCC1,2 < 2V|-|-|8~~(2)~~||
Rev 4 – 26[th] April 2011
www.semtech.com
7
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
|**Symbol**|**Description**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|tPV|Output data valid timing|Cf. Figure 8|-|-|425|ns|
|**NINT(Output)**|||||||
|VOL|Low level output voltage|-|-0.4|-|0.3|V|
|IOLM|Low level output sink current|VDDM >=2V|-|-|8|m~~A~~|
|||VDDM < 2V|-|-|4||
|tIV|Interrupt valid timing|From input data change|-|-|4|µs|
|tIR|Interrupt reset timing|From RegInterruptSource<br>clearing|-|-|4|µs|
|**NRESET(Input)**|||||||
|VIHMR|High level input voltage|VDDM >=2V|0.7*VDDM|-|VDDMmax|V|
|||VDDM < 2V|0.8*VDDM|-|VDDMmax||
|VILM|Low level input voltage|VDDM >=2V|-0.4|-|0.3*VDDM<br>|V|
|||VDDM < 2V|-0.4|-|0.2*VDDM||
|ILEAK|Input leakage current|-|-1|-|1|µA|
|CI|Input capacitance|-|-|-|10|pF|
|VPOR|Power-On-Reset voltage|Cf. Figure 6|-|0.8|-|V|
|VDROPH|High brown-out voltage|Cf. Figure 6|-|VDDM-1|-|V|
|VDROPL|Low brown-out voltage|Cf. Figure 6|-|0.2|-|V|
|tRESET|Reset time|Cf. Figure 6|-|-|2.5|ms|
|tPULSE|Reset pulse from host uC|Cf. Figure 6|200|-|-|ns|
|**ADDR0, ADDR1(Inputs)**|||||||
|VIHMA|High level input voltage|VDDM >=2V|0.7*VDDM|-|VDDM+0.3|V|
|||VDDM < 2V|0.8*VDDM|-|VDDM+0.3||
|VILM|Low level input voltage|VDDM >=2V|-0.4|-|0.3*VDDM|V|
|||VDDM < 2V|-0.4|-|0.2*VDDM||
|ILEAK|Input leakage current|-|-1|-|1|µA|
|CI|Input capacitance|-|-|-|10|pF|
|**OSCIO (Input/Output)**|||||||
|VIHMO|High level input voltage|VDDM >=2V|0.7*VDDM|-|VDDM+0.3|V|
|||1.425V=< VDDM < 2V|0.8*VDDM|-|VDDM+0.3||
|||VDDM < 1.425V|0.9*VDDM|-|VDDM+0.3||
|VILMO|Low level input voltage|VDDM >=2V|-0.4|-|0.3*VDDM|V|
|||1.425V=< VDDM < 2V|-0.4|-|0.2*VDDM||
|||VDDM < 1.425V|-0.4|-|0.1*VDDM||
|ILEAK|Input leakage current|-|-1|-|1|µA|
|CI|Input capacitance|-|-|-|10|pF|
|VOHM|High level output voltage|-|VDDM-0.3|-|VDDM|V|
|VOL|Low level output voltage|-|-0.4|-|0.3|V|
|IOHM|High level output source current|VDDM >=2V|-|-|8|m~~A~~|
|||VDDM < 2V|-|-|2||
|IOLM<br>|Low level output sink current<br>~~**(3)**~~|VDDM >=2V|-|-|8|m~~A~~|
|||VDDM < 2V|-|-|4||
|**SCL (Input) and SDA(Input/Output) **~~**(3)**~~<br>~~22~~|||||||
|Interface complies with slave F/S mode I~~2~~C interface as described by Philips I~~2~~C specification version 2.1<br>dated January, 2000. Please refer to that document for more detailed I2C specifications.<br>|<br>-----_L,|<br>-.<br>rd<br>Li<br>ih<br>ih<br>i<br>fi<br>oA<br>a<br>~--<br>|<br>ftLL..<br>I<br>|<br>itt<br>i}<br>|<br>tet rE<br>=tLow<br>t<br>_L]'SU:DAT<br>|<br>tHD:STA<br>|<br>1'BUFrm<br>i<br>|<br>1<br>|<br>|<br>|<br>V<br>1}<br>|<br>|<br>|<br>scl<br>|<br>||<br>ly<br>|<br>|<br>|<br>|<br>1<br>|<br>--<br>1}<br>|<br>be=-<br>I}<br>td<br>|<br>it<br>|<br>k-tHp;<br>><br>tsu:sta><br>|<br>|<br>tsu;STO<br>|<br>|S<br>|<br>HD;STA<br>tHD:DAT<br>HIGH<br>,<br>| Sr |<br>|P |<br>a|||||||
|VOL|Low level output voltage|-|-0.4|-|0.3|V|
|IOLM|Low level output sink current|VDDM>= 2V|-|-|8<br>~~m~~|~~m~~A|
|||VDDM<2V|-|-|4<br>~~m~~||
|VIHMR|High level input voltage|VDDM>= 2V|0.7*VDDM|-|VDDMmax|V|
|||VDDM < 2V|0.8*VDDM|-|VDDMmax||
|VILM|Low level input voltage|VDDM >=2V|-0.4|-|0.3*VDDM|V|
|||VDDM < 2V|-0.4|-|0.2*VDDM||
|**SCL (Input) and SDA(Input/Output) **~~**(3)**~~|**SCL (Input) and SDA(Input/Output) **~~**(3)**~~|**SCL (Input) and SDA(Input/Output) **~~**(3)**~~|**SCL (Input) and SDA(Input/Output) **~~**(3)**~~|**SCL (Input) and SDA(Input/Output) **~~**(3)**~~|||||||
|---|---|---|---|---|---|---|---|---|---|---|
|**(put)(put/Output)**<br>Interface complies with slave F/S mode I~~2~~C interface as described by Philips I<br>dated January, 2000. Please refer to that document for more detailed I2C specifications.|||||C interface as described by Philips I~~2~~C specification version 2.1<br>C specifications.||||C specification version 2.1|C specification version 2.1|
|||||<br>ih|-----_L,|<br>-.<br>ih|||rd<br>i<br>fi|Li<br>oA|||
||||a<br>tet rE<br>=tLow<br>t<br>_L]'SU:DAT<br>i<br>||~--<br>|<br>ftLL..<br>itt<br>|<br>tHD:STA||||I<br>|<br>i}<br>|<br>1'BUFrm||||
||scl||1<br>|<br>|<br>||<br>1<br>|||<br>|<br>ly<br>|<br>--<br>1}<br>|<br>be=-|V||1}<br>|<br>|<br>I}||<br>|<br>|<br>|<br>td|||
|||||<br>k-tHp;<br>><br>|S<br>|<br>HD;STA<br>tHD:DAT<br>HIGH|tsu:sta><br>|<br>|<br>,<br>| Sr ||tsu;STO|||<br>|<br>|P ||it<br>a|||
|VOL|||Low level output voltage|-|-0.4||-|0.3||V|
|IOLM|||Low level output sink current|VDDM>= 2V<br>VDDM<2V|-<br>-||-<br>-|8<br>4|~~m~~A||
|VIHMR|||High level input voltage|VDDM>= 2V<br>VDDM < 2V|0.7*VDDM<br>0.8*VDDM||-<br>-|VDDMmax<br>VDDMmax||V|
|VILM|||Low level input voltage|VDDM >=2V<br>VDDM < 2V|-0.4<br>-0.4||-<br>-|0.3*VDDM<br>0.2*VDDM||V|
Rev 4 – 26[th] April 2011
www.semtech.com
8
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## ~~Ln~~ **ADVANCED COMMUNICATIONS & SENSING**
|**Symbol**|**Description**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|fSCL<br>~~a ~~|SCL clock frequency<br> ~~a~~|-<br>~~GO~~|-<br>~~GO~~|-|400<br>kHz|kHz|
|tHD;STA<br>~~a~~|Hold time (repeated) START<br>condition<br>~~es~~<br>~~a~~|-<br>~~es~~|0.6<br>~~ee~~|-<br>~~ee~~|-<br>~~ee~~|µs<br>~~ee~~|
|tLOW<br>~~a~~<br>~~Ls~~|LOW period of the SCL clock<br>~~a~~<br>|-<br>|1.3<br>~~ee~~<br>|-<br>~~ee~~<br>|-<br>~~ee~~<br>|µs<br>~~ee~~<br>|
|tHIGH<br>~~a~~<br>~~Ls~~|HIGH period of the SCL clock<br>~~a~~<br>|-<br>|0.6<br>~~ee~~<br>|-<br>~~ee~~<br>|-<br>~~ee~~<br>|µs<br>~~ee~~<br>|
|tSU;STA<br>~~Ls~~|Set-up time for a repeated<br>START condition<br>|-<br>|0.6<br>~~(4)~~<br>|-<br>|-<br>~~(5)~~<br>|µs<br>|
|tHD;DAT<br>~~Lsa~~|Data hold time<br>~~a~~|-<br>~~a~~|0~~(4)~~<br>~~(6)~~<br>~~a~~|-<br>~~a~~|0.9~~(5)~~<br>~~a~~|µs<br>~~a~~|
|HD;DAT<br>tSU;DAT<br>~~a~~|Data set-up time<br>~~a~~|-<br>~~a~~|100~~(6)~~<br>~~(7)~~<br>~~a~~|-<br>~~a~~|-<br>~~a~~|ns<br>~~a~~|
|SU;DAT<br>tr<br>~~a~~|Rise time of both SDA and SCL<br>~~a~~|-<br>~~a~~|20+0.1Cb<br>~~(7)~~<br>~~(7)~~<br>~~a~~|-<br>~~a~~|300<br>~~a~~|ns<br>~~a~~|
|tf<br>~~__————~~|Fall time of both SDA and SCL<br>~~__————~~|-<br>~~__————~~|20+0.1Cb<br>~~(7)~~<br>~~__————~~|-<br>~~__————~~|300<br>~~__————~~|ns<br>~~__————~~|
|tSU;STO<br>~~__————~~<br>~~pf~~|Set-up time for STOP condition<br>~~__————~~<br>~~pf~~|-<br>~~__————~~|0.6<br>~~__————~~|-<br>~~__————~~|-<br>~~__————~~|µs<br>~~__————~~|
|SU;STO<br>tBUF<br>~~pf~~|Bus free time between a STOP<br>and START condition<br>~~pf~~|-|1.3|-|-|µs|
|Cb<br>~~pf~~<br>~~a~~|Capacitive load for each bus line<br>~~pf~~<br>|-<br>|-<br>~~ee~~<br>|-<br>~~ee ee~~<br>|400<br>~~ee~~<br>|pF<br>~~ee~~<br>|
|VnL<br>~~pf~~<br>~~a~~<br>~~a~~<br>~~a~~|Noise margin at the LOW level<br>for each connected device<br>(including hysteresis)<br>~~pf~~<br>~~ee~~<br><br>~~a~~|-<br>~~ee~~<br>|-<br>~~ee~~<br>~~ee~~<br><br>~~ee~~|0.1*<br>VDDM<br>~~ee~~<br>~~ee ee~~<br><br>~~ee ee~~|-<br>~~ee~~<br>~~ee~~<br><br>~~ee~~|V<br>~~ee~~<br>~~ee~~<br><br>~~ee~~|
|VnH<br>~~a~~<br>~~a~~|Noise margin at the HIGH level<br>for each connected device<br>(including hysteresis)<br>~~ee~~<br>~~a~~|-<br>~~ee~~|-<br>~~ee ~~<br>~~ee~~<br>~~ee~~|0.2*<br>VDDM<br> ~~ee ee~~<br>~~ee~~<br>~~ee ee~~|-<br>~~ee~~<br>~~ee~~<br>~~ee~~|V<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|tSP<br>~~a~~|Pulse width of spikes<br>suppressed by the input filter<br>~~a~~|-<br>~~GG~~|-<br>~~ee ~~<br>~~GG~~|-<br> ~~ee ee~~<br>~~GG~~|50<br>~~ee~~<br>~~GG~~|ns<br>~~ee~~|
|**Miscellaneous**<br>~~OO~~|||||||
|RPULL<br>~~OO~~|Programmable pull-up/down<br>resistors for IO[0-7]<br>~~OO~~|-<br>~~OO~~|-<br>~~OO~~|42<br>~~OO~~|-<br>~~OO~~|kΩ<br>~~OO~~|
|fOSC|Oscillator frequency|Internal|1.3|2|2.6<br>~~M~~|~~M~~Hz|
|||External from OSCIN<br>(40-60% duty cycle)<br>~~Se~~|-<br>~~Se~~|-<br>~~Se~~|2.6<br>~~M~~<br>~~Se~~||
(2) Can be increased by tying together and driving simultaneously several I/Os.
(3) All values referred to VIHMR min and VILM max levels.
(4) A device must internally provide a hold time of at least 300ns for the SDA signal (referred to VIHMR min) to bridge the undefined region of the falling edge of SCL.
(5) The maximum tHD;DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
(6) A Fast-mode I[2] C-bus device can be used in a Standard-mode I[2] C-bus system, but the requirement tSU;DAT ≥ 250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal.
If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tr max+ tSU;DAT = 1000 + 250
= 1250 ns (according to the Standard-mode I2C-bus specification) before the SCL line is released.
(7) Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times are allowed.
(8) With RegHighInput bit enabled (VCCx min =1.65V), else 3.6V (VCCx min = 1.2V)
_Table 5 – Electrical Specifications_
Rev 4 – 26[th] April 2011
www.semtech.com
9
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **3 TYPICAL OPERATING CHARACTERISTICS**
**==> picture [353 x 616] intentionally omitted <==**
**----- Start of picture text -----**<br>
SX1509B IDDM vs.VDDM (Oscillator Enabled) SX1509B IDDM vs.VDDM (Oscillator Enabled)<br>360 360<br>1 1 1 \ ' Pott<br>340 i a a ee ee ee Dee ee 340 a a<br>320 na a 2 320 bebe bL-L-L-LY<br>300 \ \ | \ \ 300 is ne ee<br>1 1 1 \ \ Por<br>280 T T 1 1 280<br>260 —}-4-4-4-4-5-5--14%- -F + 260 Saa ea aae es ee esaeye<br>240 ~-lo-liti 1 1 titi 1 tii fel \ LLL 240 eLELEEt ttey ve an<br>220 T T 1 f I 220 POP AG Pee<br>200 —-po4-4-4-4--* 5-1 ee 200 HLL LLL H-Lobe-L-bLeL<br>180 Snnr >, 180 Wot<br>1 1 f \ ' Pot td<br>160 a a ok ee ee Dee 160 POPS PSP ops<br>140 b- 4 t—4 1 I ' 140 ssaa ci ees ane nes a es ee<br>120 \ \ | \ \ 120 bot<br>1 1 \ \ re re<br>100 100<br>1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5<br>VDDM (V) VDDM (V)<br>Fosc vs.Temperature (VDDM = 3.6V) Fosc vs. VDDM<br>2.5 a 2.5 bob b-bL-L A=)<br>\ j \ \ bob bt<br>\ \ \ \ bob bt<br>2.3 : t ' \ f 2.3 roORPS PoP oP<br>\ \ \ \ bob bt<br>2.1 a a eta ag i \ es \ ee ei \ \ 2.1 bobpa v eraeenrbt a lraral<br>-— \ \ penne an a a,<br>1.9 \1 TT1 1 ji 1.9 e Pop eePyee<br>\ \ \ \ bob bt<br>1.7 a f 1 fj \ 1.7 ae bob bt<br>\ \ \ \ bob bt<br>1.5 ' f ' \ f 1.5 hoR-R-R-E-!<br>\ \ \ \ bob bt<br>\ \ \ \ bob bt<br>1.3 1.3<br>-50 -30 -10 10 30 50 70 90 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5<br>Temp ( [o] C) VDDM (V)<br>VOL vs. IOL (VCCx = 3.6V, Temp 25C) VOL vs.Temperature (VCCx = 3.6V, IOL = 15mA)<br>0.3 0.3<br>\\\<br>\\ \<br>0.25 \ I T 0.25 Sop tsp rt rpt strstr ttc<br>\\\<br>0.2 \ \ \ I \ 7 0.2<br>\ \ \<br>0.15 \ \ \I \i 0.15<br>\\\<br>0.1 \\ \ 0.1 gees p eeee t<br>0.05 0.05<br>0 \ nae 0<br>0 2 4 6 8 10 12 14 -50 -30 -10 10 30 50 70 90<br>IOL (mA) Temp (oC)<br>VOH vs. IOH (VDDM = 3.6V, Temp 25C) VOH vs. Temperature (VCCx = 3.6V, IOH = 8mA)<br>3.6 3.6<br>3.55 3.55 |t t | t t t 1<br>||<br>3.5 3.5 t+ + + 4 4<br>| | | |<br>3.45 ------- eH RH RH rH RH rR RK KK 3.45 L | | |<br>nna<br>3.4 oe 3.4 f|I | | |<br>3.35 3.35 ||| | | |<br>|<br>3.3 3.3 ia<br>| | | |<br>3.25 See 3.25 t + + + + 1<br>| | | |<br>3.2 3.2<br>-8 -7 -6 -5 -4 -3 -2 -1 0 -50 -30 -10 10 30 50 70 90<br>IOH (mA) Temp (oC)<br>)A )A<br>(u ( u<br>M M<br>D D<br>I D I D<br>)H(MFs coz )H( MFcsoz<br>)( V )<br>L L (V<br>OV OV<br>)(V )( V<br>H H<br>OV OV<br>**----- End of picture text -----**<br>
_Figure 3 – Typical Operating Characteristics_
Rev 4 – 26[th] April 2011
www.semtech.com
10
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **4 BLOCK DETAILED DESCRIPTION**
## **4.1 SX1508B 8-channel I[2] C GPIO with LED Driver and Keypad Engine**
**==> picture [333 x 599] intentionally omitted <==**
**----- Start of picture text -----**<br>
OSCIO<br>XX]<br>Keypad Clock Mgmt LED Driver<br>Engine External Intensity (PWM)<br>Clock<br>16 Keys Max Internal Blink (Timer)<br>Oscillator Breathe (Ramp)<br>VCC1<br>VDDM bd I/O[0]<br>X IEE Reset I/O Bank A a I/O[1]<br>NRESET I/O[2]<br>I [2] C Bus 8-Bit I/O[3]<br>Control <> R/W 7"<br>SCL xt Input <I VCC2<br>I/O[4]<br>Filter I/O Bank B XX] I/O[5]<br>SDA I/O[6]<br>x] I/O[7]<br>ADDR1 XX]<br>ADDR0 XI<br>SX1508B Interrupt XX] NINT<br>xX]<br>GND<br>Figure 4 – 8-channel Low Voltage GPIO with LED Driver and Keypad Engine<br>[[2]] C GPIO with LED Driver and Keypad Engine<br>OSCIO<br>xX<br>Keypad Clock Mgmt LED Driver<br>Engine External Intensity (PWM)<br>64 Keys Max Clock Blink (Timer)<br>Auto Internal<br>Sleep/Wakeup Oscillator Breathe (Ramp)<br>VCC1<br>|<br>piie= I/O[0]<br>x] I/O[1]<br>I/O[2]<br>I/O Bank A I/O[3]<br>VDDM X I 8-Bit |WX I/O[4]<br>Reset I/O[5]<br>NRESET Kt R/W WN I/O[6]<br>I [2] C Bus Xl I/O[7]<br>Control X] VCC2<br>SCL Input 8-Bit I/O[8]<br>I/O[9]<br>Filter R/W<br>SDA x Pa I/O[10]<br>I/O Bank B | I/O[11]<br>ADDR1 NJ] I/O[12]<br>I/O[13]<br>ADDR0 KI Ld<br>x] I/O[14]<br>x I/O[15]<br>SX1509B<br>Interrupt XI] NINT<br>**----- End of picture text -----**<br>
_Figure 4 – 8-channel Low Voltage GPIO with LED Driver and Keypad Engine_
## **4.2 SX1509B 16-channel I[[2]] C GPIO with LED Driver and Keypad Engine**
**==> picture [17 x 6] intentionally omitted <==**
**----- Start of picture text -----**<br>
GND<br>**----- End of picture text -----**<br>
_Figure 5 – 16-channel Low Voltage GPIO with LED Driver and Keypad Engine_
Rev 4 – 26[th] April 2011
www.semtech.com
11
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~LO~~ **ADVANCED COMMUNICATIONS & SENSING**
## **4.3 Reset**
## 4.3.1 Hardware (NRESET)
The SX1508B and SX1509B generate their own power on reset signal after a power supply is connected to the VDDM pin. NRESET input pin can be used to reset the chip anytime, it must be connected to VDDM (or greater) either directly (if not used), or via a resistor.
**==> picture [423 x 186] intentionally omitted <==**
**----- Start of picture text -----**<br>
1 2 3 4 5 6 1 2<br>VDROPH<br>VDDM<br>VPOR<br>VDROPL<br>Reset<br>Signal Undefined Undefined Undefined<br>a tRESET tPULSE BE tRESET<br>**----- End of picture text -----**<br>
_Figure 6 – Power-On / Brown-out Reset Conditions_
1. Device behavior is undefined until VDDM rises above VPOR, at which point internal reset procedure is started.
2. After tRESET, the reset procedure is completed.
3. In operation, the SX1508B and SX1509B may be reset (POR like or LED driver counters only depending on RegMisc setting) at anytime by an external device driving NRESET low for tPULSE or longer. Chip can be accessed normally again after NRESET rising edge.
4. During a brown-out event, if VDDM drops above VDROPH a reset will not occur.
5. During a brown-out event, if VDDM drops between VDROPH and VDROPL a reset may occur.
6. During a brown-out event, if VDDM drops below VDROPL a reset will occur next time VPOR is crossed.
Please note that a brown-out event is defined as a transient event on VDDM. If VDDM is attached to a battery, then the gradual decay of the battery voltage will not be interpreted as a brown-out event. Please also note that a sharp rise in VDDM (> 1V/us) may induce a circuit reset.
## 4.3.2 Software (RegReset)
Writing consecutively 0x12 and 0x34 to RegReset register will reset all registers to their default values.
## **4.4 2-Wire Interface (I[2] C)**
The SX1508B and SX1509B 2-wire interface operates only in slave mode. In this configuration, the device has one or 4 possible devices addresses defined by ADDR[1:0] pins:
|**Device**|**ADDR[1:0]**|**Address**|**Description **|
|---|---|---|---|
|SX1508B|**00**|0x2**0** (01000**00**)|First address of the 2-wire interface|
||**01 **|0x2**1** (01000**01**)|Second address of the 2-wire interface|
||**10**|0x2**2** (01000**10**)|Third address of the 2-wire interface|
||**11**|0x2**3** (01000**11**)|Fourth address of the 2-wire interface|
|SX1509B|**00**|0x3E(**0**11111**0**)|First address of the 2-wire interface|
||**01 **|0x3F(**0**11111**1**)|Second address of the 2-wire interface|
||**10**|0x70 (**1**11000**0**)|Third address of the 2-wire interface|
||**11**|0x71(**1**11000**1**)|Fourth address of the 2-wire interface|
_Table 6 - 2-Wire Interface Address_
- 2 lines are used to exchange data between an external master host and the slave device:
- **SCL** : **S** erial **CL** ock
- **SDA** : **S** erial **DA** ta
Rev 4 – 26[th] April 2011
www.semtech.com
12
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
The SX1508B and SX1509B are read-write slave-mode I[2] C devices and comply with the Philips I[2] C standard Version 2.1 dated January, 2000. The SX1508B and SX1509B have a few user-accessible internal 8-bits registers to set the various parameters of operation (Cf. §5 for detailed configuration registers description). The I[2] C interface has been designed for program flexibility, in that once the slave address has been sent to the SX1508B or SX1509B enabling it to be a slave transmitter/receiver, any register can be written or read independently of each other. The start and stop commands frame the data-packet and the repeat start condition is allowed if necessary.
Seven bit addressing is used and ten bit addressing is not allowed. Any general call address will be ignored by the SX1508B and SX1509B. The SX1508B and SX1509B are not CBUS compatible and can operate in standard mode (100kbit/s) or fast mode (400kbit/s).
## 4.4.1 WRITE
After the start condition [S], the slave address (SA) is sent, followed by an eighth bit (‘0’) indicating a Write. The slave then Acknowledges [A] that it is being addressed, and the Master sends an 8 bit Data Byte consisting of the slave Register Address (RA). The Slave Acknowledges [A] and the master sends the appropriate 8 bit Data Byte (WD0). Again the slave Acknowledges [A]. In case the master needs to write more data, a succeeding 8 bit Data Byte will follow (WD1), acknowledged by the slave [A]. This sequence will be repeated until the master terminates the transfer with the Stop condition [P]. [s | sa |o| A [Ra] A |woo| A [wot] A | «-.
_Figure 7 - 2-Wire Serial Interface, Write Operation_
When successive register data (WD1...WDn) is supplied by the master, the register address can be automatically incremented or kept fixed depending on the setting programmed in RegMisc.
**==> picture [483 x 119] intentionally omitted <==**
**----- Start of picture text -----**<br>
1<br>spa [s}o{i}ofofofofo}ofafolofofolfofofofay | matey ALP<br>Start Condition R/W | ACK From Slave | ACK From Slave 'ACK From Slave<br>to Port | \<br>tpv<br>Data 0<br>fromPort | | p<<br>X a Vi<br>Figure 8 – Example: Write RegData Register<br>**----- End of picture text -----**<br>
## 4.4.2 READ
After the start condition [S], the slave address (SA) is sent, followed by an eighth bit (‘0’) indicating a Write. The slave then Acknowledges [A] that it is being addressed, and the Master responds with an 8 bit Data consisting of the Register Address (RA). The slave Acknowledges [A] and the master sends the Repeated Start Condition [Sr]. Once again, the slave address (SA) is sent, followed by an eighth bit (‘1’) indicating a Read.
The slave responds with an Acknowledge [A] and the read Data byte (RD0). If the master needs to read more data it will acknowledge [A] and the slave will send the next read byte (RD1). This sequence can be repeated until the master terminates with a NACK [N] followed by a stop [P].
Rev 4 – 26[th] April 2011
www.semtech.com
13
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## _Figure 9 - 2-Wire Serial Interface, Read Operation_
When successive register data (RD1...RDn) is read by the master, the register address will be automatically incremented or kept fixed depending on the setting programmed in RegMisc.
## **4.5 I/O Banks**
## 4.5.1 Input Debouncer
Each input can be individually debounced by setting corresponding bits in RegDebounce register. At power up the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if the input value is identical at two consecutive sampling times.
The debounce time common to all IOs can be set in RegDebounceConfig register from 0.5 to 64ms (fOSC = 2MHz).
## 4.5.2 Keypad Scanning Engine
SX1508B, and SX1509B integrate a fully programmable keypad scanning engine to implement keypad applications up to 8x8 matrix (i.e. 64 keys).
Please note that SX1509B also implements an Auto Sleep/Wakeup feature to save power consumption when no key has been pressed for a programmed time.
**==> picture [138 x 157] intentionally omitted <==**
**----- Start of picture text -----**<br>
Y<br>SX1508B<br>IO3<br>IO2<br>| ene<br>IO1<br>|<br>IO0 |HESHe FG ) X<br>IO4<br>IO5<br>IO6<br>IO7<br>- IO[3-0] as outputs (scanning) RegKeyData =<br>- IO[7-4] as inputs<br>TOO X Y<br>**----- End of picture text -----**<br>
_Figure 10 – 4x4 Keypad Connection to SX1508B_
Following procedure should be implemented on the host controller for a 4x4 keypad:
_1. Set RegDir to 0xF0 (IO[3-0] as outputs, IO[7-4] as inputs) , set RegOpenDrain to 0x0F (IO[3-0] as open-drain outputs), set RegPullup to 0xF0 (pull-ups enabled on inputs IO[7-4])._
_2. Enable and configure debouncing on IO[7-4] (RegDebounceEnable = 0xF0, Ex : RegDebounceConfig = 0x05)_
_3. Enable and configure keypad scanning engine (Ex : RegKeyConfig = 0x7D) This will start an infinite loop with the following sequence to IO[3:0]: ZZZ0, ZZ0Z, Z0ZZ, 0ZZZ. Make sure that scan interval is set to higher value than the debounce time._
##
_4. When a key is pressed, NINT goes low, key scan is halted and the key coordinates are stored in RegKeyData:_
- _The column data will be stored in RegKeyData[7:4] (Note: column indication is active low)_
Rev 4 – 26[th] April 2011
www.semtech.com
14
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~LT~~ **ADVANCED COMMUNICATIONS & SENSING**
- _The row data will be stored in RegKeyData[3:0] (Note: row indication is active low)_
- _When RegKeyData is read, this data along with the interrupt is automatically cleared (same behavior as reading RegData) and the key scan continues to the next row._
## _5. Restart from point 4._
This implementation allows the host to handle both single and multi-touches easily (fast AAAAAA sequence is a long press of key A, fast ABABABAB sequence is key A and key B pressed together, etc)
## 4.5.3 Level Shifter
Because of their 5.5V tolerant I/O banks with independent supply voltages between 1.2V and 3.6V, the SX1508B and SX1509B can perform level shifting of signals from one I/O bank to another **without uC activity** by programming the corresponding configuration register bits accordingly in RegLevelShifter (and RegDir). This can save significant BOM cost in a final application where only a few signals need to be level-shifted (no need for an additional external level shifter IC).
**==> picture [150 x 136] intentionally omitted <==**
**----- Start of picture text -----**<br>
1.2-3.6V<br>VCC1<br>1.2-5.5V<br>IO0 TU<br>tLevelShiftMin<br>SX1508/9B<br>1.2-3.6V<br>1.2-3.6V<br>VCC2<br>IO4<br>a<br>**----- End of picture text -----**<br>
_Figure 11 – Level Shifting Example_
The minimum pulse width tLevelShiftMin which can be level shifted properly depends on VCCx and VDDM:
## _tLevelShiftMin = Input Delay + Core Delay + Output Delay_
Input/Core/Output delays vs VCCx/VDDM are given in figures below.
Rev 4 – 26[th] April 2011
www.semtech.com
15
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## ~~Ce~~ **ADVANCED COMMUNICATIONS & SENSING**
**==> picture [64 x 5] intentionally omitted <==**
**----- Start of picture text -----**<br>
IO Input Delay vs. Supply Voltage<br>**----- End of picture text -----**<br>
**==> picture [400 x 440] intentionally omitted <==**
**----- Start of picture text -----**<br>
10.0009.000 ee<br>8.000<br>7.000 ee<br>6.000<br>5.000<br>4.000 See<br>3.000<br>2.000<br>1.000<br>0.000 Se<br>1.000 1.500 2.000 2.500 3.000 3.500<br>VCCx (V)<br>Typical Worst Case<br>SX1508B Digital Core Delay vs. Supply Voltage SX1509B Digital Core Delay vs. Supply Voltage<br>28 28<br>26 26<br>24 24<br>SEES E==Eee<br>22 22<br>20 20<br>18 18<br>RREEEH| REEEEE<br>16 16<br>14 PSS) 14 ESSeer<br>1 1.5 2 2.5 3 3.5 1 1.5 2 2.5 3 3.5<br>VDDM (V) VDDM (V)<br>Typical Worst Case Typical Worst Case<br>IO Output Delay vs. Supply Voltage ( LowDriveEn=0, 20pF Load) IO Output Delay vs. Supply Voltage (LowDriveEn=1, 20pF Load)<br>140.000 140.000<br>120.000 120.000<br>100.000 100.000<br>80.000 80.000<br>60.000 60.000<br>40.000 40.000<br>20.000 20.000<br>0.000 0.000<br>1.000 1.500 2.000 2.500 3.000 3.500 1.000 1.500 2.000 2.500 3.000 3.500<br>VCCx (V) VCCx (V)<br>Typical Worst Case Typical Worst Case<br>(ns)<br>Tdelay<br>(ns) (ns)<br>Tdelay Tdelay<br>(ns) (ns)<br>Tdelay Tdelay<br>**----- End of picture text -----**<br>
_Figure 12 – Level Shifter Max Frequency Calculation Data_
## 4.5.4 Polarity Inverter
Each IO’s polarity can be individually inverted by setting corresponding bit in RegPolarity register. Please note that polarity inversion can also be combined with level shifting feature.
## **4.6 Interrupt (NINT)**
At start-up, the transition detection logic is reset, and NINT is released to a high-impedance state. The interrupt mask register is set to 0xFF, disabling the interrupt output for transitions on all I/O ports. The transition flags are cleared to indicate no data changes.
An interrupt NINT can be generated on any programmed combination of I/Os rising and/or falling edges through the RegInterruptMask and RegSense registers.
If needed, the I/Os which triggered the interrupt can then be identified by reading RegInterruptSource register.
When NINT is low (i.e. interrupt occurred), it can be reset back high (i.e. cleared) by writing 0xFF in RegInterruptSource (this will also clear corresponding bits in RegEventStatus register). The interrupt can also be cleared automatically when reading RegData register (Cf. RegMisc)
_Example: We want to detect rising edge of I/O[1] on SX1508B (NINT will go low)._
_1. We enable interrupt on I/O[1] in RegInterruptMask_
Rev 4 – 26[th] April 2011
www.semtech.com
16
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~LT~~ **ADVANCED COMMUNICATIONS & SENSING**
## _RegInterruptMask =“XXXXXX_ _**0** X”_
_2. We set edge sense for I/O[1] in RegSense RegSenseLow =“XXXX_ _**01** XX”_
Please note that independently from the “user defined” process described above the keypad engine, when enabled, also uses NINT to indicate a key press.
Hence we have NINT = “user defined condition occurred” OR “keypad engine condition occurred”.
## **4.7 Clock Management**
A main oscillator clock fOSC is needed by the LED driver, keypad engine and debounce features.
Clock management block is illustrated in figure below.
**==> picture [88 x 83] intentionally omitted <==**
**----- Start of picture text -----**<br>
OSCIO<br>Clock<br>Mgmt<br>External Div fOSC<br>Clock<br>Internal<br>Oscillator<br>**----- End of picture text -----**<br>
## _Figure 13 – Clock Management Overview_
The block is configured in register RegClock (Cf §5 for more detailed information):
Selection of internal clock source: none (OFF) or internal oscillator or external clock input from OSCIN. Definition of OSCIO pin function (OSCIN or OSCOUT)
OSCOUT frequency setting (sub-multiple of fOSC)
Please note that if needed the OSCOUT feature can be used as an additional GPO (Cf. RegClock)
## **4.8 LED Driver**
## 4.8.1 Overview
Every IO has its own independent LED driver (Cf §6.2 for typical LED connection) , all IOs can perform intensity control (PWM) while some of them additionally include blinking and breathing features (Cf pin description §1)
The LED drivers of all I/Os share the same clock ClkX configurable in RegMisc[6:4]. Please note that for power consumption reasons ClkX is OFF by default.
Assuming ClkX is not OFF, LED driver for IO[X] is enabled when RegLEDDriverEnable[X] = 1 in which case it can operate in one of the three modes below:
- Static mode (all I/Os, with or without fade in/out)
- Single shot mode (blinking capable I/Os only, with or without fade in/out)
- Blink mode (blinking capable I/Os only, with or without fade in/out)
Rev 4 – 26[th] April 2011
www.semtech.com
17
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~|~~ **ADVANCED COMMUNICATIONS & SENSING**
**==> picture [417 x 249] intentionally omitted <==**
**----- Start of picture text -----**<br>
RegData[X]<br>1<br>0<br>t<br>IO[X] Intensity (PWM value)<br>100%<br>IOnX ON<br>Fade In Fade Out<br>IOffX OFF<br>0 t<br>TRiseX TOnX TFallX TOffX<br>**----- End of picture text -----**<br>
_Figure 14 – LED Driver Overview_
Each IO[X] has its own set of programmable registers (Cf §5 for more detailed information): **RegTOnX** (blinking capable I/Os only): TOnX, ON time of IO[X] **RegIOnX** (all I/Os): IOnX, ON intensity of IO[X]
**RegOffX** (blinking capable I/Os only): TOffX and IOffX, OFF time and intensity of IO[X] **RegTRiseX** (breathing capable I/Os only): TRiseX, fade in time of IO[X]
**RegTFallX** (breathing capable I/Os only): TFallX, fade out time of IO[X]
Please note that the LED driver mode is selectable for each IO bank between linear and logarithmic. (Cf §4.8.5)
All the figures assume normal IO polarity, for inverse polarity RegData control must be inverted (does not invert the polarity of the IO signal itself).
## 4.8.2 Static Mode
Only mode available for non blinking capable IOs (with Off intensity = 0), else invoked when TOnX = 0. If the I/O doesn’t support fading the LED intensity will step directly to the IOnX/IOffX value.
## **RegData(X)**
**==> picture [457 x 90] intentionally omitted <==**
**----- Start of picture text -----**<br>
On intensity(max) determined by<br> register RegIOnX<br>IOLED(X) level<br>ee<br>Off intensity(min) determined by<br>register RegIOffX<br>Fade in rate determined by \\ Fade out rate determined vo<br>register RegTRiseX by register RegTFallX<br>Figure 15 – LED Driver Static Mode<br>**----- End of picture text -----**<br>
## 4.8.3 Single Shot Mode
Invoked when TOnX != 0 and TOffX = 0.
If the I/O doesn’t support fading the LED intensity will step directly to the IOnX/IOffX value.
Rev 4 – 26[th] April 2011
www.semtech.com
18
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
**==> picture [291 x 145] intentionally omitted <==**
**----- Start of picture text -----**<br>
RegData(X)<br>On intensity(max )<br>IOLED(X) level<br>Off intensity(min)<br>Fade in rate determined by Minimum intensity duration<br>register RegTRiseX determined by register<br>RegData(x)<br>Fade out rate determined<br>by register RegTFallX<br>**----- End of picture text -----**<br>
_Figure 16 – LED Driver Single Shot Mode_
## 4.8.4 Blink Mode
## Invoked when TOnX != 0 and TOffX != 0.
If the I/O doesn’t support fading the LED intensity will step directly to the IOnX/IOffX value.
**==> picture [440 x 213] intentionally omitted <==**
**----- Start of picture text -----**<br>
When RegData(X) is cleared, the LED<br>will complete any current ramp, and then<br>stay at minimum intensity<br>RegData(X)<br>On intensity(max)<br>IOLED(X) level<br>Off intensity(min)<br>Fade in rate determined by Maximum intensity<br>Minimum intensity duration<br>register RegTRiseX duration determined by<br>determined by register<br>register RegTOnX<br>RegTOffX<br>IE NO<br>Fade out rate determined<br>by register RegTFallX<br>Figure 17 – LED Driver Blink Mode<br>**----- End of picture text -----**<br>
## 4.8.5 LED Driver Modes
For each IO bank, the LED driver mode of fading capable IOs can be selected between linear or logarithmic in RegMisc.
|**Lin.**|**Log.**|**Lin.**|**Log.**|**Lin.**|**Log.**|**Lin.**|**Log.**|**Lin.**|**Log.**|**Lin.**|**Log.**|**Lin.**|**Log.**|**Lin.**|**Log.**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|0|0|32|4|64|13|96|28|128|53|160|88|192|135|224|198|
|1|0|33|4|65|13|97|28|129|53|161|88|193|135|225|198|
|2|0|34|4|66|13|98|30|130|53|162|88|194|135|226|198|
|3|0|35|4|67|13|99|30|131|53|163|88|195|135|227|198|
|4|0|36|5|68|14|100|31|132|56|164|93|196|142|228|207|
|5|0|37|5|69|14|101|31|133|56|165|93|197|142|229|207|
|6|0|38|5|70|14|102|32|134|56|166|93|198|142|230|207|
|7|0|39|5|71|14|103|32|135|56|167|93|199|142|231|207|
|8|1|40|6|72|16|104|34|136|60|168|98|200|150|232|216|
|9|1|41|6|73|16|105|34|137|60|169|98|201|150|233|216|
|10|1|42|6|74|17|106|35|138|60|170|98|202|150|234|216|
|11|1|43|6|75|17|107|35|139|60|171|98|203|150|235|216|
|12|1|44|7|76|18|108|36|140|65|172|104|204|157|236|225|
Rev 4 – 26[th] April 2011
www.semtech.com
19
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~[~~ **ADVANCED COMMUNICATIONS & SENSING**
**==> picture [497 x 232] intentionally omitted <==**
**----- Start of picture text -----**<br>
13 1 45 7 77 18 109 36 141 65 173 104 205 157 237 225<br>14 SFReEFEAFH 1 46 7 78 19 110 38 142 65 174 104 206 157 238 225<br>15 1 47 7 79 19 111 38 143 65 175 104 207 157 239 225<br>16 2 48 8 80 20 112 39 144 69 176 110 208 165 240 235<br>17 TS 2 49 8 See 81 20 113 39 145 ee 69 177 110 209 165 241 235<br>18 2 50 8 82 21 114 41 146 69 178 110 210 165 242 235<br>19 TS 2 51 8 See 83 21 115 41 147 ee 69 179 ee 110 211 165 243 235<br>20 2 52 9 84 22 116 42 148 73 180 116 212 172 244 245<br>21 TS 2 53 9 See 85 22 117 42 149 ee 73 181 ee 116 213 172 245 245<br>22 2 54 9 86 23 118 44 150 73 182 116 214 172 246 245<br>23 TS 2 55 9 See 87 23 119 44 151 ee 73 183 ee 116 215 172 247 245<br>24 3 56 10 88 24 120 46 152 78 184 122 216 181 248 255<br>25 TS 3 57 10 See 89 24 121 46 153 ee 78 185 ee 122 217 181 249 255<br>26 3 58 10 90 25 122 46 154 78 186 122 218 181 250 255<br>27 3 59 10 91 25 123 46 155 78 187 122 219 181 251 255<br>28 TS 3 60 11 See 92 26 124 49 156 ee 83 188 ee 129 220 189 252 255<br>29 3 61 11 93 26 125 49 157 83 189 129 221 189 253 255<br>30 TS 3 62 12 See 94 27 126 49 158 ee 83 190 ee [ee] 129 222 189 254 255<br>a es ee ee ee ee eee eee<br>31 a 3 63 12 se 95 27 127 49 ee 159 83 191 eee 129 223 ee eee 189 255 eee 255<br>Table 7 – LED Driver Linear vs Logarithmic Function (I)<br>**----- End of picture text -----**<br>
**==> picture [444 x 179] intentionally omitted <==**
**----- Start of picture text -----**<br>
300<br>250<br>200<br>Linear mode<br>150<br>Log mode<br>100<br>50<br>0<br>1 10 19 28 37 46 55 64 73 82 91 100 109 118 127 136 145 154 163 172 181 190 199 208 217 226 235 244 253<br>RegIOn (4xRegOff[2:0])<br> IOn (IOff)<br>**----- End of picture text -----**<br>
_Figure 18 – LED Driver Linear vs Logarithmic Function (II)_
## 4.8.6 Synchronization of LED Drivers across several ICs
When several GPIO expanders are used in the same application it may be useful that their LEDs drivers are synchronous for coherent global operation.
In this case all ICs should share their fOSC through their OSCIO pins and have their reset connected together.
When RegMisc of each IC is set accordingly, NRESET signal can then be used to reset all devices’ internal counters (but not the register settings) and allow synchronous LED operation (blinking, fading) across multiple devices.
## 4.8.7 Tutorial
Below are the steps required to use the LED driver with the typical LED connection described §6.2:
- Disable input buffer (RegInputDisable)
- Disable pull-up (RegPullUp)
Rev 4 – 26[th] April 2011
www.semtech.com
20
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING** LC
- Enable open drain (RegOpenDrain)
- Set direction to output (RegDir) – by default RegData is set high => LED OFF
- Enable oscillator (RegClock)
- Configure LED driver clock and mode if relevant (RegMisc)
- Enable LED driver operation (RegLEDDriverEnable)
- Configure LED driver parameters (RegTOn, RegIOn, RegOff, RegTRise, RegTFall)
- Set RegData bit low => LED driver started
Rev 4 – 26[th] April 2011
www.semtech.com
21
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## ~~LT~~ **5 CONFIGURATION REGISTERS**
## **5.1 SX1508B 8-channel GPIO with LED Driver and Keypad Engine**
|**Address**|**Name**<br>~~=~~|**Description**<br>~~=~~|**Default**|
|---|---|---|---|
|**Device and IO Banks**<br>~~Sepo~~<br>~~[|~~||||
|0x00<br>~~Se~~|**RegInputDisable**<br>~~Sepo~~|Input buffer disable register<br>~~po~~<br>~~[~~|0000 0000<br>~~[|~~|
|0x01<br>~~Se~~|**RegLongSlew**<br>~~Sepo~~|Output buffer longslew register<br>~~po~~<br>~~[~~<br>~~{|~~|0000 0000<br>~~[|~~<br>~~{|~~|
|0x02<br>~~I~~|**RegLowDrive**|Output buffer low drive register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x03|**RegPullUp**<br>~~Re~~|Pull-upregister<br>~~{|~~|0000 0000<br>~~{|~~|
|0x04|**RegPullDown**<br>~~Re~~|Pull-down register|0000 0000|
|0x05<br>~~Se~~|**RegOpenDrain**<br>~~Re~~<br>~~Re~~|Open drain register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x06<br>~~Se~~|**RegPolarity**<br>~~Re~~|Polarityregister<br>~~{|~~|0000 0000<br>~~{|~~|
|0x07<br>~~Se~~|**RegDir**<br>~~Re~~|Direction register<br>~~{|~~<br>~~pd~~|1111 1111<br>*<br>~~{|~~|
|0x08<br>~~Se~~<br>~~Se~~|**RegData**<br>~~Re~~|Data register<br>~~{|~~<br>~~{|~~|1111 1111*<br>~~{|~~<br>~~{|~~|
|0x09<br>~~Se~~|**RegInterruptMask**|Interrupt mask register<br>~~{|~~<br>~~pd~~|1111 1111<br>~~{|~~|
|0x0A<br>~~Se~~|**RegSenseHigh **|Sense register for I/O[7:4]<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x0B<br>~~Se~~|**RegSenseLow**<br>~~Se~~|Sense register for I/O[3:0]<br>~~pd~~<br>~~{|~~|0000 0000<br>~~{|~~|
|0x0C|**RegInterruptSource**|Interrupt source register<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x0D<br>~~I~~|**RegEventStatus**|Event status register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x0E|**RegLevelShifter**|Level shifter register<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x0F<br>~~I~~|**RegClock**|Clock management register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x10<br>~~a Rs~~|**RegMisc**<br>~~Rs~~|Miscellaneous device settings register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x11<br>~~a Rs~~|**RegLEDDriverEnable**<br>~~Rs~~|LED driver enable register|0000 0000|
|**Debounce and Keypad Engine**<br>~~a Rs~~<br>~~Re~~<br>~~Se~~<br>~~{|~~||||
|0x12<br>~~Se~~|**RegDebounceConfig**<br>~~Re~~|Debounce configuration register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x13<br>~~Se~~|**RegDebounceEnable**<br>~~Re~~|Debounce enable register<br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x14<br>~~Se~~<br>~~ST~~|**RegKeyConfig**<br>~~Re~~<br>~~ee)~~|Keyscan configuration register<br>~~{|~~<br>~~pe~~<br>~~|~~|0000 0000<br>~~{|~~<br>~~|~~|
|0x15<br>~~ST~~|**RegKeyData**<br>~~ee)~~|Keyvalue<br>~~pe~~<br>~~|~~|1111 1111<br>~~|~~|
|**LED Driver(PWM, blinking, breathing)**<br>~~ST~~<br>~~ee)pe~~<br>~~|~~<br>~~[|~~||||
|0x16<br>~~I~~|**RegIOn0**|ON intensityregister for I/O[0]<br>~~[|~~|1111 1111<br>~~[|~~|
|0x17|**RegIOn1**|ON intensityregister for I/O[1]<br>~~[|~~<br>~~{|~~|1111 1111<br>~~[|~~<br>~~{|~~|
|0x18<br>~~I~~|**RegTOn2**|ON time register for I/O[2]<br>~~{|~~|0000 0000<br>~~{|~~|
|0x19|**RegIOn2**<br>~~Re~~|ON intensityregister for I/O[2]<br>~~{|~~|1111 1111<br>~~{|~~|
|0x1A|**RegOff2**<br>~~Re~~|OFF time/intensityregister for I/O[2]|0000 0000|
|0x1B<br>~~Se~~|**RegTOn3**<br>~~Re~~<br>~~Re~~|ON time register for I/O[3]<br>~~{|~~|0000 0000<br>~~{|~~|
|0x1C<br>~~Se~~|**RegIOn3**<br>~~Re~~|ON intensityregister for I/O[3]<br>~~{|~~|1111 1111<br>~~{|~~|
|0x1D<br>~~Se~~|**RegOff3**<br>~~Re~~|OFF time/intensityregister for I/O[3]<br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x1E<br>~~Se~~<br>~~Se~~|**RegTRise3**<br>~~Re~~|Fade in register for I/O[3]<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x1F<br>~~Se~~|**RegTFall3**|Fade out register for I/O[3]<br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x20<br>~~Se~~|**RegIOn4**|ON intensityregister for I/O[4]<br>~~{|~~<br>~~{|~~|1111 1111<br>~~{|~~<br>~~{|~~|
|0x21<br>~~Se~~|**RegIOn5**<br>~~Se~~|ON intensityregister for I/O[5]<br>~~pd~~<br>~~{|~~|1111 1111<br>~~{|~~|
|0x22|**RegTOn6**|ON time register for I/O[6]<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x23<br>~~I~~|**RegIOn6**|ON intensityregister for I/O[6]<br>~~{|~~|1111 1111<br>~~{|~~|
|0x24|**RegOff6**|OFF time/intensityregister for I/O[6]<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x25<br>~~I~~|**RegTOn7**|ON time register for I/O[7]<br>~~{|~~|0000 0000<br>~~{|~~|
|0x26|**RegIOn7**<br>~~Re~~|ON intensityregister for I/O[7]<br>~~{|~~|1111 1111<br>~~{|~~|
|0x27|**RegOff7**<br>~~Re~~|OFF time/intensityregister for I/O[7]<br>~~{|~~|0000 0000<br>~~{|~~|
|0x28<br>~~a Rs~~|**RegTRise7**<br>~~Re~~<br>~~Rs~~|Fade in register for I/O[7]<br>~~{|~~|0000 0000<br>~~{|~~|
|0x29<br>~~a Rs~~|**RegTFall7**<br>~~Rs~~|Fade out register for I/O[7]<br>~~{|~~|0000 0000<br>~~{|~~|
|**Miscellaneous**<br>~~a Rs~~<br>~~|~~||||
|0x2A|**RegHighInput**|High input enable register|0000 0000|
|**Software Reset**<br>~~|~~<br>~~Rs~~||||
|0x7D<br>~~a~~|**RegReset**<br>~~a~~<br>~~Rs~~|Software reset register<br>~~a~~|0000 0000<br>~~a~~|
|**Test(not to be written)**<br>~~Rs~~<br>~~|~~<br>~~Re~~<br>~~I~~<br>~~{|~~||||
|0x7E<br>~~I~~|**RegTest1**<br>~~Re~~|Test register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x7F<br>*Bits set as output take “1” as default value.<br>~~I~~|**RegTest2**<br>*Bits set as output take “1” as default value.<br>~~Re~~|Test register<br>~~{|~~|0000 0000<br>~~{|~~|
_Table 8 – SX1508B Configuration Registers Overview_
Rev 4 – 26[th] April 2011
www.semtech.com
22
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
~~LO~~ **ADVANCED COMMUNICATIONS & SENSING**
|**Addr**<br>~~TT]~~<br>~~|).~~|**Name**<br>~~TT]~~<br>~~|).~~<br>~~lw~~|**Default**<br>~~TT]~~<br>~~RD~~|**Bits**<br>~~TT]~~<br>~~RD~~|**Description**<br>~~TT]~~<br>~~RD~~|**Description**<br>~~TT]~~<br>~~RD~~|**Description**<br>~~TT]~~<br>~~RD~~|
|---|---|---|---|---|---|---|
|0x00<br>~~|).~~<br>~~.—lc~~|**RegInputDisable**<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~|0x00<br>~~RD~~<br>~~I DTD~~|7:0<br>~~RD~~<br>~~DTD~~|Disables the input buffer of each IO<br>0 : Input buffer is enabled (input actually being used)<br>1 : Input buffer is disabled(input actuallynot beingused or LED connection)<br>~~RD~~<br>~~DTD~~|||
|0x01<br>~~|).~~<br>~~.—lc~~<br>~~|).~~|**RegLongSlew**<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~<br>~~|).~~<br>~~lw~~|0x00<br>~~RD~~<br>~~I DTD~~<br>~~RD~~|7:0<br>~~RD~~<br>~~DTD~~<br>~~RD~~|Enables increased slew rate of the output buffer of each [output-configured] IO<br>0 : Increased slew rate is disabled<br>1 : Increased slew rate is enabled<br>~~RD~~<br>~~DTD~~<br>~~RD~~|||
|0x02<br>~~.—lc~~<br>~~|).~~<br>~~.—lc~~|**RegLowDrive**<br>~~lc (oe~~<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~|0x00<br>~~I DTD~~<br>~~RD~~<br>~~I DTD~~|7:0<br>~~DTD~~<br>~~RD~~<br>~~DTD~~|Enables reduced drive of the output buffer of each [output-configured] IO<br>0 : Reduced drive is disabled<br>1 : Reduced drive is enabled. IOL specifications are divided by2.<br>~~DTD~~<br>~~RD~~<br>~~DTD~~|||
|0x03<br>~~|).~~<br>~~.—lc~~<br>~~|).~~|**RegPullUp**<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~<br>~~|).~~<br>~~lw~~|0x00<br>~~RD~~<br>~~I DTD~~<br>~~RD~~|7:0<br>~~RD~~<br>~~DTD~~<br>~~RD~~|Enables the pull-up for each IO<br>0 : Pull-up is disabled<br>1 : Pull-upis enabled<br>~~RD~~<br>~~DTD~~<br>~~RD~~|||
|0x04<br>~~.—lc~~<br>~~|).~~<br>~~.—lc~~|**RegPullDown**<br>~~lc (oe~~<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~|0x00<br>~~I DTD~~<br>~~RD~~<br>~~I DTD~~|7:0<br>~~DTD~~<br>~~RD~~<br>~~DTD~~|Enables the pull-down for each IO<br>0 : Pull-down is disabled<br>1 : Pull-down is enabled<br>~~DTD~~<br>~~RD~~<br>~~DTD~~|||
|0x05<br>~~|).~~<br>~~.—lc~~<br>~~|).~~|**RegOpenDrain**<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~<br>~~|).~~<br>~~lw~~|0x00<br>~~RD~~<br>~~I DTD~~<br>~~RD~~|7:0<br>~~RD~~<br>~~DTD~~<br>~~RD~~|Enables open drain operation for each [output-configured] IO<br>0 : Regular push-pull operation<br>1 : Open drain operation<br>~~RD~~<br>~~DTD~~<br>~~RD~~|||
|0x06<br>~~.—lc~~<br>~~|).~~<br>~~.—lc~~|**RegPolarity**<br>~~lc (oe~~<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~|0x00<br>~~I DTD~~<br>~~RD~~<br>~~I DTD~~|7:0<br>~~DTD~~<br>~~RD~~<br>~~DTD~~|Enables polarity inversion for each IO<br>0 : Normal polarity : RegData[x] = IO[x]<br>1 : Invertedpolarity: RegData[x]= !IO[x] (for both input and output configured IOs)<br>~~DTD~~<br>~~RD~~<br>~~DTD~~|||
|0x07<br>~~|).~~<br>~~.—lc~~<br>~~a~~|**RegDir**<br>~~|).~~<br>~~lw~~<br>~~lc(oe~~<br>~~a~~|0xFF<br>~~RD~~<br>~~I DTD~~<br>~~a~~|7:0<br>~~RD~~<br>~~DTD~~<br>~~a~~|Configures direction for each IO.<br>0 : IO is configured as an output<br>1 : IO is configured as an input<br>~~RD~~<br>~~DTD~~<br>~~ee~~|||
|0x08<br>~~.—lc~~<br>~~a~~<br>~~a~~|**RegData**<br>~~lc (oe~~<br>~~a~~<br>~~a~~|0xFF<br>~~I DTD~~<br>~~a~~<br>~~a~~|7:0<br>~~DTD~~<br>~~a~~<br>~~a~~|Write: Data to be output to the output-configured IOs<br>Read: Data seen at the IOs,independent of the direction configured.<br>~~DTD~~<br>~~a~~<br>~~ee~~|||
|0x09<br>~~a~~|**RegInterruptMask**<br>~~a~~|0xFF<br>~~a~~|7:0<br>~~a~~|Configures which [input-configured] IO will trigger an interrupt on NINT pin<br>0 : An event on this IO will trigger an interrupt<br>1 : An event on this IO will NOT trigger an interrupt<br>~~ee~~|||
|0x0A<br>~~i~~|**RegSenseHigh**<br>~~i~~|0x00<br>~~i~~|7:6<br>~~ee~~<br>~~i~~|Edge sensitivity of RegData[7]<br>~~i~~|00 : None<br>01 : Rising<br>10 : Falling<br>11 : Both<br>~~i~~||
||||5:4<br>~~ee~~<br>~~i~~|Edge sensitivity of RegData[6]<br>~~i~~|||
||||3:2<br>~~ee~~<br>~~i~~|Edge sensitivity of RegData[5]<br>~~i~~|||
||||1:0<br>~~i~~|Edge sensitivityof RegData[4]<br>~~i~~|||
|0x0B<br>~~—~~<br>~~Tt~~|**RegSenseLow**<br>~~—~~<br>~~Tt~~|0x00<br>~~—~~<br>~~$=~~<br>~~Tt~~|7:6<br>~~—~~<br>~~$=~~|Edge sensitivity of RegData[3]<br>~~—~~<br>~~$=~~|00 : None<br>01 : Rising<br>10 : Falling<br>11 : Both<br>~~—~~<br>~~$=~~<br>~~...~~||
||||5:4<br>~~—~~<br>~~$=~~<br>~~Tt~~|Edge sensitivity of RegData[2]<br>~~—~~<br>~~$=~~<br>~~Tt...~~|||
||||3:2<br>~~—~~<br>~~$=~~<br>~~Tt~~|Edge sensitivity of RegData[1]<br>~~—~~<br>~~$=~~<br>~~Tt...~~|||
||||1:0<br>~~—~~<br>~~$=~~<br>~~Tt~~|Edge sensitivityof RegData[0]<br>~~—~~<br>~~$=~~<br>~~Tt...~~|||
|0x0C<br>~~Tt~~|**RegInterruptSource**<br>~~Tt~~|0x00<br>~~Tt~~|7:0<br>~~Tt~~|Interrupt source (from IOs set in RegInterruptMask)<br>0 : No interrupt has been triggered by this IO<br>1 : An interrupt has been triggered by this IO (an event as configured in relevant<br>RegSense register occured).<br>Writing '1' clears the bit in RegInterruptSource and in RegEventStatus<br>When all bits are cleared,NINT signalgoes back high.<br>~~Tt...~~|||
|0x0D<br>~~Tt~~|**RegEventStatus**<br>~~Tt~~|0x00<br>~~Tt~~|7:0<br>~~Tt~~<br>~~ee~~|Event status of all IOs.<br>0 : No event has occured on this IO<br>1 : An event has occured on this IO (an edge as configured in relevant RegSense<br>register occured).<br>Writing '1' clears the bit in RegEventStatus and in RegInterruptSource if relevant.<br>If the edge sensitivityof the IO is changed,the bit(s)will be cleared automatically<br>~~Tt...~~<br>~~Ps~~|||
|0x0E<br>~~SS~~|**RegLevelShifter**<br>~~SS~~|0x00<br>~~SS~~|7:6<br>~~ee~~<br>~~SS~~|Levelshifter modefor IO[3] (Bank A) andIO[7] (Bank B)<br>~~Ps~~<br>~~SS~~||00 : OFF<br>01 : A->B<br>10 : B->A<br>11 : Reserved<br>~~SS~~|
||||5:4<br>~~ee~~<br>~~SS~~|Levelshifter modefor IO[2] (Bank A) andIO[6] (Bank B)<br>~~Ps~~<br>~~SS~~|||
||||3:2<br>~~SS~~|Levelshifter modefor IO[1] (Bank A) andIO[5] (Bank B)<br>~~SS~~|||
||||1:0<br>~~SS~~|Level shifter mode for IO[0] (Bank A)and IO[4] (Bank B)<br>~~SS~~|||
|0x0F<br>~~SS~~<br>~~—~~|**RegClock**<br>~~SS~~<br>~~—(<“$$sCadUWVWAUMrCd~~|0x00<br>~~SS~~<br>~~(<“$$sCadUWVWAUMrCd~~|7<br>~~SS~~|Unused<br>~~SS~~|||
||||6:5<br>~~SS~~|Oscillator frequency (fOSC) source<br>00 : OFF. LED driver, keypad engine and debounce features are disabled.<br>01 : External clock input (OSCIN)<br>10 : Internal 2MHz oscillator<br>11 : Reserved<br>~~SS~~|||
||||4|OSCIO pin function (Cf. §4.7)<br>0 : OSCIO is an input (OSCIN)<br>1 :OSCIOis anoutput (OSCOUT)|||
||||3:0<br>~~(<“$$sCadUWVWAUMrCd~~|Frequency of the signal output on OSCOUT pin:<br>0x0 : 0Hz, permanent "0" logical level (GPO)<br>0xF : 0Hz, permanent "1" logical level (GPO)<br>Else : fOSCOUT = fOSC/(2^(RegClock[3:0]-1))|||
|0x10<br>~~—~~|**RegMisc**<br>~~—(<“$$sCadUWVWAUMrCd~~|0x00<br>~~(<“$$sCadUWVWAUMrCd~~|7<br>~~(<“$$sCadUWVWAUMrCd~~|LED Driver mode for Bank B ‘s fading capable IOs (IO7)<br>0: Linear<br>1: Logarithmic|||
Rev 4 – 26[th] April 2011
www.semtech.com
23
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~Ce~~ **ADVANCED COMMUNICATIONS & SENSING**
||||6:4<br>~~fo~~<br>~~fo~~|Frequency of the LED Driver clock ClkX of all IOs:<br>0 : OFF. LED driver functionality is disabled for all IOs.<br>Else:ClkX = fOSC/(2^(RegMisc[6:4]-1))<br>~~fo~~<br>~~fo~~|
|---|---|---|---|---|
||||3<br>~~fo~~<br>~~fo~~|LED Driver mode for Bank A ‘s fading capable IOs (IO3)<br>0: Linear<br>1: Logarithmic<br>~~fo~~<br>~~fo~~|
||||2<br>~~fo~~|NRESET pin function when externally forced low (Cf. §4.3.1 and §4.8.5).<br>0: Equivalent to POR<br>1: Reset PWM/Blink/Fade counters (not user programmed values)<br>This bitis canonly beresetmanually orbyPOR,not byNRESET.<br>~~fo~~|
||||1<br>~~fo~~|Auto-increment register address (Cf. §4.4)<br>0: ON. When several consecutive data are read/written, register address is incremented.<br>1:OFF. Whenseveralconsecutive data areread/written,registeraddressiskeptfixed.<br>~~fo~~|
||||0|Autoclear NINT on RegData read (Cf. §4.6)<br>0: ON. RegInterruptSource is also automatically cleared when RegData is read.<br>1: OFF. RegInterruptSource must be manually cleared, either directly or via<br>RegEventStatus.|
|0x11|**RegLEDDriverEnable**|0x00|7:0|Enables LED Driver for each [output-configured] IO<br>0 : LED Driver is disabled<br>1 : LED Driver is enabled|
|0x12|**RegDebounceConfig**|0x00|7:3|Unused|
||||2:0|Debounce time (Cf. §4.5.1)<br>000: 0.5ms x 2MHz/fOSC<br>001: 1ms x 2MHz/fOSC<br>010: 2ms x 2MHz/fOSC<br>011: 4ms x 2MHz/fOSC<br>100: 8ms x 2MHz/fOSC<br>101: 16ms x 2MHz/fOSC<br>110: 32ms x 2MHz/fOSC<br>111: 64ms x 2MHz/fOSC|
|0x13<br>~~**—**~~|**RegDebounceEnable**<br>~~**—**~~|0x00<br>~~**—**~~|7:0<br>~~**—**~~|Enables debouncing for each [input-configured] IO<br>0 : Debouncing is disabled<br>1 : Debouncingis enabled<br>~~**—**~~|
|0x14<br>~~**—**~~|**RegKeyConfig**<br>~~**—**~~|0x00<br>~~**—**~~|7<br>~~**—**~~|Unused<br>~~**—**~~|
||||6:5<br>~~**—**~~|Number of rows (outputs) + key scan enable<br>00 : Key scan OFF<br>01 : 2 rows – IO[0:1]<br>10 : 3 rows – IO[0:2]<br>11 : 4 rows– IO[0:3]<br>~~**—**~~|
||||4:3<br>~~**—**~~|Number of columns (inputs)<br>00 : 1 column – IO[4]<br>01 : 2 columns – IO[4:5]<br>10 : 3 columns – IO[4:6]<br>11 : 4columns– IO[4:7]<br>~~**—**~~|
||||2:0<br>~~**—**~~|Scan time per row (must be set above debounce time).<br>000 : 1ms x 2MHz/fOSC<br>001 : 2ms x 2MHz/fOSC<br>010 : 4ms x 2MHz/fOSC<br>011 : 8ms x 2MHz/fOSC<br>100 : 16ms x 2MHz/fOSC<br>101 : 32ms x 2MHz/fOSC<br>110 : 64ms x 2MHz/fOSC<br>111 : 128ms x 2MHz/fOSC<br>~~**—**~~|
|0x15|**RegKeyData**|0xFF|7:0|Key which generated NINT (active low)<br>Ex: RegKeyData=11011110 => key [IO5;IO0] has been pressed and generated NINT<br>When read it is automaticallycleared together with NINT and keyscan continues.|
|0xXX<br>~~a~~|**RegTOnX**<br>~~a ee~~|0x00<br>~~ee~~|7:5<br>~~ee~~|Unused<br>~~ee~~|
||||4:0<br>~~ee~~|ON Time of IO[X]:<br>0 : Infinite (Static mode, TOn directly controlled by RegData, Cf §4.8.2)<br>1 - 15 : TOnX = 64 * RegTOnX * (255/ClkX)<br>16 - 31 : TOnX = 512 * RegTOnX *(255/ClkX)<br>~~ee~~|
|0xXX<br>~~|~~<br>~~ppp~~|**RegIOnX**<br>~~EDTA~~<br>~~ppp~~|0xFF<br>~~EDTA~~<br>~~ppp~~|7:0<br>~~EDTA~~<br>~~se~~|ON Intensity of IO[X]<br>- Linear mode : IOnX = RegIOnX<br>- Logarithmic mode(fadingcapable IOs only): IOnX = f(RegIOnX) ,Cf§4.8.5<br>~~EDTA~~<br>~~se~~|
|0xXX<br>~~ppp~~|**RegOffX**<br>~~ppp~~|0x00<br>~~ppp~~|7:3<br>~~se~~|OFF Time of IO[X]:<br>0 : Infinite (Single shot mode, TOff directly controlled by RegData, Cf §4.8.3)<br>1 - 15 : TOffX = 64 * RegOffX[7:3] * (255/ClkX)<br>16-31 : TOffX =512 * RegOffX[7:3]*(255/ClkX)<br>~~se~~|
||||2:0<br>~~se~~|OFF Intensity of IO[X]<br>- Linear mode : IOffX = 4 x RegOff[2:0]<br>- Logarithmic mode(fadingcapable IOs only): IOffX = f(4 x RegOffX[2:0]) ,Cf§4.8.5<br>~~se~~|
|0xXX<br>~~ppp~~<br>~~a~~|**RegTRiseX**<br>~~ppp~~<br>~~a ee~~|0x00<br>~~ppp~~<br>~~ee~~|7:5<br>~~se~~<br>~~ee~~|Unused<br>~~se~~<br>~~ee~~|
||||4:0<br>~~ee~~|Fade In setting of IO[X]<br>0 : OFF<br>1 - 15 : TRiseX = (RegIOnX-(4xRegOffX[2:0])) * RegTRiseX * (255/ClkX)<br>16 - 31 : TRiseX = 16 *(RegIOnX-(4xRegOffX[2:0]))* RegTRiseX *(255/ClkX)<br>~~ee~~|
Rev 4 – 26[th] April 2011
www.semtech.com
24
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~LO~~ **ADVANCED COMMUNICATIONS & SENSING**
|0xXX|**RegTFallX**|0x00|7:5|Unused|
|---|---|---|---|---|
||||4:0|Fade Out setting of IO[X]<br>0 : OFF<br>1 - 15 : TFallX = (RegIOnX-(4xRegOffX[2:0])) * RegTFallX * (255/ClkX)<br>16 - 31 : TFallX = 16 *(RegIOnX-(4xRegOffX[2:0]))* RegTFallX *(255/ClkX)|
|0x2A|**RegHighInput**|0x00|7:0|Enables high input mode for each [input-configured] IO<br>0 : OFF. VIH max = 3.6V and VCCx min = 1.2V<br>1 : ON. VIH max = 5.5V and VCCx min = 1.65V|
|0x7D|**RegReset**|0x00|7:0|Software reset register<br>Writing consecutively 0x12 and 0x34 will reset the device (same as POR).<br>Always reads 0.|
_Table 9 – SX1508B Configuration Registers Description_
Rev 4 – 26[th] April 2011
www.semtech.com
25
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
|**Address**<br>~~a~~<br>~~CT~~|**Name**<br>~~a~~|**Description**<br>~~a~~<br>~~———~~|**Default**<br>~~a~~<br>~~———~~<br>~~3~~|
|---|---|---|---|
|**Device and IO Banks**<br>~~a~~<br>~~Re~~<br>~~CT~~<br>~~———~~||||
|0x00<br>~~CT~~|**RegInputDisableB**<br>~~Re~~|Input buffer disable register - I/O[15-8] (Bank B)<br>~~———~~|0000 0000<br>~~———~~|
|0x01<br>~~CT~~|**RegInputDisableA**<br>~~Re~~|Input buffer disable register - I/O[7-0] (Bank A)<br>~~———~~|0000 0000<br>~~———~~|
|0x02<br>~~CT~~|**RegLongSlewB**<br>~~a~~|Output buffer longslew register - I/O[15-8] (Bank B)<br>~~———~~|0000 0000<br>~~———~~|
|0x03<br>~~CT~~<br>~~CT~~|**RegLongSlewA**|Output buffer longslew register - I/O[7-0] (Bank A)<br>~~———~~<br>~~a~~|0000 0000<br>~~———~~<br>~~a~~|
|0x04<br>~~CT~~|**RegLowDriveB**<br>~~a~~|Output buffer low drive register - I/O[15-8] (Bank B)<br>~~a~~|0000 0000<br>~~a~~|
|0x05<br>~~CT~~<br>~~CT~~|**RegLowDriveA**|Output buffer low drive register - I/O[7-0] (Bank A)<br>~~a~~<br>~~a~~|0000 0000<br>~~a~~<br>~~a~~|
|0x06<br>~~CT~~|**RegPullUpB **<br>~~a~~|Pull-upregister - I/O[15-8] (Bank B)<br>~~a~~|0000 0000<br>~~a~~|
|0x07<br>~~CT~~<br>~~CT~~|**RegPullUpA **|Pull-upregister - I/O[7-0] (Bank A)<br>~~a~~<br>~~a~~|0000 0000<br>~~a~~<br>~~a~~|
|0x08<br>~~CT~~|**RegPullDownB**<br>~~a~~|Pull-down register - I/O[15-8] (Bank B)<br>~~a~~|0000 0000<br>~~a~~|
|0x09<br>~~CT~~<br>~~CT~~|**RegPullDownA**|Pull-down register - I/O[7-0] (Bank A)<br>~~a~~<br>~~a~~|0000 0000<br>~~a~~<br>~~a~~|
|0x0A<br>~~CT~~|**RegOpenDrainB**<br>~~a~~|Open drain register - I/O[15-8] (Bank B)<br>~~a~~|0000 0000<br>~~a~~|
|0x0B<br>~~CT~~<br>~~CT~~|**RegOpenDrainA**|Open drain register - I/O[7-0] (Bank A)<br>~~a~~<br>~~a~~|0000 0000<br>~~a~~<br>~~a~~|
|0x0C<br>~~CT~~|**RegPolarityB **<br>~~a~~|Polarityregister - I/O[15-8] (Bank B)<br>~~a~~|0000 0000<br>~~a~~|
|0x0D<br>~~CT~~<br>~~CT~~|**RegPolarityA **|Polarityregister - I/O[7-0] (Bank A)<br>~~a~~<br>~~a~~|0000 0000<br>~~a~~<br>~~a~~|
|0x0E<br>~~CT~~|**RegDirB**<br>~~a~~|Direction register - I/O[15-8] (Bank B)<br>~~a~~|1111 1111<br>~~a~~|
|0x0F<br>~~CT~~|**RegDirA**<br>~~Re~~|Direction register - I/O[7-0] (Bank A)<br>~~a~~<br>~~pd~~|1111 1111<br>*<br>~~a~~|
|0x10|**RegDataB**<br>~~Re~~|Data register - I/O[15-8] (Bank B)<br>|1111 1111*<br>*|
|0x11|**RegDataA**<br>~~Re~~<br>~~Re~~|Data register - I/O[7-0] (Bank A)<br><br>~~pd~~|1111 1111*|
|0x12|**RegInterruptMaskB**<br>~~Re~~|Interrupt mask register - I/O[15-8] (Bank B)<br>|1111 1111|
|0x13|**RegInterruptMaskA**<br>~~Re~~<br>~~Re~~|Interrupt mask register - I/O[7-0] (Bank A)<br><br>~~pd~~|1111 1111|
|0x14|**RegSenseHighB**<br>~~Re~~|Sense register for I/O[15:12]<br>|0000 0000|
|0x15|**RegSenseLowB**<br>~~Re~~<br>~~Re~~|Sense register for I/O[11:8]<br><br>~~pd~~|0000 0000|
|0x16<br>~~Se~~|**RegSenseHighA**<br>~~Re~~|Sense register for I/O[7:4]<br><br>~~{|~~|0000 0000<br>~~{|~~|
|0x17<br>~~Se~~|**RegSenseLowA**<br>~~Re~~|Sense register for I/O[3:0]<br><br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x18<br>~~Se~~<br>~~Se~~|**RegInterruptSourceB**|Interrupt source register - I/O[15-8] (Bank B)<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x19<br>~~Se~~|**RegInterruptSourceA**|Interrupt source register - I/O[7-0] (Bank A)<br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x1A<br>~~Se~~<br>~~Se~~|**RegEventStatusB**|Event status register - I/O[15-8] (Bank B)<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x1B<br>~~Se~~|**RegEventStatusA**|Event status register - I/O[7-0] (Bank A)<br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x1C<br>~~Se~~|**RegLevelShifter1**|Level shifter register<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x1D<br>~~I~~|**RegLevelShifter2**|Level shifter register<br>~~{|~~|0000 0000<br>~~{|~~|
|0x1E<br>~~CT~~|**RegClock**|Clock management register<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x1F<br>~~CT~~|**RegMisc**<br>~~a~~|Miscellaneous device settings register<br>~~{|~~<br>~~pd~~|0000 0000<br>~~{|~~|
|0x20<br>~~CT~~|**RegLEDDriverEnableB**|LED driver enable register - I/O[15-8] (Bank B)<br>~~{|~~|0000 0000<br>~~{|~~|
|0x21|**RegLEDDriverEnableA**|LED driver enable register - I/O[7-0] (Bank A)<br>~~pe~~|0000 0000|
|**Debounce and Keypad Engine**<br>~~|~~<br>~~Re~~||||
|0x22|**RegDebounceConfig**<br>~~Re~~|Debounce configuration register|0000 0000|
|0x23<br>~~Se~~|**RegDebounceEnableB**<br>~~Re~~|Debounce enable register - I/O[15-8] (Bank B)<br>~~{|~~|0000 0000<br>~~{|~~|
|0x24<br>~~Se~~|**RegDebounceEnableA**|Debounce enable register - I/O[7-0] (Bank A)<br>~~{|~~<br>~~pd~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x25<br>~~Se~~<br>~~Se~~|**RegKeyConfig1 **|Keyscan configuration register<br>~~{|~~<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~<br>~~{|~~|
|0x26<br>~~Se~~|**RegKeyConfig2 **|Keyscan configuration register<br>~~{|~~<br>~~pd~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x27<br>~~Se~~<br>~~ST~~|**RegKeyData1**<br>~~ee)~~|Keyvalue(column)<br>~~{|~~<br>~~|~~|1111 1111<br>~~{|~~<br>~~|~~|
|0x28<br>~~ST~~|**RegKeyData2**<br>~~ee)~~|Keyvalue(row)<br>~~|~~<br>~~pe~~|1111 1111<br>~~|~~|
|**LED Driver(PWM, blinking, breathing)**<br>~~ST~~<br>~~ee)~~<br>~~|~~<br>~~Re~~||||
|0x29|**RegTOn0**<br>~~Re~~|ON time register for I/O[0]|0000 0000|
|0x2A|**RegIOn0**<br>~~Re~~<br>~~Re~~|ON intensityregister for I/O[0]|1111 1111|
|0x2B|**RegOff0**<br>~~Re~~|OFF time/intensityregister for I/O[0]|0000 0000|
|0x2C<br>~~CT~~|**RegTOn1**<br>~~Re~~|ON time register for I/O[1]<br>~~a~~|0000 0000<br>~~a~~|
|0x2D<br>~~CT~~|**RegIOn1**<br>~~a~~|ON intensityregister for I/O[1]<br>~~a~~<br>~~{|~~|1111 1111<br>~~a~~<br>~~{|~~|
|0x2E<br>~~CT~~<br>~~CT~~|**RegOff1**|OFF time/intensityregister for I/O[1]<br>~~a~~<br>~~a~~<br>~~{|~~|0000 0000<br>~~a~~<br>~~a~~<br>~~{|~~|
|0x2F<br>~~CT~~|**RegTOn2**<br>~~a~~|ON time register for I/O[2]<br>~~a~~<br>~~{|~~<br>~~{|~~|0000 0000<br>~~a~~<br>~~{|~~<br>~~{|~~|
|0x30<br>~~CT~~<br>~~CT~~|**RegIOn2**|ON intensityregister for I/O[2]<br>~~a~~<br>~~a~~<br>~~{|~~|1111 1111<br>~~a~~<br>~~a~~<br>~~{|~~|
|0x31<br>~~CT~~|**RegOff2**<br>~~a~~|OFF time/intensityregister for I/O[2]<br>~~a~~<br>~~{|~~<br>~~{|~~|0000 0000<br>~~a~~<br>~~{|~~<br>~~{|~~|
|0x32<br>~~CT~~|**RegTOn3**<br>~~Re~~|ON time register for I/O[3]<br>~~a~~<br>~~{|~~|0000 0000<br>~~a~~<br>~~{|~~|
|0x33|**RegIOn3**<br>~~Re~~|ON intensityregister for I/O[3]<br>~~{|~~<br>~~{|~~|1111 1111<br>~~{|~~<br>~~{|~~|
|0x34|**RegOff3**<br>~~Re~~<br>~~Re~~|OFF time/intensityregister for I/O[3]<br>~~{|~~|0000 0000<br>~~{|~~|
|0x35|**RegTOn4**<br>~~Re~~|ON time register for I/O[4]<br>~~{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x36|**RegIOn4**<br>~~Re~~<br>~~Rs~~|ON intensityregister for I/O[4]<br>~~{|~~<br>~~{|~~|1111 1111<br>~~{|~~<br>~~{|~~|
|0x37<br>~~Se~~|**RegOff4**<br>~~Se~~<br>~~Rs~~|OFF time/intensityregister for I/O[4]<br>~~pd{|~~<br>~~{|~~|0000 0000<br>~~{|~~<br>~~{|~~|
|0x38|**RegTRise4**<br>~~Rs~~|Fade in register for I/O[4]<br>~~{|~~|0000 0000<br>~~{|~~|
Rev 4 – 26[th] April 2011
www.semtech.com
26
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
|**Address**|**Name**|**Description**|**Default**|
|---|---|---|---|
|0x39<br>~~es~~<br>~~|~~|**RegTFall4**<br>~~es~~<br>~~|~~<br>~~|~~|Fade out register for I/O[4]<br>~~es~~<br>~~ee~~<br>~~[~~|0000 0000<br>~~es~~<br>~~[~~|
|0x3A<br>~~ee~~<br>~~|~~|**RegTOn5**<br>~~ee~~<br>~~|~~<br>~~|~~|ON time register for I/O[5]<br>~~ee~~<br>~~[~~|0000 0000<br>~~[~~|
|0x3B<br>~~|~~<br>~~es~~|**RegIOn5**<br>~~|~~<br>~~|~~<br>~~es~~|ON intensityregister for I/O[5]<br>~~ee~~<br>~~es~~<br>~~[~~|1111 1111<br>~~es~~<br>~~[~~|
|0x3C|**RegOff5**|OFF time/intensityregister for I/O[5]|0000 0000|
|0x3D<br>~~es~~|**RegTRise5**<br>~~es~~|Fade in register for I/O[5]<br>~~es~~|0000 0000<br>~~es~~|
|0x3E<br>~~ee|~~|**RegTFall5**<br>~~|~~<br>~~|~~|Fade out register for I/O[5]<br>~~LP~~|0000 0000<br>~~LP~~|
|0x3F<br>~~ee|~~|**RegTOn6**<br>~~|~~<br>~~|~~|ON time register for I/O[6]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x40<br>~~ee |~~<br>~~ee|~~|**RegIOn6**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|ON intensityregister for I/O[6]<br>~~LP~~<br>~~LP~~|1111 1111<br>~~LP~~<br>~~LP~~|
|0x41<br>~~ee|~~|**RegOff6**<br>~~|~~<br>~~|~~|OFF time/intensityregister for I/O[6]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x42<br>~~ee |~~<br>~~|~~|**RegTRise6**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|Fade in register for I/O[6]<br>~~LP~~<br>~~ee~~<br>~~[~~|0000 0000<br>~~LP~~<br>~~[~~|
|0x43<br>~~ee~~<br>~~|~~|**RegTFall6**<br>~~ee~~<br>~~|~~<br>~~|~~|Fade out register for I/O[6]<br>~~ee~~<br>~~[~~|0000 0000<br>~~[~~|
|0x44<br>~~|~~<br>~~I Re~~|**RegTOn7**<br>~~|~~<br>~~|~~<br>~~Re~~|ON time register for I/O[7]<br>~~ee~~<br>~~[~~<br>~~[~~|0000 0000<br>~~[~~<br>~~[~~|
|0x45<br>~~I Re~~|**RegIOn7**<br>~~Re~~|ON intensityregister for I/O[7]<br>~~[~~|1111 1111<br>~~[~~|
|0x46<br>~~I Re~~|**RegOff7**<br>~~Re~~|OFF time/intensityregister for I/O[7]<br>~~[~~|0000 0000<br>~~[~~|
|0x47<br>~~es~~|**RegTRise7**<br>~~es~~|Fade in register for I/O[7]<br>~~es~~|0000 0000<br>~~es~~|
|0x48<br>~~es~~|**RegTFall7**<br>~~es~~|Fade out register for I/O[7]<br>~~es~~|0000 0000<br>~~es~~|
|0x49<br>~~ee|~~|**RegTOn8**<br>~~|~~<br>~~|~~|ON time register for I/O[8]<br>~~LP~~|0000 0000<br>~~LP~~|
|0x4A<br>~~ee|~~|**RegIOn8**<br>~~|~~<br>~~|~~|ON intensityregister for I/O[8]<br>~~LP~~<br>~~ee~~|1111 1111<br>~~LP~~|
|0x4B<br>~~ee |~~<br>~~ee|~~|**RegOff8**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|OFF time/intensityregister for I/O[8]<br>~~LP~~<br>~~LP~~|0000 0000<br>~~LP~~<br>~~LP~~|
|0x4C<br>~~ee|~~|**RegTOn9**<br>~~|~~<br>~~|~~|ON time register for I/O[9]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x4D<br>~~ee |~~<br>~~|~~|**RegIOn9**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|ON intensityregister for I/O[9]<br>~~LP~~<br>~~ee~~<br>~~[~~|1111 1111<br>~~LP~~<br>~~[~~|
|0x4E<br>~~ee~~<br>~~|~~|**RegOff9**<br>~~ee~~<br>~~|~~<br>~~|~~|OFF time/intensityregister for I/O[9]<br>~~ee~~<br>~~[~~|0000 0000<br>~~[~~|
|0x4F<br>~~|~~<br>~~I Re~~|**RegTOn10**<br>~~|~~<br>~~|~~<br>~~Re~~|ON time register for I/O[10]<br>~~ee~~<br>~~[~~<br>~~[~~|0000 0000<br>~~[~~<br>~~[~~|
|0x50<br>~~I Re~~|**RegIOn10**<br>~~Re~~|ON intensityregister for I/O[10]<br>~~[~~|1111 1111<br>~~[~~|
|0x51<br>~~I Re~~<br>~~I Re~~|**RegOff10**<br>~~Re~~<br>~~Re~~|OFF time/intensityregister for I/O[10]<br>~~[~~<br>~~[~~|0000 0000<br>~~[~~<br>~~[~~|
|0x52<br>~~I Re~~|**RegTOn11**<br>~~Re~~|ON time register for I/O[11]<br>~~[~~|0000 0000<br>~~[~~|
|0x53<br>~~I Re~~|**RegIOn11**<br>~~Re~~|ON intensityregister for I/O[11]<br>~~[~~|1111 1111<br>~~[~~|
|0x54<br>~~es~~|**RegOff11**<br>~~es~~|OFF time/intensityregister for I/O[11]<br>~~es~~|0000 0000<br>~~es~~|
|0x55<br>~~es~~|**RegTOn12**<br>~~es~~|ON time register for I/O[12]<br>~~es~~|0000 0000<br>~~es~~|
|0x56<br>~~ee|~~|**RegIOn12**<br>~~|~~<br>~~|~~|ON intensityregister for I/O[12]<br>~~LP~~|1111 1111<br>~~LP~~|
|0x57<br>~~ee|~~|**RegOff12**<br>~~|~~<br>~~|~~|OFF time/intensityregister for I/O[12]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x58<br>~~ee |~~<br>~~ee|~~|**RegTRise12**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|Fade in register for I/O[12]<br>~~LP~~<br>~~LP~~|0000 0000<br>~~LP~~<br>~~LP~~|
|0x59<br>~~ee|~~|**RegTFall12**<br>~~|~~<br>~~|~~|Fade out register for I/O[12]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x5A<br>~~ee |~~<br>~~|~~|**RegTOn13**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|ON time register for I/O[13]<br>~~LP~~<br>~~ee~~<br>~~[~~|0000 0000<br>~~LP~~<br>~~[~~|
|0x5B<br>~~ee~~<br>~~|~~|**RegIOn13**<br>~~ee~~<br>~~|~~<br>~~|~~|ON intensityregister for I/O[13]<br>~~ee~~<br>~~[~~|1111 1111<br>~~[~~|
|0x5C<br>~~|~~<br>~~I Re~~|**RegOff13**<br>~~|~~<br>~~|~~<br>~~Re~~|OFF time/intensityregister for I/O[13]<br>~~ee~~<br>~~[~~<br>~~[~~|0000 0000<br>~~[~~<br>~~[~~|
|0x5D<br>~~I Re~~|**RegTRise13**<br>~~Re~~|Fade in register for I/O[13]<br>~~[~~|0000 0000<br>~~[~~|
|0x5E<br>~~I Re~~<br>~~es~~|**RegTFall13**<br>~~Re~~<br>~~es~~|Fade out register for I/O[13]<br>~~es~~<br>~~[~~|0000 0000<br>~~es~~<br>~~[~~|
|0x5F|**RegTOn14**|ON time register for I/O[14]|0000 0000|
|0x60<br>~~es~~|**RegIOn14**<br>~~es~~|ON intensityregister for I/O[14]<br>~~es~~|1111 1111<br>~~es~~|
|0x61<br>~~ee|~~|**RegOff14**<br>~~|~~<br>~~|~~|OFF time/intensityregister for I/O[14]<br>~~LP~~|0000 0000<br>~~LP~~|
|0x62<br>~~ee|~~|**RegTRise14**<br>~~|~~<br>~~|~~|Fade in register for I/O[14]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x63<br>~~ee |~~<br>~~ee|~~|**RegTFall14**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|Fade out register for I/O[14]<br>~~LP~~<br>~~LP~~|0000 0000<br>~~LP~~<br>~~LP~~|
|0x64<br>~~ee|~~|**RegTOn15**<br>~~|~~<br>~~|~~|ON time register for I/O[15]<br>~~LP~~<br>~~ee~~|0000 0000<br>~~LP~~|
|0x65<br>~~ee |~~<br>~~|~~|**RegIOn15**<br>~~|~~<br>~~|~~<br>~~|~~<br>~~|~~|ON intensityregister for I/O[15]<br>~~LP~~<br>~~ee~~<br>~~[~~|1111 1111<br>~~LP~~<br>~~[~~|
|0x66<br>~~ee~~<br>~~|~~|**RegOff15**<br>~~ee~~<br>~~|~~<br>~~|~~|OFF time/intensityregister for I/O[15]<br>~~ee~~<br>~~[~~|0000 0000<br>~~[~~|
|0x67<br>~~|~~|**RegTRise15**<br>~~|~~<br>~~|~~|Fade in register for I/O[15]<br>~~ee~~<br>~~[~~|0000 0000<br>~~[~~|
|0x68<br>~~es~~|**RegTFall15**<br>~~es~~|Fade out register for I/O[15]<br>~~es~~|0000 0000<br>~~es~~|
|**Miscellaneous**<br>~~|~~<br>~~|eee~~<br>~~esee{|~~||||
|0x69<br>~~ee~~<br>~~|~~<br>~~es~~|**RegHighInputB**<br>~~ee~~<br>~~|~~<br>~~|~~<br>~~es~~|High input enable register - I/O[15-8] (Bank B)<br>~~eee~~<br>~~ee{|~~|0000 0000<br>~~{|~~|
|0x6A<br>~~|~~<br>~~es~~|**RegHighInputA**<br>~~|~~<br>~~|~~<br>~~es~~|High input enable register - I/O[7-0] (Bank A)<br>~~eee~~<br>~~ee{|~~|0000 0000<br>~~{|~~|
|**Software Reset**<br>~~esee{|~~<br>~~ee~~||||
|0x7D<br>~~es~~|**RegReset**<br>~~es~~|Software reset register<br>~~es~~<br>~~ee~~|0000 0000<br>~~es~~|
|**Test(not to be written)**<br>~~ee~~<br>~~|~~<br>~~|eee{|~~||||
|0x7E<br>~~ee~~<br>~~|~~|**RegTest1**<br>~~ee~~<br>~~|~~<br>~~|~~|Test register<br>~~eee{|~~|0000 0000<br>~~{|~~|
|0x7F<br>*Bits set as output take “1” as default value.<br>~~|~~|**RegTest2**<br>*Bits set as output take “1” as default value.<br>~~|~~<br>~~|~~|Test register<br>~~eee{|~~|0000 0000<br>~~{|~~|
*Bits set as output take “1” as default value.
_Table 10 – SX1509B Configuration Registers Overview_
Rev 4 – 26[th] April 2011
www.semtech.com
27
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
~~Ce~~ **ADVANCED COMMUNICATIONS & SENSING**
|**Addr**<br>~~TTT~~<br>~~_~~|**Name**<br>~~TTT~~<br>~~_(<s$s§§~~|**Default**<br>~~TTT~~<br>~~KEE~~|**Bits**<br>~~TTT~~|**Description**<br>~~TTT~~|**Description**<br>~~TTT~~|
|---|---|---|---|---|---|
|0x00<br>~~_~~|**RegInputDisableB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Disables the input buffer of each IO<br>0 : Input buffer is enabled (input actually being used)<br>1 : Input buffer is disabled(input actuallynot beingused or LED connection)||
|0x01<br>~~_~~<br>~~|~~<br>~~_~~|**RegInputDisableA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Disables the input buffer of each IO<br>0 : Input buffer is enabled (input actually being used)<br>1 : Input buffer is disabled(input actuallynot beingused,LED connection)<br>~~EDTA~~||
|0x02<br>~~_~~|**RegLongSlewB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Enables increased slew rate of the output buffer of each [output-configured] IO<br>0 : Increased slew rate is disabled<br>1 : Increased slew rate is enabled||
|0x03<br>~~_~~<br>~~|~~<br>~~_~~|**RegLongSlewA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Enables increased slew rate of the output buffer of each [output-configured] IO<br>0 : Increased slew rate is disabled<br>1 : Increased slew rate is enabled<br>~~EDTA~~||
|0x04<br>~~_~~|**RegLowDriveB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Enables reduced drive of the output buffer of each [output-configured] IO<br>0 : Reduced drive is disabled<br>1 : Reduced drive is enabled. IOL specifications are divided by2.||
|0x05<br>~~_~~<br>~~|~~<br>~~_~~|**RegLowDriveA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Enables reduced drive of the output buffer of each [output-configured] IO<br>0 : Reduced drive is disabled<br>1 : Reduced drive is enabled. IOL specifications are divided by2.<br>~~EDTA~~||
|0x06<br>~~_~~|**RegPullUpB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Enables the pull-up for each IO<br>0 : Pull-up is disabled<br>1 : Pull-upis enabled||
|0x07<br>~~_~~<br>~~|~~<br>~~_~~|**RegPullUpA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Enables the pull-up for each IO<br>0 : Pull-up is disabled<br>1 : Pull-upis enabled<br>~~EDTA~~||
|0x08<br>~~_~~|**RegPullDownB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Enables the pull-down for each IO<br>0 : Pull-down is disabled<br>1 : Pull-down is enabled||
|0x09<br>~~_~~<br>~~|~~<br>~~_~~|**RegPullDownA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Enables the pull-down for each IO<br>0 : Pull-down is disabled<br>1 : Pull-down is enabled<br>~~EDTA~~||
|0x0A<br>~~_~~|**RegOpenDrainB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Enables open drain operation for each [output-configured] IO<br>0 : Regular push-pull operation<br>1 : Open drain operation||
|0x0B<br>~~_~~<br>~~|~~<br>~~_~~|**RegOpenDrainA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Enables open drain operation for each [output-configured] IO<br>0 : Regular push-pull operation<br>1 : Open drain operation<br>~~EDTA~~||
|0x0C<br>~~_~~|**RegPolarityB**<br>~~_(<s$s§§~~|0x00<br>~~KEE~~|7:0|Enables polarity inversion for each IO<br>0 : Normal polarity : RegData[x] = IO[x]<br>1 : Invertedpolarity: RegData[x]= !IO[x] (for both input and output configured IOs)||
|0x0D<br>~~_~~<br>~~|~~<br>~~_~~|**RegPolarityA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~<br>~~_(<s$s§§~~|0x00<br> ~~KEE~~<br>~~EDTA~~<br>~~KEE~~|7:0<br>~~EDTA~~|Enables polarity inversion for each IO<br>0 : Normal polarity : RegData[x] = IO[x]<br>1 : Invertedpolarity: RegData[x]= !IO[x] (for both input and output configured IOs)<br>~~EDTA~~||
|0x0E<br>~~_~~|**RegDirB**<br>~~_(<s$s§§~~|0xFF<br>~~KEE~~|7:0|Configures direction for each IO.<br>0 : IO is configured as an output<br>1 : IO is configured as an input||
|0x0F<br>~~_~~<br>~~|~~|**RegDirA**<br>~~_ (<s$s§§ ~~<br>~~EDTA~~|0xFF<br> ~~KEE~~<br>~~EDTA~~|7:0<br>~~EDTA~~<br>~~ee~~|Configures direction for each IO.<br>0 : IO is configured as an output<br>1 : IO is configured as an input<br>~~EDTA~~||
|0x10<br>~~ee~~<br>~~_~~|**RegDataB**<br>~~ee~~<br>~~_~~|0xFF<br>~~ee~~<br>|7:0<br>~~ee~~<br>~~ee~~<br>ee|Write: Data to be output to the output-configured IOs<br>Read: Data seen at the IOs,independent of the direction configured.<br>~~ee~~||
|0x11<br>~~ee~~<br>~~_~~|**RegDataA**<br>~~ee~~<br>~~_(<s$s§§~~|0xFF<br>~~ee~~<br>~~KEE~~|7:0<br>~~ee~~<br>~~ee~~<br>ee|Write: Data to be output to the output-configured IOs<br>Read: Data seen at the IOs,independent of the direction configured.<br>~~ee~~||
|0x12<br>~~_~~|**RegInterruptMaskB**<br>~~_~~ ~~(<s$s§§~~|0xFF<br>~~KEE~~|7:0<br>ee|Configures which [input-configured] IO will trigger an interrupt on NINT pin<br>0 : An event on this IO will trigger an interrupt<br>1 : An event on this IO will NOT trigger an interrupt||
|0x13<br><br>~~a~~|**RegInterruptMaskA**<br> ~~(<s$s§§ ~~<br>~~a~~|0xFF<br> ~~KEE~~<br>~~a~~|7:0|Configures which [input-configured] IO will trigger an interrupt on NINT pin<br>0 : An event on this IO will trigger an interrupt<br>1 : An event on this IO will NOT trigger an interrupt||
|0x14<br>~~i=~~<br>~~i~~|**RegSenseHighB**<br>~~i=~~<br>~~i~~|0x00<br>~~i=~~<br>|7:6<br>~~i=~~|Edge sensitivity of RegData[15]<br>~~i=~~|00 : None<br>01 : Rising<br>10 : Falling<br>11 : Both<br>~~i=~~<br>|
||||5:4<br>~~i=~~|Edge sensitivity of RegData[14]<br>~~i=~~||
||||3:2<br>~~i=~~<br>~~$$~~<br>|Edge sensitivity of RegData[13]<br>~~i=~~<br>~~$$_______~~<br>||
||||1:0<br>~~i=~~<br>~~$$~~<br>|Edge sensitivityof RegData[12]<br>~~i=~~<br>~~$$_______~~<br>||
|0x15<br>~~i~~<br>~~SE~~|**RegSenseLowB**<br>~~i tS~~<br>~~SE~~|0x00<br>~~tS~~<br>~~SE~~|7:6<br>~~$$~~<br>~~tS~~|Edge sensitivity of RegData[11]<br>~~$$_______~~<br>~~tS~~|00 : None<br>01 : Rising<br>10 : Falling<br>11 : Both<br>~~tS~~<br>~~eee~~|
||||5:4<br>~~$$~~<br>~~tS~~|Edge sensitivity of RegData[10]<br>~~$$_______~~<br>~~tS~~||
||||3:2<br>~~$$~~<br>~~tS~~|Edge sensitivity of RegData[9]<br>~~$$_______~~<br>~~tS~~||
||||1:0<br>~~$$~~<br>~~tS~~<br>~~CO~~<br>~~SE~~|Edge sensitivityof RegData[8]<br>~~$$ _______~~<br>~~tS~~<br>~~CO~~<br>~~eee~~||
|0x16<br>~~SE~~<br>~~a~~|**RegSenseHighA**<br>~~SE~~<br>~~es A~~|0x00<br>~~SE~~<br>~~A~~|7:6<br>~~CO~~<br>~~SE~~|Edge sensitivity of RegData[7]<br>~~CO~~<br>~~eee~~|00 : None<br>01 : Rising<br>10 : Falling<br>11 : Both<br>~~eee~~<br>~~(~~|
||||5:4<br>~~CO~~<br>~~SE~~|Edge sensitivity of RegData[6]<br>~~CO~~<br>~~eee~~||
||||3:2<br>~~CO~~<br>~~SE~~|Edge sensitivity of RegData[5]<br>~~CO~~<br>~~eee~~||
||||1:0<br>~~CO~~<br>~~SE~~<br>~~GO (~~|Edge sensitivityof RegData[4]<br>~~CO~~<br>~~eee~~<br>~~(~~||
|0x17<br>~~SE~~<br>~~a~~|**RegSenseLowA**<br>~~SE~~<br>~~es A~~|0x00<br>~~SE~~<br>~~A~~|7:6<br>~~CO~~<br>~~SE ~~<br>~~GO (~~|Edge sensitivity of RegData[3]<br>~~CO~~<br> ~~eee~~<br>~~(~~|00: None<br>~~eee~~<br>~~(~~|
www.semtech.com
Rev 4 – 26[th] April 2011
28
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## ~~LT~~ **ADVANCED COMMUNICATIONS & SENSING**
||||5:4|Edge sensitivity of RegData[2]|||
|---|---|---|---|---|---|---|
||||3:2|Edge sensitivity of RegData[1]|||
||||1:0|Edge sensitivityof RegData[0]|||
|0x18|**RegInterruptSourceB**|0x00|7:0|Interrupt source (from IOs set in RegInterruptMask)<br>0 : No interrupt has been triggered by this IO<br>1 : An interrupt has been triggered by this IO (an event as configured in relevant<br>RegSense register occured).<br>Writing '1' clears the bit in RegInterruptSource and in RegEventStatus<br>When all bits are cleared,NINT signalgoes back high.|||
|0x19|**RegInterruptSourceA**|0x00|7:0|Interrupt source (from IOs set in RegInterruptMask)<br>0 : No interrupt has been triggered by this IO<br>1 : An interrupt has been triggered by this IO (an event as configured in relevant<br>RegSense register occured).<br>Writing '1' clears the bit in RegInterruptSource and in RegEventStatus<br>When all bits are cleared,NINT signalgoes back high.|||
|0x1A|**RegEventStatusB**|0x00|7:0|Event status of all IOs.<br>0 : No event has occured on this IO<br>1 : An event has occured on this IO (an edge as configured in relevant RegSense<br>register occured).<br>Writing '1' clears the bit in RegEventStatus and in RegInterruptSource if relevant.<br>If the edge sensitivityof the IO is changed,the bit(s)will be cleared automatically|||
|0x1B|**RegEventStatusA**|0x00|7:0|Event status of all IOs.<br>0 : No event has occured on this IO<br>1 : An event has occured on this IO (an edge as configured in relevant RegSense<br>register occured).<br>Writing '1' clears the bit in RegEventStatus and in RegInterruptSource if relevant.<br>If the edge sensitivityof the IO is changed,the bit(s)will be cleared automatically|||
|0x1C<br>~~eee~~<br>~~SP)~~|**RegLevelShifter1**<br>~~eee~~<br>~~SP)~~|0x00<br>~~eee~~<br>~~SP)~~|7:6<br>~~eee~~|Levelshifter modefor IO[7] (Bank A) andIO[15] (Bank B)<br>~~Ce~~<br>~~eee~~||00 : OFF<br>01 : A->B<br>10 : B->A<br>11 : Reserved<br>~~eee~~<br>~~eee~~|
||||5:4<br>~~eee~~|Levelshifter modefor IO[6] (Bank A) andIO[14] (Bank B)<br>~~eee~~|||
||||3:2<br>~~eee~~|Levelshifter modefor IO[5] (Bank A) andIO[13] (Bank B)<br>~~eee~~|||
||||1:0<br>~~eee~~<br>~~eee~~|Level shifter mode for IO[4] (Bank A)and IO[12] (Bank B)<br>~~eee~~<br>~~eee~~|||
|0x1D<br>~~eee~~<br>~~SP)~~|**RegLevelShifter2**<br>~~eee~~<br>~~SP)~~|0x00<br>~~eee~~<br>~~SP)~~|7:6<br>~~eee~~<br>~~eee~~|Levelshifter modefor IO[3] (Bank A) andIO[11] (Bank B)<br>~~eee~~<br>~~eee~~||00 : OFF<br>01 : A->B<br>10 : B->A<br>11 : Reserved<br>~~eee~~<br>~~eee~~|
||||5:4<br>~~eee~~|Levelshifter modefor IO[2] (Bank A) andIO[10] (Bank B)<br>~~eee~~|||
||||3:2<br>~~eee~~|Levelshifter modefor IO[1] (Bank A) andIO[9] (Bank B)<br>~~eee~~|||
||||1:0<br>~~eee~~|Level shifter mode for IO[0] (Bank A)and IO[8] (Bank B)<br>~~eee~~|||
|0x1E<br>~~SP)~~|**RegClock**<br>~~SP)~~|0x00<br>~~SP) ~~|7<br>~~eee~~|Unused<br>~~eee~~|||
||||6:5<br> ~~eee~~|Oscillator frequency (fOSC) source<br>00 : OFF. LED driver, keypad engine and debounce features are disabled.<br>01 : External clock input (OSCIN)<br>10 : Internal 2MHz oscillator<br>11 : Reserved<br>~~eee~~|||
||||4|OSCIO pin function (Cf. §4.7)<br>0 : OSCIO is an input (OSCIN)<br>1 :OSCIOis anoutput (OSCOUT)|||
||||3:0<br>~~Pp~~|Frequency of the signal output on OSCOUT pin:<br>0x0 : 0Hz, permanent "0" logical level (GPO)<br>0xF : 0Hz, permanent "1" logical level (GPO)<br>Else : fOSCOUT = fOSC/(2^(RegClock[3:0]-1))<br>~~Pp~~|||
|0x1F|**RegMisc**|0x00|7<br>~~OO~~|LED Driver mode for Bank B ‘s fading capable IOs (IO15-12)<br>0: Linear<br>1: Logarithmic<br>~~OO~~|||
||||6:4<br>~~a~~|Frequency of the LED Driver clock ClkX of all IOs:<br>0 : OFF. LED driver functionality is disabled for all IOs.<br>Else:ClkX = fOSC/(2^(RegMisc[6:4]-1))<br>~~a~~|||
||||3<br>~~a~~|LED Driver mode for Bank A ‘s fading capable IOs (IO7-4)<br>0: Linear<br>1: Logarithmic<br>~~a~~|||
||||2|NRESET pin function when externally forced low (Cf. §4.3.1 and §4.8.5)<br>0: Equivalent to POR<br>1: Reset PWM/Blink/Fade counters (not user programmed values)<br>This bitis canonly beresetmanually orbyPOR,not byNRESET.|||
||||1<br>~~a~~|Auto-increment register address (Cf. §4.4)<br>0: ON. When several consecutive data are read/written, register address is incremented.<br>1:OFF. Whenseveralconsecutive data areread/written,registeraddressiskeptfixed.<br>~~a~~|||
||||0<br>~~Pp~~|Autoclear NINT on RegData read (Cf. §4.6)<br>0: ON. RegInterruptSourceA/B is also automatically cleared when RegDataA/B is read.<br>1: OFF. RegInterruptSourceA/B must be manually cleared, either directly or via<br>RegEventStatusA/B.<br>~~Pp~~|||
|0x20<br>~~a~~|**RegLEDDriverEnableB**<br>~~a~~|0x00<br>~~a~~|7:0|Enables LED Driver for each [output-configured] IO<br>0 : LED Driver is disabled<br>1 : LED Driver is enabled|||
Rev 4 – 26[th] April 2011
www.semtech.com
29
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
|0x21<br>~~i~~|**RegLEDDriverEnableA**<br>~~i~~|0x00<br>~~i~~|7:0<br>~~i~~|Enables LED Driver for each [output-configured] IO<br>0 : LED Driver is disabled<br>1 : LED Driver is enabled<br>~~i~~|
|---|---|---|---|---|
|0x22<br>~~i~~|**RegDebounceConfig**<br>~~i~~<br>~~(§s§§-§~~|0x00<br>~~i~~<br>~~KU~~|7:3<br>~~i~~|Unused<br>~~i~~|
||||2:0<br>~~i~~<br>~~KU~~|Debounce time (Cf. §4.5.1)<br>000: 0.5ms x 2MHz/fOSC<br>001: 1ms x 2MHz/fOSC<br>010: 2ms x 2MHz/fOSC<br>011: 4ms x 2MHz/fOSC<br>100: 8ms x 2MHz/fOSC<br>101: 16ms x 2MHz/fOSC<br>110: 32ms x 2MHz/fOSC<br>111: 64ms x 2MHz/fOSC<br>~~i~~|
|0x23<br>~~_~~<br>~~rr~~|**RegDebounceEnableB**<br>~~_~~<br>~~(§s§§-§~~<br>~~rr~~|0x00<br>~~_~~<br>~~KU~~<br>|7:0<br>~~_~~<br>~~KU~~<br>~~ee~~|Enables debouncing for each [input-configured] IO<br>0 : Debouncing is disabled<br>1 : Debouncingis enabled<br>~~_~~<br>~~ee~~|
|0x24<br>~~rr~~|**RegDebounceEnableA**<br>~~(§s§§-§ ~~<br>~~rr~~|0x00<br> ~~KU~~<br>|7:0<br>~~KU~~<br>~~ee~~|Enables debouncing for each [input-configured] IO<br>0 : Debouncing is disabled<br>1 : Debouncingis enabled<br>~~ee~~|
|0x25<br>~~rr~~|**RegKeyConfig1**<br>~~rr ~~|0x00<br>|7<br>~~ee~~|Reserved<br>~~ee~~|
||||6:4<br> ~~ee~~|Auto Sleep time (no key press within this time will set keypad engine to sleep)<br>000 : OFF<br>001 : 128ms x 2MHz/fOSC<br>010 : 256ms x 2MHz/fOSC<br>011 : 512ms x 2MHz/fOSC<br>100 : 1sec x 2MHz/fOSC<br>101 : 2sec x 2MHz/fOSC<br>110 : 4sec x 2MHz/fOSC<br>111 :8secx 2MHz/fOSC<br>~~ee~~|
||||3|Unused|
||||2:0|Scan time per row (must be set above debounce time).<br>000 : 1ms x 2MHz/fOSC<br>001 : 2ms x 2MHz/fOSC<br>010 : 4ms x 2MHz/fOSC<br>011 : 8ms x 2MHz/fOSC<br>100 : 16ms x 2MHz/fOSC<br>101 : 32ms x 2MHz/fOSC<br>110 : 64ms x 2MHz/fOSC<br>111 : 128ms x 2MHz/fOSC|
|0x26|**RegKeyConfig2**|0x00|7:6|Unused|
||||5:3|Number of rows (outputs) + key scan enable<br>000 : Key scan OFF<br>001 : 2 rows – IO[0:1]<br>010 : 3 rows – IO[0:2]<br>011 : 4 rows – IO[0:3]<br>100 : 5 rows – IO[0:4]<br>101 : 6 rows – IO[0:5]<br>110 : 7 rows – IO[0:6]<br>111 :8rows– IO[0:7]|
||||2:0|Number of columns (inputs)<br>000 : 1 column – IO[8]<br>001 : 2 columns – IO[8:9]<br>010 : 3 columns – IO[8:10]<br>011 : 4 columns – IO[8:11]<br>100 : 5 columns – IO[8:12]<br>101 : 6 columns – IO[8:13]<br>110 : 7 columns – IO[8:14]<br>111 : 8 columns – IO[8:15]|
|0x27<br>~~|~~|**RegKeyData1**<br>~~EDTA~~|0xFF<br>~~EDTA~~|7:0<br>~~EDTA~~|Column which generated NINT (active low)<br>Ex: RegKeyData1=11011111 => IO13 has generated NINT<br>The register is automaticallycleared when RegKeyData2 is read.<br>~~EDTA~~|
|0x28<br>~~a~~|**RegKeyData2**<br>~~a~~|0xFF|7:0|Row which generated NINT (active low)<br>Ex: RegKeyData2=11111110 => IO0 has generated NINT<br>When the register is read both RegKeyData1 & RegKeyData2 are automatically cleared<br>together with NINT and keyscan continues.|
|0xXX<br>~~a~~|**RegTOnX**<br>~~a ee~~|0x00<br>~~ee~~|7:5<br>~~ee~~|Unused<br>~~ee~~|
||||4:0<br>~~ee~~|ON Time of IO[X]:<br>0 : Infinite (Static mode, TOn directly controlled by RegData, Cf §4.8.2)<br>1 - 15 : TOnX = 64 * RegTOnX * (255/ClkX)<br>16 - 31 : TOnX = 512 * RegTOnX *(255/ClkX)<br>~~ee~~|
|0xXX<br>~~|~~|**RegIOnX**|0xFF<br>~~ED~~|7:0<br>~~ED~~|ON Intensity of IO[X]<br>- Linear mode : IOnX = RegIOnX<br>- Logarithmic mode(fadingcapable IOs only): IOnX = f(RegIOnX) ,Cf§4.8.5|
Rev 4 – 26[th] April 2011
www.semtech.com
30
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~LO~~ **ADVANCED COMMUNICATIONS & SENSING**
|0xXX|**RegOffX**|0x00|7:3|OFF Time of IO[X]:<br>0 : Infinite (Single shot mode, TOff directly controlled by RegData, Cf §4.8.3)<br>1 - 15 : TOffX = 64 * RegOffX[7:3] * (255/ClkX)<br>16-31 : TOffX =512 * RegOffX[7:3]*(255/ClkX)|
|---|---|---|---|---|
||||2:0|OFF Intensity of IO[X]<br>- Linear mode : IOffX = 4 x RegOff[2:0]<br>- Logarithmic mode(fadingcapable IOs only): IOffX = f(4 x RegOffX[2:0]) ,Cf§4.8.5|
|0xXX|**RegTRiseX**|0x00|7:5|Unused|
||||4:0|Fade In setting of IO[X]<br>0 : OFF<br>1 - 15 : TRiseX = (RegIOnX-(4xRegOffX[2:0])) * RegTRiseX * (255/ClkX)<br>16 - 31 : TRiseX = 16 *(RegIOnX-(4xRegOffX[2:0]))* RegTRiseX *(255/ClkX)|
|0xXX|**RegTFallX**|0x00|7:5|Unused|
||||4:0|Fade Out setting of IO[X]<br>0 : OFF<br>1 - 15 : TFallX = (RegIOnX-(4xRegOffX[2:0])) * RegTFallX * (255/ClkX)<br>16 - 31 : TFallX = 16 *(RegIOnX-(4xRegOffX[2:0]))* RegTFallX *(255/ClkX)|
|0x69|**RegHighInputB**|0x00|7:0|Enables high input mode for each [input-configured] IO<br>0 : OFF. VIH max = 3.6V and VCCx min = 1.2V<br>1 : ON. VIH max = 5.5V and VCCx min = 1.65V|
|0x6A|**RegHighInputA**|0x00|7:0|Enables high input mode for each [input-configured] IO<br>0 : OFF. VIH max = 3.6V and VCCx min = 1.2V<br>1 : ON. VIH max = 5.5V and VCCx min = 1.65V|
|0x7D|**RegReset**|0x00|7:0|Software reset register<br>Writing consecutively 0x12 and 0x34 will reset the device (same as POR).<br>Always reads 0.|
_Table 11 – SX1509B Configuration Registers Description_
Rev 4 – 26[th] April 2011
www.semtech.com
31
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **6 APPLICATION INFORMATION**
## **6.1 Typical Application Circuit**
**==> picture [351 x 247] intentionally omitted <==**
**----- Start of picture text -----**<br>
OSCIO<br>3.3V 2.5V<br>XX] VDDM VCC1 iM 5V 5V<br>I/O[0] mm<br>I/O[1] <—_> WM\V<br>Host<br>I/O[2] Bd<br>controller<br>I/O Bd i NRESET I/O[3] is —<br>SX1508B 1.2V<br>VCC2<br>SCL } +— - bd SCL I/O[4] + i<br>I/O[5] iM<br>! I/O[6]<br>SDA X x] SDA 1<br>! I/O[7] ~—<br>'<br>I/O Xt --@ X X ADDR1<br>' D X ADDR0<br>' NINT aaa1<br>\ GND 1<br>1<br>i !<br>\ '<br>n Optional (depends on the application) 1'\to------e ee== !\'<br>**----- End of picture text -----**<br>
_Figure 19 - Typical Application Schematic_
## **6.2 Typical LED Connection**
Typical LED Connection is described below. The LED is usually connected to a high voltage (VBAT) to take advantage of the high sink current of the I/O and to accommodate high LED threshold voltages (VLED).
Please note that in this configuration the IO must be programmed as open drain output (RegOpenDrain) with no pull-up (RegPullUp) and input buffer must be disabled (RegInputBufferDisable).
VCCx can take any value without compromising LED operation.
**==> picture [150 x 67] intentionally omitted <==**
**----- Start of picture text -----**<br>
VCCx VBAT<br>VCCx<br>VLED [*]<br>SX1508/9B<br>R<br>IOx<br>IOL<br>**----- End of picture text -----**<br>
*LED colour/technology dependent
_Figure 20 – Typical LED Operation_
Serial R must be calculated for IOL not to exceed its max spec (Cf. Table 5) else VOL will increase.
Rev 4 – 26[th] April 2011
www.semtech.com
32
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **7 PACKAGING INFORMATION**
## **7.1 QFN-UT 20-pin Outline Drawing**
QFN-UT 20-pin, 3 x 3 mm, 0.4 mm pitch pp
_Figure 21 - QFN-UT 20-pin Outline Drawing_
## **7.2 QFN-UT 20-pin Land Pattern**
_Figure 22 - QFN-UT 20-pin Land Pattern_
Rev 4 – 26[th] April 2011
www.semtech.com
33
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **7.3 QFN-UT 28-pin Outline Drawing**
QFN-UT 28-pin, 4 x 4 mm, 0.4 mm pitch
_Figure 23 - QFN-UT 28-pin Outline Drawing_
## **7.4 QFN-UT 28-pin Land Pattern**
_Figure 24 - QFN-UT 28-pin Land Pattern_
Rev 4 – 26[th] April 2011
www.semtech.com
34
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## **8 SOLDERING PROFILE**
The soldering reflow profile for the SX1508B and SX1509B is described in the standard IPC/JEDEC J-STD020C. For detailed information please go to http://www.jedec.org/download/search/jstd020c.pdf
_Figure 25 - Classification Reflow Profile (IPC/JEDEC J-STD-020C)_
Rev 4 – 26[th] April 2011
www.semtech.com
35
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine**
## **ADVANCED COMMUNICATIONS & SENSING**
## —————zZ—a>—X—LXzz&&C—&——GC—E— **9 MARKING INFORMATION**
**==> picture [101 x 117] intentionally omitted <==**
**----- Start of picture text -----**<br>
GAA2<br>yyww<br>xxxx<br>yyww = Date Code<br>xxxx = Semtech Lot No.<br>**----- End of picture text -----**<br>
_Figure 26 – SX1508B Marking Information_
**==> picture [71 x 113] intentionally omitted <==**
**----- Start of picture text -----**<br>
GBA3<br>yyww<br>xxxxx<br>xxxxx<br>**----- End of picture text -----**<br>
yyww = Date Code xxxxx = Semtech Lot No. xxxxx
_Figure 27 – SX1509B Marking Information_
Rev 4 – 26[th] April 2011
www.semtech.com
36
**SX1508B/SX1509B World’s Lowest Voltage Level Shifting GPIO**
**with LED Driver and Keypad Engine**
## ~~LO~~ **ADVANCED COMMUNICATIONS & SENSING**
© Semtech 2011 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
## ~~|~~ **Contact Information**
## Semtech Corporation
Advanced Communications and Sensing Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804
Rev 4 – 26[th] April 2011
www.semtech.com
37
Updated at February 9, 2023
About Novapart
Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →