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SPM12565VT-220M-D
Power Inductor (SMD), 22 µH, 14.1 A, Shielded, 10.4 A, SPM-VT-D Series
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: TDK
- Product type: SMD Power Inductors
- SVHC: No SVHC (25-Jun-2025)
- Inductance: 22µH
- Product Range: SPM-VT-D Series
- Product Width: 12.5mm
- Product Height: 6.5mm
- Product Length: 13mm
- DC Resistance Max: 0.0341ohm
- RMS Current (Irms): 14.1A
- Power Inductor Case: 13mm x 12.5mm x 6.5mm
- Inductance Tolerance: ± 20%
- Inductor Construction: Shielded
- Inductor Case / Package: -
- Saturation Current (Isat): 10.4A
| Delivery and price | |
|---|---|
| Units per pack | 500 |
| Price | 1.82 € |
| Current stock | 200+ |
| Lead time | 7 days |
Datasheet
## Datasheet 7 oe **Serial EEPROM Series Standard EEPROM I[2] C BUS EEPROM (2-Wire)**
## **BR24G1Mxxx-5A Series**
## **General Description**
BR24G1Mxxx-5A Series is a 1 Mbit serial EEPROM of I[2] C BUS Interface.
## **Features**
- All Controls Available by 2 Ports of Serial Clock (SCL) and Serial Data (SDA)
- 1.7 V to 5.5 V Wide Limit of Operating Voltage, Possible 1 MHz Operation
- Page Write Mode 256 Byte
- Bit Format 128 K x 8 bit
- Low Current Consumption
## **Key Specifications**
- Write Cycles: 4 Million Times (Ta = 25 °C)
- ◼ Data Retention: 200 Years (Ta = 55 °C) ◼ Write Cycle Time: 3.5 ms (Max) ◼ Supply Voltage: 1.7 V to 5.5 V
- Ambient Operating Temperature: -40 °C to +85 °C
**Packages W (Typ) x D (Typ) x H (Max)** SOP8[*1] 5.0 mm x 6.2 mm x 1.71 mm SOP-J8 4.9 mm x 6.0 mm x 1.65 mm TSSOP-B8 3.0 mm x 6.4 mm x 1.2 mm
*1 Last Time Buy.
- Prevention of Miswriting
- ➢ WP (Write Protect) Function Added
- ➢ Prevention of Miswriting at Low Voltage
- Noise Filter Built in SCL/SDA Pin
**==> picture [73 x 110] intentionally omitted <==**
**----- Start of picture text -----**<br>
Last Time Buy<br>SOP8<br>SOP-J8<br>**----- End of picture text -----**<br>
- Initial Delivery State FFh
## **Applications**
- Ordinary Electronic Equipment (such as AV SOP8 TSSOP-B8 equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.).
## **Typical Application Circuit**
VCC A0 VCC A1 WP * A2 SCL Microcontroller GND SDA 0.1 μF ~~ec:~~ * Connect A1, A2 to VCC or GND. These pins have pull-down elements inside the IC. If pins are open, they are the same as when they are connected to GND. Pin (A0) not used as device address may be set to any of VCC or GND or leave as open.
Figure 2
Figure 1. Typical Application Circuit
`〇` Product structure : Silicon integrated circuit `〇` This product has no designed protection against radioactive rays. . www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. 1/34 TSZ22111 • 14 • 001
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## **Contents**
General Description................................................................................................................................................................... 1 Features ................................................................................................................................................................................... 1 Applications .............................................................................................................................................................................. 1 Typical Application Circuit .......................................................................................................................................................... 1 Key Specifications ..................................................................................................................................................................... 1 Packages .................................................................................................................................................................................. 1 Contents ................................................................................................................................................................................... 2 Pin Configuration ....................................................................................................................................................................... 3 Pin Description .......................................................................................................................................................................... 3 Block Diagram ........................................................................................................................................................................... 3 Absolute Maximum Ratings ....................................................................................................................................................... 4 Thermal Resistance .................................................................................................................................................................. 4 Operating Conditions ................................................................................................................................................................. 5 Input/Output Capacitance .......................................................................................................................................................... 5 Input Impedance ....................................................................................................................................................................... 5 Memory Cell Characteristics ...................................................................................................................................................... 5 Electrical Characteristics ........................................................................................................................................................... 5 AC Characteristics .................................................................................................................................................................... 6 AC Characteristics Condition ..................................................................................................................................................... 6 Input/Output Timing ................................................................................................................................................................... 7 Typical Performance Curves ...................................................................................................................................................... 9 I[2] C BUS Communication ......................................................................................................................................................... 18 Write Command ...................................................................................................................................................................... 19 Read Command ...................................................................................................................................................................... 21 Method of Reset ...................................................................................................................................................................... 22 Acknowledge Polling ............................................................................................................................................................... 22 WP Valid Timing (Write Cancel) ............................................................................................................................................... 23 Command Cancel by Start Condition and Stop Condition......................................................................................................... 23 Application Examples .............................................................................................................................................................. 24 Caution on Power-Up Conditions ............................................................................................................................................. 26 Low Voltage Malfunction Prevention Function .......................................................................................................................... 26 I/O Equivalence Circuits .......................................................................................................................................................... 27 Operational Notes ................................................................................................................................................................... 28 Ordering Information ............................................................................................................................................................... 29 Lineup ..................................................................................................................................................................................... 29 Marking Diagrams ................................................................................................................................................................... 30 Physical Dimension and Packing Information ........................................................................................................................... 31 Revision History ...................................................................................................................................................................... 34
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## **Pin Configuration**
**==> picture [252 x 97] intentionally omitted <==**
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(TOP VIEW)<br>A0 —= 1 8 VCC<br>A1 — 2 -_ 7 WP<br>A2 — 3 - 6 SCL<br>GND 4 5 SDA<br>**----- End of picture text -----**<br>
Figure 3. Pin Configuration
## **Pin Description**
|**Pin Description Description**||||
|---|---|---|---|
|Pin No.|Pin Name|Input/Output|Descriptions|
|1|A0|-|Don’t use_(Note 1)_|
|2|A1|Input|Slave address setting_(Note 2)_|
|3|A2|Input|Slave address setting_(Note 2)_|
|4|GND|-|Reference voltage of all input/output, 0 V|
|5|SDA|Input/Output|Serial data input / serial data output_(Note 3)_|
|6|SCL|Input|Serial clock input|
|7|WP|Input|Write protect input_(Note 4)_|
|8|VCC|-|Connect to the power source|
_(Note 1)_ Pin not used as device address may be set to any of VCC or GND or leave as open.
_(Note 2)_ Connect to VCC or GND. There are pull-down elements inside the IC. If pins are open, they are the same as when they are connected to GND.
_(Note 3_ ) SDA is NMOS open drain, so it requires a pull-up resistor.
_(Note 4)_ Connect to VCC or GND, or control to ‘HIGH’ level or ‘LOW’ level. There are pull-down elements inside the IC. If this pin is open, this input is recognized as ‘LOW’.
## **Block Diagram**
**==> picture [361 x 183] intentionally omitted <==**
**----- Start of picture text -----**<br>
A0 1 1 Mbit EEPROM Array 8 VCC<br>(Don’t use)<br>8 bit<br>Address 17 bit Word Address Data<br>A1 2 Decoder Register Register 7 WP<br>START STOP<br>A2 3 6 SCL<br>Control Circuit<br>ACK<br>High Voltage Supply Voltage<br>GND 4 5 SDA<br>Generating Circuit Detection<br>**----- End of picture text -----**<br>
Figure 4. Block Diagram
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## **Absolute Maximum Ratings**
|**solute Maximum Ratings**|||||
|---|---|---|---|---|
|Parameter|Symbol|Rating|Unit|Remark|
|Supply Voltage|VCC|-0.3 to +6.5|V|Ta = 25 °C|
|Input Voltage / Output Voltage|-|-0.3 to VCC+1.0|V|Ta = 25 °C. The maximum value of input<br>voltage / output voltage is not over than 6.5 V.<br>When the pulse width is 50 ns or less, the<br>minimum value of input voltage / output<br>voltage is-1.0 V.|
|Electro Static Discharge<br>(Human Body Model)|VESD|-4000 to +4000|V|Ta = 25 °C|
|Maximum Output Low Current<br>(SDA)|IOLMAX|10|mA|Ta = 25 °C|
|Maximum Junction Temperature|Tjmax|150|°C|-|
|Storage Temperature Range|Tstg|-65 to +150|°C|-|
_**Caution 1:** Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings._
_**Caution 2:** Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating._
## **Thermal Resistance** _**[ (Note 5) ]**_
|**rmal Resistance****_(Note 5)_**|||||
|---|---|---|---|---|
|Parameter|Symbol|Thermal Resistance(Typ)||Unit|
|||1s_(Note 7)_|2s2p(_Note 8)_||
|SOP8*1|||||
|Junction to Ambient|θJA|197.4|109.8|°C/W|
|Junction to Top Characterization Parameter_(Note 6)_|ΨJT|21|19|°C/W|
|SOP-J8|||||
|Junction to Ambient|θJA|149.3|76.9|°C/W|
|Junction to TopCharacterization Parameter_(Note 6)_|ΨJT|18|11|°C/W|
|TSSOP-B8|||||
|Junction to Ambient|θJA|251.9|152.1|°C/W|
|Junction to TopCharacterization Parameter_(Note 6)_|ΨJT|31|20|°C/W|
*1 Last Time Buy.
_(Note 5)_ Based on JESD51-2A ( Still-Air ).
_(Note 6)_ The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface of the component package.
_(Note 7)_ Using a PCB board based on JESD51-3.
_(Note 8)_ Using a PCB board based on JESD51-7.
|Layer Number of<br>Measurement Board|Material|Board Size||||
|---|---|---|---|---|---|
|Single|FR-4|114.3 mm x 76.2 mm x 1.57 mmt||||
|Top||||||
|Copper Pattern|Thickness|||||
|Footprints and Traces|70μm|||||
|||||||
|Layer Number of<br>Measurement Board|Material|Board Size||||
|4 Layers|FR-4|114.3 mm x 76.2 mm x 1.6 mmt||||
|||||||
|Top||2 Internal Layers||Bottom||
|Copper Pattern|Thickness|Copper Pattern|Thickness|Copper Pattern|Thickness|
|Footprints and Traces|70μm|74.2 mm x 74.2 mm|35μm|74.2 mm x 74.2 mm|70μm|
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|**Op**<br>**Inp**<br>**Inp**<br>**Me**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|**erating Conditions**<br>Parameter<br>Symbol<br>Min<br>Typ<br>Max<br>Unit<br>Supply Voltage<br>VCC<br>1.7<br>-<br>5.5<br>V<br>Ambient Operating Temperature<br>Ta<br>-40<br>-<br>+85<br>°C<br>Bypass Capacitor_(Note 9)_<br>C<br>0.1<br>-<br>-<br>μF<br>_(Note 9)_Connect a bypass capacitor between the IC’s VCC and GND pins.<br>**ut/Output Capacitance(Ta= 25°C, f = 1 MHz)**|
|---|---|---|---|---|---|---|---|
||Parameter|Symbol|Min|Typ|Max|Unit|Conditions|
||Input/Output Capacitance<br>(SDA)_(Note 10)_|CI/O|-|-|8|pF|VI/O= GND|
||Input Capacitance<br>(SCL, A0, A1, A2, WP)_(Note 10)_|CIN|-|-|8|pF|VIN= GND|
||_(Note 10)_Not 100 % Tested.<br>**ut Impedance(Unless otherwise specified, Ta= -40°C to+85°C, VCC= 1.7 V to 5.5 V)**|||||||
||Parameter|Symbol|Min|Typ|Max|Unit|Conditions|
||Input Impedance 1|ZIH|500|-|-|kΩ|0.7VCC≤ VIN(A1, A2, WP)|
||Input Impedance 2|ZIL|30|-|-|kΩ|VIN≤ 0.3VCC(A1, A2, WP)|
||**mory Cell Characteristics (VCC= 1.7 V to 5.5 V)**|||||||
||Parameter|Symbol|Min|Typ|Max|Unit|Conditions|
||Write Cycles_(Note 11, 12)_|-|4,000,000|-|-|Times|Ta = 25 °C|
||Data Retention_(Note 11)_|-|200|-|-|Years|Ta = 55 °C|
_(Note 11)_ Not 100 % Tested. _(Note 12)_ The Write Cycles is defined for unit of 4 data bytes with the same address bits of P0 to WA2. **Electrical Characteristics (Unless otherwise specified, Ta = -40 °C to +85 °C, VCC = 1.7 V to 5.5 V)**
|Parameter|Symbol|Min|Typ|Max|Unit|Conditions|
|---|---|---|---|---|---|---|
|Input High Voltage|VIH|0.7VCC|-|VCC+1.0|V|-|
|Input Low Voltage|VIL|-0.3_(Note 13)_|-|+0.3VCC|V|-|
|Output Low Voltage 1|VOL1|-|-|0.4|V|IOL= 3.2 mA, 2.5 V ≤ VCC≤ 5.5 V<br>(SDA)|
|Output Low Voltage 2|VOL2|-|-|0.2|V|IOL= 1.0 mA, 1.7 V ≤ VCC< 2.5 V<br>(SDA)|
|Input Leakage Current 1|ILI1|-1|-|+1|μA|VIN= 0 V or VCC(A1, A2, WP)<br>Standby Mode|
|Input Leakage Current 2|ILI2|-1|-|+1|μA|VIN= 0 V to VCC (A0, SCL)|
|Output Leakage Current|ILO|-1|-|+1|μA|VOUT= 0 V to VCC (SDA)|
|Supply Current (Write)_(Note 14)_|ICC1|-|-|3.0|mA|VCC= 5.5 V, fSCL= 1 MHz,<br>tWR= 3.5 ms<br>Byte Write, Page Write|
|Supply Current (Read)_(Note 14)_|ICC2|-|-|1.5|mA|VCC= 5.5 V, fSCL= 1 MHz<br>Random Read, Current Read,<br>Sequential Read|
|Standby Current|ISB|-|-|5.0|μA|VCC= 5.5 V, SDA, SCL = VCC<br>A1, A2, WP=0 V|
_(Note 13)_ When the pulse width is 50 ns or less, it is -1.0 V.
_(Note 14)_ The average value during operation.
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**AC Characteristics (Unless otherwise specified, Ta = -40 °C to +85 °C, VCC = 1.7 V to 5.5 V)**
|Parameter|Symbol|Min|Typ|Max|Unit|
|---|---|---|---|---|---|
|Clock Frequency|fSCL|-|-|1|MHz|
|Data Clock High Period|tHIGH|260|-|-|ns|
|Data Clock Low Period|tLOW|500|-|-|ns|
|SDA, SCL (input) Rise Time_(Note 15)_|tR|-|-|1000|ns|
|SDA, SCL (input) Fall Time_(Note 15)_|tF1|-|-|1000|ns|
|SDA (output) Fall Time_(Note 15)_|tF2|-|-|120|ns|
|Start Condition Hold Time|tHD:STA|250|-|-|ns|
|Start Condition Setup Time|tSU:STA|200|-|-|ns|
|Input Data Hold Time|tHD:DAT|0|-|-|ns|
|Input Data Setup Time|tSU:DAT|50|-|-|ns|
|Output Data Delay Time|tPD|50|-|450|ns|
|Output Data Hold Time|tDH|50|-|-|ns|
|Stop Condition Setup Time|tSU:STO|250|-|-|ns|
|Bus Free Time|tBUF|500|-|-|ns|
|Write Cycle Time|tWR|-|-|3.5|ms|
|Noise Suppression Time (SCL, SDA)|tI|-|-|50|ns|
|WP Hold Time|tHD:WP|1.0|-|-|μs|
|WP Setup Time|tSU:WP|0.1|-|-|μs|
|WP High Period|tHIGH:WP|1.0|-|-|μs|
_(Note 15)_ Not 100 % Tested.
## **AC Characteristics Condition**
|**Characteristics Condition**||||
|---|---|---|---|
|Parameter|Symbol|Conditions|Unit|
|Load Capacitance|CL|100|pF|
|Input Rise Time|tR|20|ns|
|Input Fall Time|tF1|20|ns|
|Input Voltage|VIH|0.8VCC|V|
||VIL|0.2VCC|V|
|Input/Output Data Timing Reference Level|-|0.3VCC/0.7VCC|V|
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## **Input/Output Timing**
**==> picture [394 x 131] intentionally omitted <==**
**----- Start of picture text -----**<br>
tR tF1 tHIGH<br>70%<br>SCL<br>30%<br>tHD:STA tSU:DAT tLOW tHD:DAT<br>SDA 70 %<br>(input) 30%<br>tBUF tPD tDH<br>SDA 70%<br>(output) 30%<br>tF2<br>**----- End of picture text -----**<br>
○Input read at the rise edge of SCL ○Data output in sync with the fall of SCL
Figure 5-(a). Input/Output Timing
**==> picture [387 x 106] intentionally omitted <==**
**----- Start of picture text -----**<br>
70%<br>SCL<br>tSU : STA tHD : STA tSU : STO<br>70%<br>SDA 3 0%<br>START condition STOP condition<br>**----- End of picture text -----**<br>
Figure 5-(b). Start-Stop Condition Timing
**==> picture [298 x 107] intentionally omitted <==**
**----- Start of picture text -----**<br>
SCL<br>70%<br>SDA D0 ACK<br>write data tWR<br>(n-th address)<br>STOP condition START condition<br>**----- End of picture text -----**<br>
Figure 5-(c). Write Cycle Timing
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## **Input/Output Timing - continued**
**==> picture [295 x 110] intentionally omitted <==**
**----- Start of picture text -----**<br>
70%<br>SCL<br>DATA(1) DATA(n)<br>SDA D1 D0 ACK ACK 70%<br>tWR<br>70%<br>WP<br>30%<br>tSU : WP tHD : WP<br>STOP condition<br>**----- End of picture text -----**<br>
Figure 5-(d). WP Timing at Write Execution
**==> picture [372 x 92] intentionally omitted <==**
**----- Start of picture text -----**<br>
SCL<br>DATA(1) DATA(n)<br>70%<br>SDA D1 D0 ACK ACK<br>tHIGH : WP tWR<br>70%<br>WP<br>**----- End of picture text -----**<br>
Figure 5-(e). WP Timing at Write Cancel
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## **Typical Performance Curves**
**==> picture [499 x 550] intentionally omitted <==**
**----- Start of picture text -----**<br>
6 6<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>5 5<br>Ta = +85 °C Ta = +85 °C<br>F oo } SE<br>4 4<br>SPEC<br>3 3<br>| | ere F E E<br>2 2<br>eee +4 fe<br>1 1<br>SPEC<br>eee ae<br>0 0<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br>Figure 6. Input High Voltage vs Supply Voltage Figure 7. Input Low Voltage vs Supply Voltage<br>1.0 1.0<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>0.8 Ta = +85 °C 0.8 Ta = +85 °C<br>C o S) EPS<br>0.6 0.6<br>SPEC<br>0.4 0.4<br>SPEC<br>0.2 0.2<br>0.0 We 0.0 on<br>ee ee ee<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Output Low Current: IOL [mA] Output Low Current: IOL [mA]<br>[V]<br> [V] IL<br>IH Input Low Voltage: V<br>Input High Voltage: V<br> [V] [V]<br>OL1 OL2<br>Output Low Voltage 1: V Output Low Voltage 2: V<br>**----- End of picture text -----**<br>
Figure 8. Output Low Voltage 1 vs Output Low Current (VCC = 2.5 V)
Figure 9. Output Low Voltage 2 vs Output Low Current (VCC = 1.7 V)
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## **Typical Performance Curves - continued**
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**----- Start of picture text -----**<br>
1.2 1.2<br>SPEC SPEC<br>1.0 Pte 1.0 LE<br>0.8 0.8<br>COP Eee<br>Ta = -40 °C Ta = -40 °C<br>0.6 Ta = +25 °C 0.6 Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>c a ) ce<br>0.4 0.4<br>b e s J,<br>0.2 0.2<br>eT ty ey yy) LE<br>0.0 0.0<br>Ppltf f<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Input Voltage: VIN [V] Input Voltage: VIN [V]<br>Figure 10. Input Leakage Current 1 vs Input Voltage Figure 11. Input Leakage Current 2 vs Input Voltage<br> (Standby Mode)<br>1.2 3.5<br>SPEC<br>SPEC<br>CLL! 3.0 GORE<br>1.0<br>2.5<br>OT)<br>0.8<br>Ta = -40 °C<br>Ta = -40 °C<br>Ta = +25 °C 2.0 Ta = +25 °C<br>Ta = +85 °C<br>0.6 Ta = +85 °C<br>| el<br>1.5<br>0.4<br>1.0<br>HHH PPP ry<br>0.2<br>0.5<br>0.0 J 0.0 ee<br>lt ]) CE<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Output Voltage: VOUT [V] Supply Voltage: VCC [V]<br>[µA] [µA]<br>LI1 LI2<br>Input Leakage Current 1: I Input Leakage Current 2: I<br> [µA] [mA]<br>LO<br>CC1<br>Output Leakage Current: I Supply Current (Write): I<br>**----- End of picture text -----**<br>
Figure 12. Output Leakage Current vs Output Voltage
Figure 13. Supply Current (Write) vs Supply Voltage (fSCL = 1 MHz)
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## **Typical Performance Curves - continued**
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2.5 6<br>Ta = -40 °C SPEC<br>5<br>2.0 Ta = +25 °C<br>Ta = +85 °C<br>p S } | ti tt<br>SPEC 4<br>1.5<br>Ta = -40 °C<br>3 Ta = +25 °C<br>Ta = +85 °C<br>1.0<br>2<br>0.5 eT i ttt. po<br>1<br>0.0 TT 0 ee<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br>Figure 14. Supply Current (Read) vs Supply Voltage Figure 15. Standby Current vs Supply Voltage<br> (fSCL = 1 MHz)<br>10.0 300<br>SPEC<br>250<br>200<br>SPEC<br>1.0 — 150 FEE<br>100<br>Ta = -40 °C Ta = -40 °C<br>50<br>Ta = +25 °C Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>0.1 E E 0 Loe<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [mA]<br> [µA]<br>CC2 SB<br>Supply Current (Read): I Standby Current: I<br> [ns]<br>HIGH<br> [MHz]<br>SCL<br>Clock Frequency: f<br>Data Clock High Period: t<br>**----- End of picture text -----**<br>
Figure 16. Clock Frequency vs Supply Voltage
Figure 17. Data Clock High Period vs Supply Voltage
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## **Typical Performance Curves - continued**
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600 140<br>SPEC<br>SPEC<br>500 PF ft ty) 120 Ee<br>100<br>400<br>Corey), FEE<br>80<br>Ta = -40 °C<br>300 Ta = +25 °C<br>Ta = +85 °C<br>60<br>200 Stee<br>40<br>oS Ta = -40 °C<br>100<br>Ta = +25 °C 20<br>Ta = +85 °C<br>Le<br>0 0<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br>Figure 18. Data Clock Low Period vs Supply Voltage Figure 19. SDA (output) Fall Time vs Supply Voltage<br>300 250<br>SPEC SPEC<br>250 Pt} tty 200 EE<br>200 150<br>Ta = -40 °C Ta = -40 °C<br>150 S Ta = +25 °C a r 100 a Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>a ee<br>100 50<br>50 pfsee 0 Pf<br>0 Pt} te Ly ) -50 ELLE ETT<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [ns] [ns]<br>LOW F2<br>Data Clock Low Period: t<br>SDA (OUTPUT) Fall Time: t<br> [ns] [ns]<br>HD:STA SU:STA<br>Start Condition Hold Time: t Start Condition Setup Time: t<br>**----- End of picture text -----**<br>
Figure 20. Start Condition Hold Time vs Supply Voltage
Figure 21. Start Condition Setup Time vs Supply Voltage
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## **Typical Performance Curves - continued**
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50 50<br>SPEC SPEC<br>0 0<br>-50 -50<br>-100 Loteotee -100 LETT<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>-150 -150<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V]CC [V] [V] Supply Voltage: VCC [V]<br>Figure 22. Input Data Hold Time vs Supply Voltage Figure 23. Input Data Hold Time vs Supply Voltage<br> (SDA ‘LOW’ to ‘HIGH’) (SDA ‘HIGH’ to ‘LOW’)<br>60 60<br>SPEC SPEC<br>50 50<br>40 40<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>30 30<br>20 20<br>10 PINETT yy) 10 ELT|<br>0 ee 0 e<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [ns] [ns]<br>HD:DAT HD:DAT<br>Input Data Hold Time: t Input Data Hold Time: t<br> [ns] [ns]<br>SU:DAT SU:DAT<br>Input Data Setup Time: t Input Data Setup Time: t<br>**----- End of picture text -----**<br>
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50<br>SPEC<br>0<br>-50<br>-100 Loteotee<br>Ta = -40 °C<br>Ta = +25 °C<br>Ta = +85 °C<br>-150<br>0 1 2 3 4 5 6<br>Supply Voltage: VCC [V]CC [V] [V]<br> [ns]<br>HD:DAT<br>Input Data Hold Time: t<br>**----- End of picture text -----**<br>
Figure 24. Input Data Setup Time vs Supply Voltage (SDA ‘LOW’ to ‘HIGH’)
Figure 25. Input Data Setup Time vs Supply Voltage
(SDA ‘HIGH’ to ‘LOW’)
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500 500<br>SPEC SPEC<br>400 400<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>300 L o ) 300 LL<br>VP, \<br>200100 CRS)Pep_ 200100 LSS7<br>SPEC SPEC<br>0 0<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br>Figure 26. Output Data Delay Time vs Supply Voltage Figure 27. Output Data Delay Time vs Supply Voltage<br> (SDA ‘LOW’ to ‘HIGH’) (SDA ‘HIGH’ to ‘LOW’)<br>500 500<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>400 C Ta = +85 °C o S|| FS 400 Ta = +85 °C |<br>300 300<br>200 200<br>ete yp Ea<br>100 100<br>SPEC SPEC<br>0 0<br>coe CHEER<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [ns] [ns]<br>PD PD<br>Output Data Delay Time: t Output Data Delay Time: t<br> [ns] [ns]<br>DH DH<br>Output Data Hold Time: t Output Data Hold Time: t<br>**----- End of picture text -----**<br>
Figure 28. Output Data Hold Time vs Supply Voltage (SDA ‘LOW’ to ‘HIGH’)
Figure 29. Output Data Hold Time vs Supply Voltage (SDA ‘HIGH’ to ‘LOW’)
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## **Typical Performance Curves - continued**
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300 600<br>SPEC SPEC<br>250 500<br>200 400<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>150 Ta = +85 °C 300 Ta = +85 °C<br>100 po e LL) 200 s te r<br>50 Ptff Lf 100 fh<br>0 S| wee SSE tT ] 0 OLEsleet<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br>Figure 30. Stop Condition Setup Time vs Supply Voltage Figure 31. Bus Free Time vs Supply Voltage<br>4 200 es<br>SPEC Ta = -40 °C<br>Ta = +25 °C<br>Ta = +85 °C<br>3 Pcpey) LS 150 aN |<br>Gbetea<br>2 100<br>1 50<br>SPEC<br>Ta = -40 °C<br>Ta = +25 °C<br>Ta = +85 °C<br>L oe }<br>0 y f Le 0<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [ns]<br>SU:STO<br> [ns]<br>BUF<br>Bus Free Time: t<br>Stop Condition Setup Time: t<br> [ns]I<br> [ms]<br>WR<br>Write Cycle Time: t<br>Noise Suppression Time: t<br>**----- End of picture text -----**<br>
Figure 30. Stop Condition Setup Time vs Supply Voltage
Figure 32. Write Cycle Time vs Supply Voltage
Figure 33. Noise Suppression Time vs Supply Voltage (SCL ‘HIGH’)
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200 200<br>Ta = -40 °C Ta = -40 °C<br>Ta = +25 °C Ta = +25 °C<br>Ta = +85 °C Ta = +85 °C<br>150 o o 150 Oo :<br>\N<br>100 100<br>50 50<br>SPEC SPEC<br>0 0<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br>Noise Suppression Time: t [ns]I Noise Suppression Time: t [ns]I<br>**----- End of picture text -----**<br>
Figure 34. Noise Suppression Time vs Supply Voltage (SCL ‘LOW’)
Figure 35. Noise Suppression Time vs Supply Voltage
(SDA ‘HIGH’)
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200 1.2<br>Ta = -40 °C<br>Ta = +25 °C SPEC<br>1.0<br>Ta = +85 °C<br>ES<br>150<br>0.8<br>Ta = -40 °C<br>Ta = +25 °C<br>ne =yp EE Ta = +85 °C R BA<br>100 0.6<br>0.4<br>50<br>SPEC<br>0.2<br>0 0.0<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [ns]I<br> [µs]<br>HD:WP<br>WP Hold Time: t<br>Noise Suppression Time: t<br>**----- End of picture text -----**<br>
Figure 36. Noise Suppression Time vs Supply Voltage (SDA ‘LOW’)
Figure 37. WP Hold Time vs Supply Voltage
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## **Typical Performance Curves - continued**
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0.2 1.2<br>SPEC<br>0.1 SPEC<br>1.0<br>0.0<br>0.8<br>-0.1 Seer) EEE Te<br>Ta = -40 °C<br>-0.2 Se 0.6 ee Ta = +25 °C<br>Ta = +85 °C<br>-0.3<br>eee LS<br>0.4<br>-0.4<br>TT Ta = -40 °C T T T 0.2 T P ]<br>Ta = +25 °C<br>-0.5<br>Ta = +85 °C<br>-0.6 L oS ) 0.0 CO<br>0 1 2 3 4 5 6 0 1 2 3 4 5 6<br>Supply Voltage: VCC [V] Supply Voltage: VCC [V]<br> [µs]<br> [µs]<br>SU:WP HIGH:WP<br>WP Setup Time: t WP High Period: t<br>**----- End of picture text -----**<br>
Figure 38. WP Setup Time vs Supply Voltage
Figure 39. WP High Period vs Supply Voltage
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## **I[2] C BUS Communication**
1. I[2] C BUS Data Communication
- (1) I[2] C BUS data communication begins with start condition input, and ends at the stop condition input.
- (2) The data is always 8 bit long, and acknowledge is always required after each byte.
- (3) I[2] C BUS data communication with several devices connected to the BUS is possible by connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).
- (4) Among the devices, there is a “master” that generates clock and controls communication start and end. The rest is “slave” which are controlled by an address peculiar to each device. EEPROM is a “slave”.
- (5) The device that outputs data to the bus during data communication is called the “transmitter”, and the device that receives data is called the “receiver”.
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SDA<br>1 to 7 8 9 1 to 7 8 9 1 to 7 8 9<br>SCL<br>S P<br>START ADDRESS R/W ACK DATA ACK DATA ACK STOP<br>condition condition<br>**----- End of picture text -----**<br>
Figure 40. Data Transfer Timing
2. Start Condition (Start Bit Recognition)
- (1) Before executing each command, start condition (start bit) that SDA goes down from ‘HIGH’ to ‘LOW’ while SCL is ‘HIGH’ is necessary.
- (2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition is satisfied, any command cannot be executed.
3. Stop Condition (Stop Bit Recognition)
Each command can be ended by a stop condition (stop bit) that SDA goes from ‘LOW’ to ‘HIGH’ while SCL is ‘HIGH’.
4. Acknowledge (ACK) Signal
- (1) The acknowledge (ACK) signal is a software rule to indicate whether or not data transfer was performed normally. In both master and slave communication, the device at the transmitter (sending) side releases the bus after outputting 8-bit data. When a slave address of a write command or a read command is input, microcontroller is the device at the transmitter side. When data output for a read command, this IC is the device at the transmitter side.
- (2) The device on the receiver (receiving) side sets SDA ‘LOW’ during the 9[th] clock cycle, and outputs an ACK signal showing that the 8-bit data has been received. When a slave address of a write command or a read command is input, this IC is the device at the receiver side. When data output for a read command, microcontroller is the device at the receiver side.
- (3) This IC outputs ACK signal ‘LOW’ after recognizing start condition and slave address (8 bit).
- (4) Each write operation outputs ACK signal ‘LOW’ every 8-bit data (a word address and write data) reception.
- (5) During read operation, this IC outputs 8-bit data (read data) and detects the ACK signal ‘LOW’. When ACK signal is detected, and no stop condition is sent from the master (microcontroller) side, this IC continues to output data. If the ACK signal is not detected, this IC stops data transfer, recognizes the stop condition (stop bit), and ends the read operation. Then this IC is ready for another transmission.
5. Device Addressing
- (1) From the master, input the slave address after the start condition.
- (2) The significant 4 bits of slave address are used for recognizing a device type. The device code of this IC is fixed to ‘1010’.
- (3) The next slave addresses (A2 A1 --- device address) are for selecting devices, and multiple devices can be used on a same bus according to the number of device addresses. It is possible to select and operate only EEPROM that has matched ‘VCC’ ‘GND’ input conditions of the A1, A2 pin and the ‘HIGH’ ‘LOW’ input conditions of slave address sent from the master.
- P0 is the page select bit.
- (4) The least significant bit ( R / W --- READ/ WRITE ) of slave address is used for designating write or read operation, and is as shown below.
Setting R / W to 0 ------- write (setting 0 to word address setting of random read) Setting R / W to 1 ------- read
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Maximum number of<br>Slave address<br>Connected buses<br>1 0 1 0 A2 A1 P0 R / W 4<br>**----- End of picture text -----**<br>
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## **Write Command**
## 1. Write
- (1) Write commands can be used to write data to EEPROM. Write can be Byte Write or Page Write. When only 1 byte is to be written, use Byte Write. When 2 or more bytes of continuous data are written, up to 256 bytes can be written simultaneously by Page Write.
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START SLAVE WRITE 1st WORD 2nd WORD DATA(n) STOP<br>ADDRESS ADDRESS(n) ADDRESS(n)<br>SDA<br>LINE 1 0 1 0 A2 A1 P0 WA WA WA WA D7 D0<br>15 8 7 0<br>R/W ACK ACK ACK ACK<br>Figure 41. Byte Write<br>START ADSLAVE DRESS WRITE ADDRESS(n) 1st WORD ADDRESS(n) 2nd WORD DATA(n) DATA(n+255) STOP<br>SDA<br>LINE 1 0 1 0 A2 A1 P0 WA WA WA WA D7 D0 D0<br>15 8 7 0<br>R/W ACK ACK ACK ACK ACK<br>Figure 42. Page Write<br>**----- End of picture text -----**<br>
- (2) During write execution, all input commands are ignored, therefore ACK is not returned.
- (3) Data is written to the address (n-th address) specified by the page select bit and word address.
- (4) By issuing stop bit after 8 bit data input, write to memory cell starts.
- (5) When write is started, command is not accepted for tWR (3.5 ms at maximum).
- (6) For Page Write, after the address (n-th address) is specified with the page select bit and word address, then 2 bytes or more data are input in succession, the lower 8 bits of the word address are incremented inside EEPROM, and up to 256 bytes of data can be written from the specified address (n-th address).
- (7) When the data exceeding the maximum number of bytes is sent in Page Write, the data of the first byte is overwritten in order.
- (Refer to " Internal Address Increment").
- (8) When VCC is turned off during write execution, data at the designated address is not guaranteed, please write it again.
- 1 page = 256 bytes, but the write time of page write is 3.5 ms at maximum for 256 byte batch write. It is not equal to 3.5 ms at maximum x 256 byte = 896 ms (Max) .
2. Internal Address Increment During Page Write
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WA8 WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0<br>0 0 0 0 0 0 0 0 0<br>0 0 0 0 0 0 0 0 1 Increment<br>0 0 0 0 0 0 0 1 0<br>For example, when starting from address FEh, then,<br>FEh→FFh→00h→01h···.<br>0 1 1 1 1 1 1 1 0 Please take note that it is incremented.<br>FEh<br>0 1 1 1 1 1 1 1 1<br>0 0 0 0 0 0 0 0 0 *FEh···FE in hexadecimal, therefore, 11111110 is a<br>binary number.<br>Significant bit is fixed.<br>No digit up<br>**----- End of picture text -----**<br>
3. Write Protect (WP) Function
When WP pin is set at VCC (‘HIGH’ level), data rewrite of all addresses is prohibited. When it is set GND (‘LOW’ level), data rewrite of all address is enabled. Be sure to connect this pin to VCC or GND, or control it to ‘HIGH’ level or ‘LOW’ level. If WP pin is open, this input is recognized as ‘LOW’.
In case of using it as ROM, by connecting it to pull up or VCC, write error can be prevented.
At extremely low voltage at power ON/OFF, by setting the WP pin ‘HIGH’, write error can be prevented.
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## **Write Command - continued**
4. ECC Function
This IC has ECC bits for Error Correction every 4 bytes with the same address bits of P0 to WA2. In read operation, if error data of 1 bit exists in 4 bytes, this error data is corrected by the ECC function and outputs the correct data. In write operation, only data of 1 byte is written, 4 bytes of data is written as one group with the same address bits of P0 to WA2 (the data to be written in the remaining 3 bytes is the same as its previous stored data). Therefore, the number of write cycle times is guaranteed every 4 bytes with the same address bits of P0 to WA2.
Initial Delivery State
|Initial Delivery State||||||||
|---|---|---|---|---|---|---|---|
|Address|00000h|00001h|00002h|00003h|00004h|00005h|···|
|Number of Remaining<br>Write Cycles|4 Million<br>Times|4 Million<br>Times|4 Million<br>Times|4 Million<br>Times|4 Million<br>Times|4 Million<br>Times|···|
|After 1 Million Times using Byte Write in Address 00000h||||||||
|Address|00000h|00001h|00002h|00003h|00004h|00005h|···|
|Number of Remaining<br>Write Cycles|3 Million<br>Times|3 Million<br>Times|3 Million<br>Times|3 Million<br>Times|4 Million<br>Times|4 Million<br>Times|···|
Even if only 1 byte of data is to be written in address 00000h, the addresses 00000h to 00003h are written as one group. Therefore, the number of write cycle times at addresses 00001h to 00003h decreases.
Figure 43. Example of Data Write and Number of Remaining Write Cycles
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## **Read Command**
Read commands can be used to read the EEPROM data. Read has a random read and a current read functions. Random read is commonly used in commands that specify addresses and read data. The current read is a command to read data of the internal address register without specifying an address. In both read functions, sequential read is possible that the next address data can be read in succession.
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SLAVE 1st WORD 2nd WORD SLAVE<br>START ADDRESS WRITE ADDRESS(n) ADDRESS(n) START ADDRESS READ DATA(n) STOP<br>SDA WA WA WA WA<br>LINE 1 0 1 0 A2 A1 P0 15 8 7 0 1 0 1 0 A2 A1 * D7 D0<br>R/W ACK ACK ACK R/W ACK ACK<br>Figure 44. Random Read * Don’t Care bit<br>**----- End of picture text -----**<br>
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SLAVE<br>START ADDRESS READ DATA(n) STOP<br>SDA<br>LINE 1 0 1 0 A2 A1 * D7 D0<br>R/W ACK ACK<br>Figure 45. Current Read * Don’t Care bit<br>**----- End of picture text -----**<br>
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SLAVE<br>START ADDRESS READ DATA(n) DATA(n+x) STOP<br>SDA 1 0 1 0 A2A1 * D7 D0 D7 D0<br>LINE<br>R/W ACK ACK ACK ACK<br>* Don’t Care bit<br>**----- End of picture text -----**<br>
Figure 46. Sequential Read (in the Case of Current Read)
- (1) In random read, data of designated word address can be read.
- (2) When the command just before current read is random read or current read (each including sequential read), If last read address is (n)-th, data of the incremented address (n + 1)-th is outputted.
- (3) When ACK signal ‘LOW’ is detected after D0, and stop condition is not sent from master (microcontroller) side, the next address data can be read in succession.
- (4) Read is ended by stop condition that ‘HIGH’ is input to ACK signal after D0 and SDA signal goes from ‘LOW’ to ‘HIGH’ while at SCL signal is ‘HIGH’.
- (5) When ‘LOW’ is input at ACK signal after D0 without ‘HIGH’ input, sequential read gets in, and the next data is outputted. Therefore, read command cannot be ended. To end read command, be sure to input ‘HIGH’ to ACK signal after D0, and the stop condition that SDA goes from ‘LOW’ to ‘HIGH’ while SCL signal is ‘HIGH’.
- (6) Sequential read is ended by stop condition that ‘HIGH’ is input to ACK signal after arbitrary D0 and SDA goes from ‘LOW’ to ‘HIGH’ while SCL signal is ‘HIGH’.
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## **Method of Reset**
This IC is equipped with Power-on Reset circuit, which is described later, and is reset at power-up. Also, by continuously input start condition and stop condition, reset can be done without restarting the power supply. Execute the reset by start condition and stop condition when it is necessary to reset after power-up, or during command input timing. However, the start condition and stop condition could not be applied because ‘HIGH’ input of microcontroller and ‘LOW’ output of EEPROM collide when EEPROM is ‘LOW’ in ACK output section and data reading. In that case, input SCL clock until SDA bus is released (‘HIGH’ by pull-up). After confirming that SDA bus is released, continuously input start condition and stop condition. If SDA bus could not be confirmed whether released or not in microcontroller, input the software reset. If software reset is run, EEPROM can be reset without confirming the SDA state because SDA bus is always released in either of the two start conditions. The method of reset is shown in the table below.
|Status of SDA|Method of Reset|Method of Reset|Method of Reset|Method of Reset|
|---|---|---|---|---|
|SDA bus released<br>(‘HIGH’ by pull-up)|Continuously input start condition and stop condition.||||
|‘LOW’|Input SCL clock until SDA bus is released. After confirm that SDA bus is released,<br>continuously input start condition and stop condition.||||
|Microcontroller cannot<br>confirm SDA bus is<br>released or not|Using the software reset shown in the figure below, the start condition can be always inputed.<br>Within the dummy clock input area, the SDA bus is needed to be released. For normal<br>commands,start with the start condition input.||||
|SCL<br>2<br>1<br>8<br>9<br>Dummy clock × 9<br>SDA<br>Start<br>Start||Stop||Normal command<br>Normal command|
||||||
||||||
Figure 47. Input Timing of Software Reset
## **Acknowledge Polling**
During write execution, all input commands are ignored, therefore ACK is not returned. During write execution after write input, next command (slave address) is sent. If the first ACK signal sends back ‘LOW’, then it means end of write operation, else ‘HIGH’ is returned, which means writing is still in progress. By the use of acknowledge polling, next command can be executed without waiting for tWR = 3.5 ms.
To write continuously, slave address with R / W = 0, then to carry out current read after write, slave address with R / W = 1 is sent. If ACK signal sends back ‘LOW’, then execute word address input and data output and so forth.
**==> picture [299 x 251] intentionally omitted <==**
**----- Start of picture text -----**<br>
During write execution,<br>ACK = HIGH is returned.<br>First write command<br>START STOP START START<br>Slave Slave<br>Write Command ···<br>Address Address<br>ACK ACK<br>tWR = HIGH = HIGH<br>Second write command<br>START START STOP<br>Slave Slave Word<br>··· Data<br>Address Address Address<br>ACK ACK ACK ACK<br>tWR = HIGH = LOW = LOW = LOW<br>After completion of write execution, ACK = LOW is returned,<br>so input next word address and data in succession.<br>**----- End of picture text -----**<br>
Figure 48. The Case of Continuous Write by Acknowledge Polling
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## **WP Valid Timing (Write Cancel)**
WP is usually fixed to ‘HIGH’ or ‘LOW’, but when WP is controlled and used for write cancel and so on, pay attention to the following WP valid timing. Write can be cancelled by setting WP = ‘HIGH’ while it is executed and in WP valid area. In both byte write and page write, the area from the first start condition of command to the rise of clock which take in D0 of data (in page write, the first byte data) is the WP invalid area. WP input in this area is ‘Don’t care’. The area from the rise of clock to take in D0 to the stop condition input is the WP valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status.
**==> picture [353 x 207] intentionally omitted <==**
**----- Start of picture text -----**<br>
[·][Rise of D0 taken clock] ·Rise of SDA<br>SCL SCL<br>SDA D1 D0 ACK SDA D0 ACK<br>Enlarged view Enlarged view<br>START STOP<br>Slave Word tWR<br>SDA D7 D6 D5 D4 D3 D2 D1 D0 Data<br>Address Address<br>ACK ACK ACK ACK<br>= LOW = LOW = LOW = LOW<br>WP Invalid Area WP Valid Area WP Invalid Area<br>WP If WP = ‘HIGH’ in this area,<br>data is not written<br>**----- End of picture text -----**<br>
Figure 49. WP Valid Timing
## **Command Cancel by Start Condition and Stop Condition**
During command input, by continuously inputting start condition and stop condition, command can be cancelled. However, within ACK output area and during data read, SDA bus may output ‘LOW’. In this case, start condition and stop condition cannot be inputted, so reset is not available. Therefore, execution of reset is needed referring “Method of Reset”. When command is cancelled by start-stop condition during random read, sequential read, or current read, internal address setting is not determined. Therefore, it is not possible to carry out current read in succession. To carry out read in succession, carry out random read.
**==> picture [328 x 115] intentionally omitted <==**
**----- Start of picture text -----**<br>
SCL<br>SDA 1 0 1 0<br>Start Stop<br>Condition Condition<br>**----- End of picture text -----**<br>
Figure 50. The Case of Cancel by Start, Stop Condition during Slave Address Input
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## **Application Examples**
1. I/O Peripheral Circuit
- (1) Pull-up Resistance of the SDA Pin
- SDA is NMOS open drain, so it requires a pull-up resistor. As for this resistor value (RPU), select an appropriate value from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The smaller the RPU increases the supply current.
## (2) Maximum Value of RPU
The maximum value of RPU is determined by the following factors.
- (a) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower. Furthermore, AC timing should be satisfied even when SDA rise time is slow.
- (b) The bus electric potential A to be determined by input current leak total (IL) of the device connected to bus at output of ‘HIGH’ to SDA line and RPU should sufficiently secure the input ‘HIGH’ level (VIH) of microcontroller and EEPROM including recommended noise margin of 0.2VCC.
**==> picture [414 x 126] intentionally omitted <==**
**----- Start of picture text -----**<br>
𝑉𝐶𝐶 −𝐼𝐿𝑅𝑃𝑈 −0.2𝑉𝐶𝐶 ≥𝑉𝐼𝐻 Microcontroller VCC EEPROM<br>IL RPU<br>∴𝑅𝑃𝑈 ≤ [0.8𝑉][𝐶𝐶] [−𝑉][𝐼𝐻] A SDA Pin<br>𝐼𝐿<br>CC = 3 V, IL = 10 μA, VIH = 0.7VCC= 3 V, IL = 10 μA, VIH = 0.7VCCL = 10 μA, VIH = 0.7VCC= 10 μA, VIH = 0.7VCCIH = 0.7VCC= 0.7VCCCC IL1 IL2<br>CBUS<br>∴𝑅𝑃𝑈 ≤ [0.8 × 3 −0.7 × 3] 10 × 10 [−6]<br>Figure 51. I/O Circuit Diagram<br>**----- End of picture text -----**<br>
E.g.) VCC = 3 V, IL = 10 μA, VIH = 0.7VCC= 3 V, IL = 10 μA, VIH = 0.7VCCL = 10 μA, VIH = 0.7VCC= 10 μA, VIH = 0.7VCCIH = 0.7VCC= 0.7VCCCC from (b)
## ≤30 [kΩ]
- (3) Minimum Value of RPU
The minimum value of RPU is determined by the following factors.
- (a) When IC outputs ‘LOW’, the bus electric potential A should be equal to or less than output ‘LOW’ level (VOL) of EEPROM.
**==> picture [94 x 68] intentionally omitted <==**
## E.g.) VCC = 3 V, VOL = 0.4 V, IOL = 3.2 mA, microcontroller, EEPROM VIL = 0.3VCC
**==> picture [104 x 50] intentionally omitted <==**
## (4) Pull-up Resistance of the SCL Pin
When SCL control is made at the CMOS output port, there is no need for a pull-up resistor. But when there is a time that SCL becomes ‘Hi-Z’, add a pull-up resistor. As for the pull-up resistor value, decide with the balance with drive performance of output port of microcontroller.
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**2.** Cautions on Microcontroller Connection
- (1) RS
In I[2] C BUS, it is recommended that SDA port is open drain input/output. However, when using CMOS input/output of tri state to SDA port, insert a series resistance RS between the pull-up resistor RPU and the SDA pin of EEPROM. This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON simultaneously. RS also plays the role of protecting the SDA pin against surge. Therefore, even when SDA port is open drain input/output, RS can be used.
**==> picture [445 x 121] intentionally omitted <==**
**----- Start of picture text -----**<br>
VCC ACK<br>SCL<br>RPU<br>RS SDA<br>‘HIGH’ output of microcontroller<br>‘LOW’ output of EEPROM<br>Microcontroller EEPROM Over current flows to SDA line by<br>‘HIGH’ output of microcontroller and ‘LOW’ output of EEPROM.<br>**----- End of picture text -----**<br>
Figure 52. I/O Circuit Diagram
Figure 53. I/O Collision Timing
- (2) Maximum Value of RS
The maximum value of RS is determined by the following relations.
- (a) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower. Furthermore, AC timing should be satisfied even when SDA rise time is slow.
- (b) The bus electric potential A to be determined by RPU and RS when EEPROM outputs ‘LOW’ to SDA bus should sufficiently secure the input ‘LOW’ level (VIL) of microcontroller including recommended noise margin of 0.1VCC.
**==> picture [437 x 160] intentionally omitted <==**
**----- Start of picture text -----**<br>
VCC (𝑉𝐶𝐶 −𝑉𝑂𝐿) × 𝑅𝑆 + 𝑉𝑂𝐿 + 0.1𝑉𝐶𝐶 ≤𝑉𝐼𝐿<br>A 𝑅𝑃𝑈 + 𝑅𝑆<br>RPU<br>RS VOL ∴𝑅𝑆 ≤ [𝑉][𝐼𝐿] 1.1𝑉 [−𝑉][𝑂𝐿] 𝐶𝐶 [−0.1𝑉] −𝑉𝐼𝐿 [𝐶𝐶] × 𝑅𝑃𝑈<br>IOL<br>CBUS<br>E.g.) VCC = 3 V, VIL = 0.3VCC, VOL = 0.4 V, RPU = 20 kΩ<br>i<br>VIL Microcontroller EEPROM 𝑅𝑆 ≤ [0.3 × 3 −0.4 −0.1 × 3] × 20 × 10 [3]<br>1.1 × 3 −0.3 × 3<br>Figure 54. I/O Circuit Diagram<br>≤1.67 [kΩ]<br>**----- End of picture text -----**<br>
## (3) Minimum Value of RS
The minimum value of RS is determined by over current at bus collision. When over current flows, noises in power source line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source line in set and so forth.
**==> picture [289 x 134] intentionally omitted <==**
**----- Start of picture text -----**<br>
VCC 𝑉𝐶𝐶 ≤𝐼<br>R PU 'LOW' 𝑅𝑆<br>output<br>R S ∴𝑅𝑆 ≥ [𝑉][𝐶𝐶]<br>𝐼<br>Over current I<br>'HIGH' E.g.) VCC = 3 V, I = 10 mA<br>output 3<br>𝑅𝑆 ≥<br>10 × 10 [−3]<br>Microcontroller EEPROM<br>≥300 [Ω]<br>**----- End of picture text -----**<br>
Figure 55. I/O Circuit Diagram
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## **Caution on Power-Up Conditions**
At power-up, as the VCC rises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal circuit not completely reset, hence, malfunction like miswriting and misreading may occur. To prevent it, this IC is equipped with Power-on Reset circuit. In order to ensure its operation, at power-up, please observe the conditions below. In addition, set the power supply rise so that the supply voltage constantly increases from VBOT to VCC level. Furthermore, tINIT is the time from the power becomes stable to the start of the first command input.
**==> picture [209 x 104] intentionally omitted <==**
**----- Start of picture text -----**<br>
tPOFF tR:VCC tINIT Command<br>start<br>VCC<br>VCC (Min)<br>VBOT<br>/)<br>0 V<br>Figure 56. Rise Waveform Diagram<br>**----- End of picture text -----**<br>
## Power-Up Conditions
|Power-Up Conditionsp ConditionsConditions||||||
|---|---|---|---|---|---|
|Parameter|Symbol|Min|Typ|Max|Unit|
|Supply Voltage at Power OFF|VBOT|-|-|0.3|V|
|Power OFF Time_(Note 16)_|tPOFF|1|-|-|ms|
|Initialize Time_(Note 16)_|tINIT|0.1|-|-|ms|
|Supply Voltage Rising Time_(Note 16)_|tR:VCC|0.001|-|100|ms|
If the above conditions are not followed, the POR circuit does not operate properly, the logic circuit of internal IC is undefined. At this time, there is a possibility that IC may not be able to input commands because EEPROM may output ‘LOW’ and it collide with ‘HIGH’ input of microcontroller. However, SDA bus can be released by resetting the IC. Refer to the page “Method of Reset” for reset details.
## **Low Voltage Malfunction Prevention Function**
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ = 1.2 V) or below, data rewrite is prevented.
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## **I/O Equivalence Circuits**
**1. Input (A0)**
**==> picture [54 x 21] intentionally omitted <==**
**----- Start of picture text -----**<br>
Don’t use<br>**----- End of picture text -----**<br>
Figure 57. Input Pin Circuit Diagram (A0)
**2. Input (A1, A2, WP)**
Pull-down elements
Figure 58. Input Pin Circuit Diagram (A1, A2, WP)
**3. Input (SCL)**
Figure 59. Input Pin Circuit Diagram (SCL)
**4. Input/Output (SDA)**
Figure 60. Input/Output Pin Circuit Diagram (SDA)
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## **Operational Notes**
**1. Reverse Connection of Power Supply**
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins.
**2. Power Supply Lines**
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors.
## **3. Ground Voltage**
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
## **4. Ground Wiring Pattern**
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
**5. Operating Conditions**
The function and operation of the IC are guaranteed within the range specified by the operating conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
**6. Inrush Current**
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections.
**7. Testing on Application Boards**
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
**8. Inter-pin Short and Mounting Errors**
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few.
**9. Unused Input Pins**
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line.
## **10. Regarding the Input Pin of the IC**
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC.
**11. Ceramic Capacitor**
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others.
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## **Ordering Information**
**==> picture [414 x 202] intentionally omitted <==**
**----- Start of picture text -----**<br>
B R 2 4 G 1 M x x x - 5 A x x<br>BUS Type<br>24 : I [2] C<br>Ambient Operating Temperature<br>/ Supply Voltage<br>-40 °C to +85 °C<br>/ 1.7 V to 5.5 V<br>Capacity<br>1M = 1 Mbit<br>Package<br>F : SOP8 [*1]<br>FJ : SOP-J8<br>FVT : TSSOP-B8<br>**----- End of picture text -----**<br>
5 **:** Process Code A **:** Revision
**Packaging and Forming Specification** E2 **:** Embossed tape and reel (SOP8[*1] , SOP-J8, TSSOP-B8)
*1 Last Time Buy.
## **Lineup**
|Package|Package|Orderable Part Number|
|---|---|---|
|Type|Quantity||
|SOP8*1|Reel of 2500|BR24G1MF<br>-5AE2|
|SOP-J8|Reel of 2500|BR24G1MFJ<br>-5AE2|
|TSSOP-B8|Reel of 3000|BR24G1MFVT<br>-5AE2|
- *1 Last Time Buy.
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## **Marking Diagrams**
**==> picture [461 x 274] intentionally omitted <==**
**----- Start of picture text -----**<br>
SOP8 (TOP VIEW) TSSOP-B8 (TOP VIEW)<br>Part Number Marking<br>Part Number Marking<br>4 G 1 M A<br>5<br>LOT Number<br>O oeQy 7<br>LOT Number<br>ee<br>Pin 1 Mark Pin 1 Mark<br>SOP-J8 (TOP VIEW)<br>Part Number Marking<br>4 G 1 M A<br>5<br>LOT Number<br>Pin 1 Mark<br>A 5<br>M<br>1<br>G<br>4<br>**----- End of picture text -----**<br>
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## **Physical Dimension and Packing Information**
## Package Name
## SOP8
**==> picture [294 x 379] intentionally omitted <==**
**----- Start of picture text -----**<br>
(Max 5.35 (include.BURR))<br>yats:<br>ie ‘sl<br>|<br>EL} LG =<br>Tl Ti tt nA<br>1)<br>q<br>lp<br>® Zils<br>7 a> ee. ”<br>LAL NG ig —<br>2 4<br>XK 0.<br>_ Ld |<br>(UNIT: mm)<br>TT [TY] PKG: SOP8<br>Drawing No.: EX112-5001-1<br>**----- End of picture text -----**<br>
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## **Physical Dimension and Packing Information - continued** Package Name
**==> picture [47 x 10] intentionally omitted <==**
**----- Start of picture text -----**<br>
SOP-J8<br>**----- End of picture text -----**<br>
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**Physical Dimension and Packing Information - continued**
## Package Name
## TSSOP-B8
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## **Revision History**
|**sion History**|||
|---|---|---|
|Date|Revision|Changes|
|24.Sep.2020|001|New Release|
|07.May.2021|002|P.5 Add Note.14.<br>Change Supply Current (Read) spec from 2.0 mA to 1.5 mA.<br>P.11 Figure.14 Change spec from 2.0 mA to 1.5 mA.|
|26.Aug.2025|003|Change SOP8 to Not Recommended for New Designs.<br>Change SDA, SCL (input) Rise Time.<br>Change SDA, SCL (input) Fall Time.|
|01.Apr.2026|004|Change SOP8 to Last Time Buy.|
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## **Notice**
## **Precaution on using ROHM Products**
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment[(Note 1)] , transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications.
|(Note1) Medical Equipment Classification of the Specific Applications|(Note1) Medical Equipment Classification of the Specific Applications|(Note1) Medical Equipment Classification of the Specific Applications|(Note1) Medical Equipment Classification of the Specific Applications|
|---|---|---|---|
|JAPAN|USA|EU|CHINA|
|CLASS`Ⅲ`|CLASS`Ⅲ`|CLASS`Ⅱ`b|CLASS`Ⅲ`|
|CLASS`Ⅳ`||CLASS`Ⅲ`||
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures:
- [a] Installation of protection circuits or other protective devices to improve system safety
- [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
- [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
- [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
- [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
- [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
- [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
- [f] Sealing or coating our Products with resin or other coating materials
- [g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used. However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering
- [h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document.
## **Precaution for Mounting / Circuit board design**
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
> **[Notice-PGA-E ]** © 2015 ROHM Co., Ltd. All rights reserved.
**Rev.005**
## **Precautions Regarding Application Examples and External Circuits**
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics.
2. You agree that application examples, their constants, software, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information.
## **Precaution for Electrostatic**
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
## **Precaution for Storage / Transportation**
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM
- [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period.
## **Precaution for Product Label**
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
## **Precaution for Disposition**
When disposing Products please dispose them properly using an authorized industry waste company.
## **Precaution for Foreign Exchange and Foreign Trade act**
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export.
## **Precaution Regarding Intellectual Property Rights**
1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein.
## **Other Precaution**
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties.
> **[Notice-PGA-E ]** © 2015 ROHM Co., Ltd. All rights reserved.
**Rev.005**
## **General Precaution**
1. All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales representative.
2. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or concerning such information.
**Rev.001**
> **[Notice-WE ]** © 2015 ROHM Co., Ltd. All rights reserved.
Datasheet
## **General Precaution**
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or concerning such information.
> **[Notice – WE ]** © 2015 ROHM Co., Ltd. All rights reserved.
**Rev.001**
Updated at March 21, 2026
TDK Corporation is a globally recognized leader in electronic components and magnetic materials. Founded in 1935 to commercialize ferrites, the Tokyo-based company has evolved into a comprehensive manufacturer of high-performance passive components, sensors, and power electronics. TDK’s advanced materials technology serves as the foundation for its extensive portfolio, driving innovation across automotive, industrial, consumer electronics, and communication technologies. Our selection of TDK components heavily features their industry-leading passive components, with a primary focus on magnetics. TDK excels in manufacturing reliable inductive solutions, offering a vast array of power inductors and RF inductors optimized for demanding power management and high-frequency applications. Furthermore, their expertise in electromagnetic compatibility is showcased through a comprehensive range of EMC and RFI suppression products. This includes common mode chokes, power line filters, and specialized shielding materials designed to ensure superior signal integrity in complex designs. Beyond inductors and filtering components, TDK provides robust circuit protection and sensing solutions essential for modern engineering. The portfolio includes precision temperature sensing and compensation NTC thermistors, alongside TVS varistors and inrush current limiting components that safeguard sensitive electronics. Complemented by fixed value inductors, supercapacitors, and charging coils, TDK's versatile product offering delivers the reliability and performance required for sophisticated circuit design.
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