SMS12CT1G

**DATA SHEET www.onsemi.com** 

## ESD Protection Diode Array, 5-Line 

## SMS05C, SMS12C, SMS15C, SMS24C 

This 5−line surge protection array is designed for application requiring transient voltage protection capability. It is intended for use in over−transient voltage and ESD sensitive equipment such as computers, printers, automotive electronics, networking communication and other applications. This device features a monolithic common anode design which protects five independent lines in a single TSOP−6 package. 

## **Features** 

- Protects up to 5 Lines in a Single TSOP−6 Package 

## **TSOP−6 FIVE SURGE PROTECTION 350 W PEAK POWER** 

## **PIN ASSIGNMENT** 

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1 6<br>2 5<br>6<br>1 3 4<br>TSOP−6<br>CASE 318G PIN 1. CATHODE<br>SCALE 2:1 2. ANODE<br>3. CATHODE<br>4. CATHODE<br>5. CATHODE<br>6. CATHODE<br>**----- End of picture text -----**<br>


- Peak Power Dissipation − 350 W  (8 � 20 �s Waveform) 

- ESD Rating of Class 3B (Exceeding 8.0 kV) per Human Body Model and Class C (Exceeding 400 V) per Machine Model 

- Compliance with IEC 61000−4−2 (ESD) 15 kV (Air), 8.0 kV (Contact) 

- Flammability Rating of UL 94 V−0 

- SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These are Pb−Free Devices 

## **Applications** 

- Hand−Held Portable Applications 

## **MARKING DIAGRAM** 

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6x M �<br>�<br>x = SMS05C:J<br>= SMS12C:K<br>= SMS15C:L<br>= SMS24C:M<br>M = Date Code<br>� = Pb−Free Package<br>(Note: Microdot may be in either location)<br>**----- End of picture text -----**<br>


- Networking and Telecom 

- Automotive Electronics 

- Serial and Parallel Ports 

- Notebooks, Desktops, Servers 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise specified) 

|**MAXIMU**|**M RATINGS**(TJ= 25°C unless otherwise s|pecified)||
|---|---|---|---|
|**Symbol**|**Rating**|**Value**|**Unit**|
|PPK1|Peak Power Dissipation<br>8�20�s Double Exponential Waveform<br>(Note 1)|350|W|
|TJ|Operating Junction Temperature Range|−40 to 150|°C|
|TSTG|Storage Temperature Range|−55 to 150|°C|
|TL|Lead Solder Temperature (10 s)|260|°C|
|ESD|Human Body Model ( HBM)<br>Machine Model (MM)<br>IEC 61000−4−2 Air (ESD)<br>IEC 61000−4−2 Contact (ESD)|>8000<br>>400<br>>15000<br>>8000|V|



## **ORDERING INFORMATION** 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|SMS05CT1G|TSOP−6<br>(Pb−Free)<br>G|3000 / Tape & Reel|
|SMS12CT1G|||
|SMS15CT1G|||
|SMS24CT1G<br>SZSMS24CT1|||



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Non−repetitive current pulse per Figure 3. 

Publication Order Number: **SMS05C/D** 

**1** 

© Semiconductor Components Industries, LLC, 2011 **November, 2021 − Rev. 9** 

**SMS05C, SMS12C, SMS15C, SMS24C** 

**SMS05C ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**Parameter**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Reverse Working Voltage|VRWM|(Note 2)|||5.0|V|
|Breakdown Voltage|VBR|IT= 1.0 mA (Note 3)|6.2||7.2|V|
|Reverse Leakage Current|IR|VRWM= 5.0 V|||5.0|�A|
|Clamping Voltage|VC|IPP= 5.0 A (8�20�s Waveform)|||9.8|V|
|Clamping Voltage|VC|IPP= 24 A (8�20�s Waveform)|||14.5|V|
|Maximum Peak Pulse Current|IPP|8�20�s Waveform|||24|A|
|Capacitance|CJ|VR= 0 V, f = 1.0 MHz (Line to GND)||260|400|pF|



**SMS12C ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**Parameter**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Reverse Working Voltage|VRWM|(Note 2)|||12|V|
|Breakdown Voltage|VBR|IT= 1.0 mA (Note 3)|13.3||15|V|
|Reverse Leakage Current|IR|VRWM= 12 V||0.001|1.0|�A|
|Clamping Voltage|VC|IPP= 5.0 A (8�20�s Waveform)|||19|V|
|Clamping Voltage|VC|IPP= 15 A (8�20�s Waveform)|||23|V|
|Maximum Peak Pulse Current|IPP|8�20�s Waveform|||15|A|
|Capacitance|CJ|VR= 0 V, f = 1.0 MHz (Line to GND)||120|150|pF|



**SMS15C ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C, unless otherwise specified) (See Note 4) 

|**Parameter**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Reverse Working Voltage|VRWM|(Note 2)|||15|V|
|Breakdown Voltage|VBR|IT= 1.0 mA (Note 3)|17||19|V|
|Reverse Leakage Current|IR|VRWM= 15 V||0.05|1.0|�A|
|Clamping Voltage|VC|IPP= 5.0 A (8�20�s Waveform)|||24|V|
|Clamping Voltage|VC|IPP= 12 A (8�20�s Waveform)|||29|V|
|Maximum Peak Pulse Current|IPP|8�20�s Waveform|||12|A|
|Capacitance|CJ|VR= 0 V, f = 1.0 MHz (Line to GND)||95|125|pF|



**SZ/SMS24C ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C, unless otherwise specified) 

|**SZ/SMS24C ELECTRICAL CHARA**|**CTERISTIC**|**S**(TJ= 25°C, unless otherwise specifie|d)||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|Reverse Working Voltage|VRWM|(Note 2)|||24|V|
|Breakdown Voltage|VBR|IT= 1.0 mA (Note 3)|26.7||32|V|
|Reverse Leakage Current|IR|VRWM= 24 V||0.001|1.0|�A|
|Clamping Voltage|VC|IPP= 5.0 A (8�20�s Waveform)|||40|V|
|Clamping Voltage|VC|IPP= 8 A (8�20�s Waveform)|||44|V|
|Maximum Peak Pulse Current|IPP|8�20�s Waveform|||8.0|A|
|Capacitance|CJ|VR= 0 V, f = 1.0 MHz (Line to GND)||60|75|pF|



2. Surge protection devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 

3. VBR is measured at pulse test current IT. 

4. Parametrics are the same for the Pb−Free packages, which are suffixed with a “G’’. 

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**2** 

**SMS05C, SMS12C, SMS15C, SMS24C** 

**TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise specified) 

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100 100<br>tr PEAK VALUE IRSM @ 8 s<br>90 NN ee ee 90 PON |<br>80 Ne eee 80 iwi PULSE WIDTH (tP) IS DEFINED<br>AS THAT POINT WHERE THE<br>70 Pot Kf 70 iwi PEAK CURRENT DECAY = 8 s<br>60 Pot TN 60 Py TE \E<br>HALF VALUE IRSM/2 @ 20 s<br>50 Ne 50 Ppt Ne<br>40 Pot | cE 40 PPE XN ie ff<br>30 30<br>tP<br>20 Pot tT | EN 20 fm NL<br>10 ee ee ee 10 yo] | ludP RY<br>P| TE EN 0 Po| |TYR<br>00 25 50 75 100 125 150 175 200 0 20 40 60 80<br>TA, AMBIENT TEMPERATURE (°C) t, TIME ( m s)<br>Figure 1. Pulse Derating Curve Figure 2. 8  ×  20 s Pulse Waveform uw<br>50 300<br>SZ/SMS24C 8 x 20 s f = 1.0 MHz<br>45<br>PULSE WAVEFORM<br>40 oe r 250<br>7<br>|<br>35<br>SMS15C 200<br>30<br>SMS05C<br>SMS12C<br>25 FX ee ee eee 150<br>20<br>15 a SMS05C 100<br>10 = — } SMS12C<br>50 ee<br>5 SMS15C SZ/SMS24C<br>0 a ee ee 0 eeee<br>0 5 10 15 20 25 0 5 10 15 20 25<br>IPP, PEAK PULSE CURRENT (A) VBR, REVERSE VOLTAGE (V)<br>C<br>°<br>OR CURRENT @ TA = 25<br>% OF PEAK PULSE CURRENT<br>PEAK PULSE DERATING IN % OF PEAK POWER<br>, CLAMPING VOLTAGE (V)<br>C<br>V<br>JUNCTION CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 3. Clamping Voltage vs. Peak Pulse Current** 

**Figure 4. Junction Capacitance vs. Reverse Voltage** 

**Figure 5. ESD Pulse IEC 61000−4−2 (8.0 kV Contact)** 

**Figure 6. SMS15CT1 ESD Response for IEC 61000−4−2 (+8.0 kV Contact)** 

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**3** 

**SMS05C, SMS12C, SMS15C, SMS24C** 

## **TYPICAL COMMON ANODE APPLICATIONS** 

A 5 surge protection junction common anode design in a TSOP−6 package protects four separate lines using only one package. This adds flexibility and creativity to PCB design 

especially when board space is at a premium. A simplified example of SMS05C Series Device applications is illustrated below. 

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A<br>KEYBOARD B<br>TERMINAL FUNCTIONAL<br>I/O C<br>PRINTER DECODER<br>D<br>ETC.<br>E<br>GND<br>SMS05C SERIES DEVICE<br>**----- End of picture text -----**<br>


**Figure 7. Computer Interface Protection** 

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VDD<br>VGG<br>ADDRESS BUS<br>RAM ROM<br>DATA BUS<br>CPU<br>I/O<br>CLOCK<br>CONTROL BUS<br>GND<br>**----- End of picture text -----**<br>


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SMS05C SERIES DEVICE<br>**----- End of picture text -----**<br>


**Figure 8. Microprocessor Protection** 

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**4** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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TSOP−6<br>CASE 318G−02<br>gd<br>ISSUE V<br>1<br>DATE 12 JUN 2012<br>SCALE 2:1<br>D NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>H 2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM<br>LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.<br>6 5 4 L2 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>GAUGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR<br>E1 ÉÉ E PLANE GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D<br>AND E1 ARE DETERMINED AT DATUM H.<br>ÉÉ 1 2 3 L 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.<br>NOTE 5 b M C PLANESEATING DIM MIN MILLIMETERSNOM MAX<br>DETAIL Z A 0.90 1.00 1.10<br>i e A1 0.01 0.06 0.10<br>b 0.25 0.38 0.50<br>c 0.10 0.18 0.26<br>D 2.90 3.00 3.10<br>A c E 2.50 2.75 3.00<br>0.05 E1 1.30 1.50 1.70<br>e 0.85 0.95 1.05<br>A1 L 0.20 0.40 0.60<br>DETAIL Z L2M 0° 0.25 BSC− 1 0°<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6:<br>PIN 1. DRAIN PIN 1. EMITTER 2 PIN 1. ENABLE PIN 1. N/C PIN 1. EMITTER 2 PIN 1. COLLECTOR<br>2. DRAIN 2. BASE 1 2. N/C 2. V in 2. BASE 2 2. COLLECTOR<br>3. GATE 3. COLLECTOR 1 3. R BOOST 3. NOT USED 3. COLLECTOR 1 3. BASE<br>4. SOURCE 4. EMITTER 1 4. Vz 4. GROUND 4. EMITTER 1 4. EMITTER<br>5. DRAIN 5. BASE 2 5. V in 5. ENABLE 5. BASE 1 5. COLLECTOR<br>6. DRAIN 6. COLLECTOR 2 6. V out 6. LOAD 6. COLLECTOR 2 6. COLLECTOR<br>STYLE 7: STYLE 8: STYLE 9: STYLE 10: STYLE 11: STYLE 12:<br>PIN 1. COLLECTOR PIN 1. Vbus PIN 1. LOW VOLTAGE GATE PIN 1. D(OUT)+ PIN 1. SOURCE 1 PIN 1. I/O<br>2. COLLECTOR 2. D(in) 2. DRAIN 2. GND 2. DRAIN 2 2. GROUND<br>3. BASE 3. D(in)+ 3. SOURCE 3. D(OUT)− 3. DRAIN 2 3. I/O<br>4. N/C 4. D(out)+ 4. DRAIN 4. D(IN)− 4. SOURCE 2 4. I/O<br>5. COLLECTOR 5. D(out) 5. DRAIN 5. VBUS 5. GATE 1 5. VCC<br>6. EMITTER 6. GND 6. HIGH VOLTAGE GATE 6. D(IN)+ 6. DRAIN 1/GATE 2 6. I/O<br>STYLE 13: STYLE 14: STYLE 15: STYLE 16: STYLE 17:<br>PIN 1. GATE 1 PIN 1. ANODE PIN 1. ANODE PIN 1. ANODE/CATHODE PIN 1. EMITTER<br>2. SOURCE 2 2. SOURCE 2. SOURCE 2. BASE 2. BASE<br>3. GATE 2 3. GATE 3. GATE 3. EMITTER 3. ANODE/CATHODE<br>4. DRAIN 2 4. CATHODE/DRAIN 4. DRAIN 4. COLLECTOR 4. ANODE<br>5. SOURCE 1 5. CATHODE/DRAIN 5. N/C 5. ANODE 5. CATHODE<br>6. DRAIN 1 6. CATHODE/DRAIN 6. CATHODE 6. CATHODE 6. COLLECTOR<br>GENERIC<br>RECOMMENDED<br>MARKING DIAGRAM*<br>SOLDERING FOOTPRINT*<br>6X<br>0.60<br>XXXAYW XXX M<br>roo 1 1<br>3.20 6X<br>0.95 IC STANDARD<br>XXX = Specific Device Code XXX = Specific Device Code<br>A =Assembly Location M = Date Code<br>Loom Y = Year | = Pb−Free Package<br>0.95 W = Work Week<br>PITCH<br>= Pb−Free Package<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering *This information is generic. Please refer to device data sheet details, please download the ON Semiconductor Soldering and for actual part marking. Pb−Free indicator, “G” or microdot “ Mounting Techniques Reference Manual, SOLDERRM/D. ”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98ASB14888C** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: TSOP−6 PAGE 1 OF 1** ~~Be~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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