Image not available
Illustrative purposes only
SI7322ADN-T1-GE3
Power MOSFET, N Channel, 100 V, 15.1 A, 0.045 ohm, PowerPAK 1212, Surface Mount
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: VISHAY
- Product type: Single MOSFETs
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (07-Nov-2024)
- No. of Pins: 8Pins
- Channel Type: N Channel
- Product Range: ThunderFET
- Qualification: -
- Power Dissipation: 26W
- Transistor Mounting: Surface Mount
- Rds(on) Test Voltage: 10V
- Transistor Case Style: PowerPAK 1212
- Drain Source Voltage Vds: 100V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 15.1A
- Drain Source On State Resistance: 0.045ohm
- Gate Source Threshold Voltage Max: 4V
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.223 € |
| Current stock | 1000+ |
| Lead time | 30 days |
Datasheet
**Si7322ADN** Vishay Siliconix www.vishay.com ## **N-Channel 100 V (D-S) MOSFET** **==> picture [223 x 126] intentionally omitted <==** **----- Start of picture text -----**<br> PowerPAK [®] 1212-8 Single<br>D<br>D 8<br>D 7<br>D 6<br>5<br>1<br>2 S<br>3 S<br>1 4 S<br>G<br>Top View Bottom View<br>3.3 mm<br>3.3 mm<br>**----- End of picture text -----**<br> ## **PRODUCT SUMMARY** |**PRODUCT SUMMARY**|| |---|---| |VDS (V)<br>RDS(on)max.()at VGS= 10 V<br>Qgtyp.(nC)<br>ID (A)|100<br>0.057<br>8.4<br>15.1a| |Configuration|Single| ## **FEATURES** - ThunderFET technology optimizes balance of RDS(on), Qg, Qsw and Qoss - 100 % Rg and UIS tested - Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 ## **APPLICATIONS** D G ~~4~~ S N-Channel MOSFET - Fixed telecom - DC/DC converter - Primary and secondary side switch - LED lighting ## **ORDERING INFORMATION** Package PowerPAK 1212-8 Lead (Pb)-free and halogen-free Si7322ADN-T1-GE3 ~~eee~~ **ABSOLUTE MAXIMUM RATINGS** (TA = 25 °C, unless otherwise noted) **PARAMETER SYMBOL LIMIT UNIT** ~~es~~ Drain-source voltage ~~ee~~ VDS ~~ee~~ 100 V Gate-source voltage VGS ± 20 ~~yp~~ TC = 25 °C 15.1[a] TC = 70 °C 12.1 Continuous drain current (TJ = 150 °C) ~~|~~ ID ~~PO~~ TA = 25 °C 5.4[b, c] ~~| PO a_iPs~~ TA = 70 °C ~~PO~~ 4.3[b, c] A Pulsed drain current (t = 100 μs) IDM 20 ~~es~~ Continuous source-drain diode current TTCA = 25 °C = 25 °C ~~es~~ IS 2.7 21.7[b, c] ~~po~~ Single pulse avalanche current L = 0.1 mH IAS 6 Single pulse avalanche energy EAS 1.8 mJ TC = 25 °C 26 Maximum power dissipation TC = 70 °C PD 16.7 W TA = 25 °C 3.3[b, c] ~~| PO ES~~ TA = 70 °C 2.1[b, c] ~~po~~ Operating junction and storage temperature range TJ, Tstg -55 to +150 °C Soldering recommendations (peak temperature)[c] 260 ~~yt tH~~ **THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICAL MAXIMUM UNIT** Maximum junction-to-ambient[b] t 10 s RthJA 31 38 °C/W Maximum junction-to-case (drain) Steady state RthJC 4 4.8 ## **Notes** a. TC = 25 °C - b. Surface mounted on 1" x 1" FR4 board c. t = 10 s - d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection - e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components - f. Maximum under steady state conditions is 81 °C/W S17-0444-Rev. A, 27-Mar-17 Document Number: 78590 **1** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si7322ADN** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** www.vishay.com |**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)||||| |---|---|---|---|---|---|---| |**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**|**MIN.**|**TYP.**|**MAX.**|**UNIT**| |**Static**||||||| |Drain-source breakdown voltage|VDS|VGS= 0 V, ID= 250 μA|100|-|-|V| |VDStemperature coefficient|VDS/TJ|ID= 250 μA|-|55|-|mV/°C| |VGS(th) temperature coefficient|VGS(th)/TJ||-|-6|-|| |Gate-source threshold voltage|VGS(th)|VDS= VGS, ID= 250 μA|2|-|4|V| |Gate-source leakage|IGSS|VDS= 0 V, VGS= ± 20 V|-|-|100|nA| |Zero gate voltage drain current|IDSS|VDS= 100 V, VGS= 0 V|-|-|1|μA| |||VDS= 100 V, VGS= 0 V, TJ= 70 °C|-|-|10|| |On-state drain currenta|ID(on)|VDS 5 V, VGS=10 V|10|-|-|A| |Drain-source on-state resistancea|RDS(on)|VGS=10 V, ID= 5.5 A|-|0.045|0.057|| |Forward transconductancea|gfs|VDS= 5 V, ID= 5.5 A|-|12|-|S| |**Dynamicb**||||||| |Input capacitance|Ciss|VDS= 50 V, VGS= 0 V, f = 1 MHz|-|360|-|pF| |Output capacitance|Coss||-|130|-|| |Reverse transfer capacitance|Crss||-|18|-|| |Totalgate charge|Qg|VDS= 50 V, VGS= 10 V, ID= 5.5 A|-|8.4|13|nC| |Gate-source charge|Qgs||-|1.7|-|| |Gate-drain charge|Qgd||-|2.6|-|| |Gate resistance|Rg|f = 1 MHz|0.56|2.8|5.6|| |Turn-on delay time|td(on)|VDD= 50 V, RL= 10, ID 5 A,<br>VGEN= 10 V, Rg= 1|-|6|15|ns| |Rise time|tr||-|18|40|| |Turn-off delay time|td(off)||-|9|20|| |Fall time|tf||-|13|25|| |**Drain-Source Body Diode Characteristics**||||||| |Continuous source-drain diode current|IS|TC= 25 °C|-|-|21.7|A| |Pulse diode forward current|ISM||-|-|20|| |Body diode voltage|VSD|IS= 5 A, VGS= 0 V|-|0.85|1.2|V| |Body diode reverse recovery time|trr|IF= 5 A, dI/dt = 100 A/μs, TJ= 25 °C|-|32|60|ns| |Body diode reverse recovery charge|Qrr||-|32|60|nC| |Reverse recovery fall time|ta||-|23|-|ns| |Reverse recovery rise time|tb||-|9|-|| ## **Notes** a. Pulse test; pulse width 300 μs, duty cycle 2 % b. Guaranteed by design, not subject to production testing _Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability._ S17-0444-Rev. A, 27-Mar-17 Document Number: 78590 **2** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si7322ADN** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** **==> picture [77 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> www.vishay.com<br>**----- End of picture text -----**<br> ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>20 10000<br>VGS = 10 V thru 6 V<br>15<br>VGS = 5 V 1000<br>10<br>100<br>5<br>VGS = 4 V<br>0 10<br>0 0.5 1 1.5 2 2.5 3<br>VDS - Drain-to-Source Voltage (V)<br>2nd line<br>2nd line 1st line 2nd line<br> - Drain Current (A)<br>ID<br>**----- End of picture text -----**<br> ## **Output Characteristics** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>0.08 10000<br>0.06<br>VGS = 10 V 1000<br>0.04<br>100<br>0.02<br>0 10<br>0 5 10 15 20<br>ID - Drain Current (A)<br>2nd line<br>2nd line 1st line 2nd line<br> - On-Resistance (Ω)<br>DS(on)<br>R<br>**----- End of picture text -----**<br> ## **On-Resistance vs. Drain Current and Gate Voltage** **==> picture [238 x 382] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>20 10000<br>16<br>1000<br>12<br>8 T C = 25 °C<br>100<br>4<br>TC = 125 °C<br>TC = -55 °C<br>0 10<br>0 1 2 3 4 5 6<br>VGS - Gate-to-Source Voltage (V)<br>2nd line<br>Transfer Characteristics<br>Axis Title<br>600 10000<br>500<br>Ciss<br>400 1000<br>300<br>200 C oss 100<br>100<br>Crss<br>0 10<br>0 20 40 60 80 100<br>VDS - Drain-to-Source Voltage (V)<br>2nd line<br>2nd line 1st line 2nd line<br> - Drain Current (A)<br>ID<br>2nd line 1st line 2nd line<br>C - Capacitance (pF)<br>**----- End of picture text -----**<br> ## **Capacitance** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>10 10000<br>ID = 5.5 A<br>8 V DS = 50 V<br>1000<br>6<br>VDS = 80 V<br>VDS = 25 V<br>4<br>100<br>2<br>0 10<br>0 2 4 6 8 10<br>Qg - Total Gate Charge (nC)<br>2nd line<br>2nd line 1st line 2nd line<br> - Gate-to-Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br> **Gate Charge** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>2.2 10000<br>2.0 ID = 5.5 A<br>1.8 V GS = 10 V<br>1000<br>1.6<br>1.4<br>1.2<br>100<br>1.0<br>0.8<br>0.6 10<br>-50 -25 0 25 50 75 100 125 150<br>TJ - Junction Temperature (°C)<br>2nd line<br>2nd line 1st line 2nd line<br> - On-Resistance (Normalized)<br>DS(on)<br>R<br>**----- End of picture text -----**<br> ## **On-Resistance vs. Junction Temperature** S17-0444-Rev. A, 27-Mar-17 Document Number: 78590 **3** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si7322ADN** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** **==> picture [77 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> www.vishay.com<br>**----- End of picture text -----**<br> ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>100 10000<br>TJ = 150 °C<br>10 1000<br>T J = 25 ° C<br>1 100<br>0.1 10<br>0 0.2 0.4 0.6 0.8 1.0 1.2<br>VSD - Source-to-Drain Voltage (V)<br>2nd line<br>2nd line 1st line 2nd line<br> - Source Current (A)<br>IS<br>**----- End of picture text -----**<br> **Source-Drain Diode Forward Voltage** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>3.4 10000<br>3.2<br>3.0<br>1000<br>2.8<br>2.6<br>ID = 250 μA 100<br>2.4<br>2.2<br>2.0 10<br>-50 -25 0 25 50 75 100 125 150<br>TJ - Temperature (°C)<br>2nd line<br>2nd line (V)VGS(th) 1st line 2nd line<br>**----- End of picture text -----**<br> **Threshold Voltage** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>0.2 10000<br>ID = 5.5 A<br>0.15<br>1000<br>0.1 TJ = 150 °C<br>100<br>0.05<br>TJ = 25 °C<br>0 10<br>2 4 6 8 10<br>VGS - Gate-to-Source Voltage (V)<br>2nd line<br>2nd line 1st line 2nd line<br> - On-Resistance (Ω)<br>DS(on)<br>R<br>**----- End of picture text -----**<br> **On-Resistance vs. Gate-to-Source Voltage** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>50 10000<br>40<br>1000<br>30<br>20<br>100<br>10<br>0 10<br>0.001 0.01 0.1 1 10 100 1000<br>Time (s)<br>2nd line<br>2nd line 1st line 2nd line<br>Power (W)<br>**----- End of picture text -----**<br> **Single Pulse Power, Junction-to-Ambient** **==> picture [238 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>100 10000<br>Limited by RDS(on) (1)<br>IDM limited<br>10<br>100 μs<br>1000<br>1<br>ID limited 1 ms<br>10 ms<br>0.1 100 ms<br>1 s 100<br>10 s<br>0.01 DC<br>Single pulseTA = 25 °C BVdss Limited<br>0.001 10<br>0.1 1 10 100 1000<br>VDS - Drain-to-Source Voltage (V)<br>(1) VGS > minimum VGS at which RDS(on) is specified<br>2nd line 1st line 2nd line<br> - Drain Current (A)<br>ID<br>**----- End of picture text -----**<br> **Safe Operating Area, Junction-to-Ambient** S17-0444-Rev. A, 27-Mar-17 Document Number: 78590 **4** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si7322ADN** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** www.vishay.com ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [238 x 165] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>20 10000<br>15<br>1000<br>10<br>100<br>5<br>0 10<br>0 25 50 75 100 125 150<br>TC - Case Temperature (°C)<br>2nd line 1st line 2nd line<br> - Drain Current (A)<br>ID<br>**----- End of picture text -----**<br> **Current Derating[a]** **==> picture [238 x 164] intentionally omitted <==** **----- Start of picture text -----**<br> Axis Title<br>35 10000<br>30<br>25<br>1000<br>20<br>15<br>100<br>10<br>5<br>0 10<br>0 25 50 75 100 125 150<br>TC - Case Temperature (°C)<br>2nd line 1st line 2nd line<br>Power (W)<br>**----- End of picture text -----**<br> **Power, Junction-to-Case** ## **Note** a. The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. S17-0444-Rev. A, 27-Mar-17 Document Number: 78590 **5** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si7322ADN** Vishay Siliconix **==> picture [77 x 24] intentionally omitted <==** **----- Start of picture text -----**<br> —<br>www.vishay.com<br>**----- End of picture text -----**<br> ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [419 x 362] intentionally omitted <==** **----- Start of picture text -----**<br> 1 a es<br>pOCh Duty Cycle = 0.5 e PoTTSTT LemTT<br>a er<br>0.2<br>a<br>BSCEen [HT]<br>e o<br>0.1<br>0.1 a aeEOee Aoei ort ee PTToaaPom coy<br>0.05 SEE ee ae ry<br>FO _ a a cl co<br>cr a aoHoa Oceee a a 1 anatb TTYITT]<br>0.02<br>Re 1. Duty Cycle, D = a HT<br>leer TTT TT TTT TTT TTT x per unitsase-rea-sreow III<br>PT Tet TTI ETT ETT TTT 2ete lll<br>Single pulse<br>0.01 | | 224ial 4. Surface Mounted i<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>Square Wave Pulse Duration (s)<br>2nd line<br>Normalized Thermal Transient Impedance, Junction-to-Ambient<br>Axis Title<br>1<br>LL. Duty Cycle = 0.5 ____..“____ee crs me I =.ce Se _.<br>Sr oe ac ok ee es OO OO SR<br>pf err tH<br>0.2<br>aeoe eee<br>——_ [ice tT tt} CT TTT<br>0.1 0.1 0.05 Faitea<br>[Z|eSOFa| 0.02 Aa SSHOSA OeOS OS OSOOSG A OS OSSGeGSSO OS<br>A eG Oe Gs QO OO OGG GG OOO<br>Single pulse<br>0.01<br>0.0001 0.001 0.01 0.1 1<br>Square Wave Pulse Duration (s)<br>Thermal Impedance<br>Normalized Effective Transient<br>Thermal Impedance<br>Normalized Effective Transient<br>**----- End of picture text -----**<br> ## **Normalized Thermal Transient Impedance, Junction-to-Case** _Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?75590._ Document Number: 78590 S17-0444-Rev. A, 27-Mar-17 **6** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Package Information** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** www.vishay.com ## **PowerPAK[®] 1212-8, (Single / Dual)** **==> picture [412 x 251] intentionally omitted <==** **----- Start of picture text -----**<br> L<br>H E2 K<br>W E4<br>8<br>1 1<br>Z<br>2<br>2<br>3<br>4 5 4<br>L1 E3<br>A1<br>Backside view of single pad<br>L<br>H E2 K<br>E4<br>H<br>2<br>1<br>E1 Detail Z D1<br>E 2<br>Notes 3<br>1. Inch will govern<br>2 Dimensions exclusive of mold gate burrs D2 4<br>3. Dimensions exclusive of mold flash and cutting burrs<br>E3<br>Backside view of dual pad<br>θ θ<br>θ<br>θ<br>D4<br>M<br>e<br>D1 D D2 D5<br>b<br>A<br>c<br>D4<br>3(2x)<br>D<br>D2 D5<br>K1<br>b<br>**----- End of picture text -----**<br> |**DIM.**|**MILLIMETERS**<br>**INCH**|**MILLIMETERS**<br>**INCH**|**MILLIMETERS**<br>**INCH**| |---|---|---|---| ||**MIN.**|**NOM.**|**MAX.**<br>**MIN.**<br>**NOM**| |A|0.97|1.04|1.12<br>0.038<br>0.04| |A1|0.00|-|0.05<br>0.000<br>-| |b|0.23|0.30|0.41<br>0.009<br>0.01| |c|0.23|0.28|0.33<br>0.009<br>0.01| |D|3.20|3.30|3.40<br>0.126<br>0.13| |D1|2.95|3.05|3.15<br>0.116<br>0.12| |D2|1.98|2.11|2.24<br>0.078<br>0.08| |D3|0.48|-|0.89<br>0.019<br>-| |D4|0.47 typ.<br>0.0185||| |D5|2.3 typ.<br>0.090||| |E|3.20|3.30|3.40<br>0.126<br>0.13| |E1|2.95|3.05|3.15<br>0.116<br>0.12| |E2|1.47|1.60|1.73<br>0.058<br>0.06| |E3|1.75|1.85|1.98<br>0.069<br>0.07| |E4|0.034 typ.<br>0.013||| |e|0.65 BSC<br>0.026||| |K|0.86 typ.<br>0.034||| |K1|0.35|-|-<br>0.014<br>-| |H|0.30|0.41|0.51<br>0.012<br>0.01| |L|0.30|0.43|0.56<br>0.012<br>0.01| |L1|0.06|0.13|0.20<br>0.002<br>0.00| ||0°|-|12°<br>0°<br>-| |W|0.15|0.25|0.36<br>0.006<br>0.01| |M|0.125 typ.<br>0.005||| |ECN: S16-2667-Rev. M, 09-Jan-17<br>DWG: 5882|||| Revison: 09-Jan-17 **1** Document Number: 71656 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Application Note 826** **==> picture [60 x 50] intentionally omitted <==** ## Vishay Siliconix ## **RECOMMENDED MINIMUM PADS FOR PowerPAK[®] 1212-8 Single** **==> picture [343 x 270] intentionally omitted <==** **----- Start of picture text -----**<br> 0.152<br>(3.860)<br>0.039 0.068 0.010<br>(0.990) (1.725) (0.255)<br>0.016<br>(0.405)<br>0.026<br>(0.660)<br>0.025 0.030<br>(0.635) (0.760)<br>0.088 (2.235) 0.094 (2.390)<br>**----- End of picture text -----**<br> **==> picture [80 x 47] intentionally omitted <==** **----- Start of picture text -----**<br> Return to Index<br>**----- End of picture text -----**<br> Return to Index Recommended Minimum Pads Dimensions in Inches/(mm) Document Number: 72597 Revision: 21-Jan-08 www.vishay.com 7 **Legal Disclaimer Notice** Vishay www.vishay.com **==> picture [59 x 48] intentionally omitted <==** ## **Disclaimer** ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. _**© 2019 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED**_ Revision: 01-Jan-2019 Document Number: 91000 **1**
Updated at April 29, 2026
Vishay is a global leader in the manufacturing of discrete semiconductors and passive electronic components. Renowned for its exceptional quality and engineering expertise, the company produces highly reliable solutions that drive innovation across the industrial, automotive, telecommunications, and consumer electronics markets. From advanced factory automation to vehicle electrification, Vishay components provide the foundational building blocks for modern electronic design. The company's expansive portfolio is heavily focused on efficient power management, signal routing, and energy storage. Within its passive component lineup, Vishay is recognized for its extensive array of high-performance capacitors, including robust aluminium electrolytic, film, and polymer variants, alongside highly efficient power inductors. In the realm of discrete semiconductors, Vishay is a premier manufacturer of single and dual MOSFETs, as well as a vast selection of Schottky, Zener, and fast-recovery rectifier diodes designed for demanding power applications. Furthermore, Vishay delivers industry-leading circuit protection and thermal management solutions. With a broad offering of transient voltage suppressors (TVS diodes) and temperature-sensing NTC thermistors, these components are engineered to safeguard sensitive circuitry against both electrical and thermal overstress. By combining this vital mix of advanced discretes and passives, Vishay enables engineers to develop robust, space-saving, and highly resilient electronic systems.
About Novapart
Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →