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SI3590DV-T1-GE3
Dual MOSFET, Complementary N and P Channel, 30 V, 30 V, 2.5 A, 2.5 A, 0.062 ohm
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- Manufacturer: VISHAY
- Product type: Dual MOSFETs
- Transistor Polarity:N and P Channel; Continuous Drain Current Id:2.5A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.062ohm; Rds(on) Test Voltage Vgs:4.5V; Threshold Voltage Vg
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (21-Jan-2025)
- No. of Pins: 6Pins
- Channel Type: Complementary N and P Channel
- Product Range: -
- Qualification: -
- Transistor Case Style: TSOP
- Operating Temperature Max: 150°C
- Power Dissipation N Channel: 830mW
- Power Dissipation P Channel: 830mW
- Drain Source Voltage Vds N Channel: 30V
- Drain Source Voltage Vds P Channel: 30V
- Continuous Drain Current Id N Channel: 2.5A
- Continuous Drain Current Id P Channel: 2.5A
- Drain Source On State Resistance N Channel: 0.062ohm
- Drain Source On State Resistance P Channel: 0.062ohm
| Delivery and price | |
|---|---|
| Units per pack | 1500 |
| Price | 0.458 € |
| Current stock | 1000+ |
| Lead time | 30 days |
Datasheet
**Si3590DV** **==> picture [59 x 48] intentionally omitted <==** Vishay Siliconix ## **N- and P-Channel 30-V (D-S) MOSFET** ## **PRODUCT SUMMARY** |**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**| |---|---|---|---| ||**VDS (V)**|**RDS(on) (**Ω**)**|**ID (A)**| |N-Channel|30|0.077 at VGS= 4.5 V|3| |||0.120 at VGS= 2.5 V|2| |P-Channel|- 30|0.170 at VGS= - 4.5 V|- 2| |||0.300 at VGS= - 2.5 V|- 1.2| ## **FEATURES** - **Halogen-free According to IEC 61249-2-21 Definition** - TrenchFET[®] Power MOSFET - Ultra Low RDS(on) N- and P-Channel for High Efficiency - Optimized for High-Side/Low-Side - Minimized Conduction Losses - Compliant to RoHS Directive 2002/95/EC **==> picture [38 x 92] intentionally omitted <==** ## **APPLICATIONS** - Portable Devices Including PDAs, Cellular Phones and Pagers **==> picture [241 x 149] intentionally omitted <==** **----- Start of picture text -----**<br> TSOP-6<br>T op V i e w<br>G1 1 6 D1<br>3 mm S2 2 5 S1<br>G2 3 4 D2<br>2.85 mm<br>Ordering Information: Si3590DV-T1-E3 (Lead (Pb)-free)<br>Si3590DV-T1-GE3 (Lead (Pb)-free and Halogen-free)<br>**----- End of picture text -----**<br> **==> picture [188 x 132] intentionally omitted <==** **----- Start of picture text -----**<br> D1 S2<br>G2<br>G1<br>S1 D2<br>**----- End of picture text -----**<br> N-Channel MOSFET P-Channel MOSFET ## **ABSOLUTE MAXIMUM RATINGS** TA = 25 °C, unless otherwise noted |**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted|**ABSOLUTE MAXIMUM RATINGS**TA= 25 °C, unless otherwise noted| |---|---|---|---|---|---|---|---| |**Parameter**||**Symbol**|**N-Channel**||**P-Channel**||**Uni**<br>| ||||**10 s**|**Steady State**|<br>**10 s**|**Steady State**|| |Drain-Source Voltage||VDS|30||- 30||V| |Gate-Source Voltage||VGS|± 12||± 12||| |Continuous Drain Current (TJ= 150 °C)a|TA= 25 °C|ID|3|2.5|- 2|- 1.7|A| ||TA= 70 °C||2.3|2.0|- 1.6|- 1.3|| |Pulsed Drain Current||IDM|8||- 8||| |Continuous Source Current (Diode Conduction)a||IS|1.05|0.75|- 1.05|- 0.75|| |Maximum Power Dissipationa|TA= 25 °C|PD|1.15|0.83|1.15|0.83|W| ||TA= 70 °C||0.70|0.53|0.70|0.53|| |Operating Junction and Storage Temperature Range||TJ, Tstg|- 55 to 150||||°C| |**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|||||| |---|---|---|---|---|---|---|---| |**Parameter**||**Symbol**|**N-Channel**||**P-Channel**||**Uni**| ||||**Typ.**|**Max.**|**Typ.**|**Max.**|| |Maximum Junction-to-Ambienta|t≤10 s|RthJA|93|110|93|110|°C/W| ||Steady State||130|150|130|150|| |Maximum Junction-to-Foot (Drain)|Steady State|RthJF|75|90|75|90|| |Notes:<br>a. Surface Mounted on 1" x 1" FR4 board.|||||||| Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 www.vishay.com 1 **Si3590DV** ## Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** |**SPECIFICATIONS**TJ= 25°C, unless otherwise noted|**SPECIFICATIONS**TJ= 25°C, unless otherwise noted|**SPECIFICATIONS**TJ= 25°C, unless otherwise noted|||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min.**|**Typ.**|**Max.**|**Unit**| |**Static**|||||||| |Gate Threshold Voltage|VGS(th)|VDS= VGS, ID= 250 µA|N-Ch<br>P-Ch|0.6<br>- 0.6||1.5<br>- 1.5|V| |||VDS= VGS, ID= - 250 µA|||||| |Gate-Body Leakage|IGSS|VDS= 0 V, VGS= ± 12 V|N-Ch<br>P-Ch|||± 100<br>± 100|nA| |Zero Gate Voltage Drain Current|IDSS|VDS= 30 V, VGS= 0 V|N-Ch<br>P-Ch|||1<br>- 1|µA| |||VDS= - 30 V, VGS= 0 V|||||| |||VDS= 30 V, VGS= 0 V, TJ= 55 °C|N-Ch<br>P-Ch|||5<br>- 5|| |||VDS= - 30 V, VGS= 0 V, TJ= 55 °C|||||| |On-State Drain Currenta|ID(on)|VDS≥5 V, VGS= 4.5 V|N-Ch<br>P-Ch|5<br>- 5|||A| |||VDS≤- 5 V, VGS= - 4.5 V|||||| |Drain-Source On-State Resistancea|RDS(on)|VGS= 4.5 V, ID= 3 A|N-Ch<br>P-Ch||0.062<br>0.135|0.077<br>0.170|Ω| |||VGS= - 4.5 V, ID= - 2 A|||||| |||VGS= 2.5 V, ID= 2 A|N-Ch<br>P-Ch||0.095<br>0.235|0.120<br>0.300|| |||VGS= - 2.5 V, ID= - 1.2 A|||||| |Forward Transconductancea|gfs|VDS= 5 V, ID= 3 A|N-Ch<br>P-Ch||10<br>5||S| |||VDS= - 5 V, ID= - 2 A|||||| |Diode Forward Voltagea|VSD|IS= 1.05 A, VGS= 0 V|N-Ch<br>P-Ch||0.80<br>- 0.83|1.10<br>- 1.10|V| |||IS= - 1.05 A, VGS= 0 V|||||| |**Dynamicb**|||||||| |Total Gate Charge|Qg|N-Channel<br>VDS= 15 V, VGS= 4.5 V, ID= 2 A<br>P-Channel<br>VDS= - 15 V, VGS= - 4.5 V, ID= - 2 A|N-Ch<br>P-Ch||3<br>3.8|4.5<br>6|nC| |Gate-Source Charge|Qgs||N-Ch<br>P-Ch||0.6<br>0.6||| |Gate-Drain Charge|Qgd||N-Ch<br>P-Ch||1.0<br>1.5||| |Turn-On Delay Time|td(on)|N-Channel<br>VDD= 15 V, RL= 15Ω<br>ID ≅1 A, VGEN= 10 V, Rg= 6Ω<br>P-Channel<br>VDD= - 15 V, RL= 15Ω<br>ID ≅- 1 A, VGEN= - 10 V, Rg= 6Ω|N-Ch<br>P-Ch||5<br>5|8<br>8|ns| |Rise Time|tr||N-Ch<br>P-Ch||12<br>15|23<br>23|| |Turn-Off Delay Time|td(off)||N-Ch<br>P-Ch||13<br>20|23<br>30|| |Fall Time|tf||N-Ch<br>P-Ch||7<br>20|12<br>30|| |Source-Drain Reverse Recovery Time|trr|IF= 1.05 A, dI/dt = 100 A/µs|N-Ch<br>P-Ch||15<br>18|25<br>30|| |||IF= - 1.05 A, dI/dt = 100 A/µs|||||| Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. _Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability._ www.vishay.com 2 Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 **Si3590DV** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** ## **N-CHANNEL TYPICAL CHARACTERISTICS** 25 °C unless noted **==> picture [220 x 618] intentionally omitted <==** **----- Start of picture text -----**<br> 8<br>7 VGS = 5 V thru 2.5 V<br>6<br>5<br>4<br>3<br>2 V<br>2<br>1<br>1.5 V<br>0<br>0 1 2 3 4 5<br>VDS - Drain-to-Source Voltage (V)<br>Output Characteristics<br>0.5<br>0.4<br>0.3<br>0.2<br>VGS = 2.5 V<br>0.1<br>VGS = 4.5 V<br>0.0<br>0 2 4 6 8 10<br>ID - Drain Current (A)<br>On-Resistance vs. Drain Current<br>6<br>V DS = 15 V<br>5 I D = 2 A<br>4<br>3<br>2<br>1<br>0<br>0 1 2 3 4 5<br>Q g - T otal Gate Charge (nC)<br>Gate Charge<br>- Drain Current (A)<br>ID<br>) Ω<br>- On-Resistance (<br>DS(on)<br>R<br>- Gate-to-Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br> **==> picture [218 x 187] intentionally omitted <==** **----- Start of picture text -----**<br> 8<br>7<br>6<br>5<br>4<br>3<br>T C = 125 °C<br>2<br>1 25 ° C - 55 °C<br>0<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0<br>V GS - Gate-to-Source Voltage (V)<br>- Drain Current (A)<br>ID<br>**----- End of picture text -----**<br> **==> picture [93 x 7] intentionally omitted <==** **----- Start of picture text -----**<br> Transfer Characteristics<br>**----- End of picture text -----**<br> **==> picture [228 x 407] intentionally omitted <==** **----- Start of picture text -----**<br> 450<br>360<br>Ciss<br>270<br>180<br>90 C oss<br>Crss<br>0<br>0 6 12 18 24 30<br>VDS - Drain-to-Source Voltage (V)<br>Capacitance<br>1.8<br>V GS = 4.5 V<br>1.6 I D = 3 A<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>- 50 - 25 0 2 5 5 0 7 5 100 125 150<br>T J - Junction T emperature (°C)<br>On-Resistance vs. Junction Temperature<br>C - Capacitance (pF)<br>- On-Resistance<br>(Normalized)<br>DS(on)<br>R<br>**----- End of picture text -----**<br> Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 www.vishay.com 3 **Si3590DV** ## Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** ## **N-CHANNEL TYPICAL CHARACTERISTICS** 25 °C unless noted **==> picture [485 x 198] intentionally omitted <==** **----- Start of picture text -----**<br> 10 0.25<br>0.20<br>ID = 3 A<br>0.15<br>T J = 150 °C<br>1<br>0.10<br>T J = 25 °C<br>0.05<br>0.1 0.00<br>0.00 0.3 0.6 0.9 1.2 1.5 0 1 2 3 4 5<br>V SD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V)<br>Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage<br>) Ω<br>- Source Current (A) - On-Resistance (<br>S<br>I DS(on)<br>R<br>**----- End of picture text -----**<br> **==> picture [482 x 195] intentionally omitted <==** **----- Start of picture text -----**<br> 0.4 8<br>I D = 250 µA<br>0.2<br>6<br> 0.0<br>4<br>- 0.2<br>2<br>- 0.4<br>- 0.6 0<br>- 50 - 25 0 2 5 5 0 7 5 100 125 150 0.01 0.1 1 10 30<br>T J - T emperature (°C) Time (s)<br>Threshold Voltage Single Pulse Power, Junction-to-Ambient<br>V ariance (V)<br>Power (W)<br>GS(th)<br>V<br>**----- End of picture text -----**<br> **==> picture [213 x 207] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>I DM Limited<br>Limited by RDS(on)*<br>10<br>100 µs<br>1 1 ms<br>I D( on)<br>Limited<br>10 ms<br>0.1 100 ms<br>T C = 25 °C<br>Single Pulse 10 s, 1 s<br>DC<br> BV DS S Limited<br>0.01<br>0.1 1 1 0 100<br>VDS - Drain-to-Source Voltage (V)<br>* VGS > minimum VGS at which RDS(on) is specified<br>Safe Operating Area, Junction-to-Case<br>- Drain Current (A)<br>D<br>I<br>**----- End of picture text -----**<br> www.vishay.com 4 Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 **Si3590DV** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** ## **N-CHANNEL TYPICAL CHARACTERISTICS** 25 °C unless noted **==> picture [468 x 186] intentionally omitted <==** **----- Start of picture text -----**<br> 2<br>1<br>Duty Cycle = 0.5<br>0.2 Notes:<br>0.1 P DM<br>0.1<br>0.05 t 1<br>0.02 1. Duty Cycle, D = t 2 t t 1 2<br>2. Per Unit Base = R th J A = 87 °C/W<br>3. T JM - T A = P DM Z th J A [(t ) ]<br>4. Surface Mounted<br>Single Pulse<br>0.01<br>10 [-4 ] 10 [-3 ] 10 [-2 ] 10 [-1 ] 1 1 0 100 600<br>Square W ave Pulse Duration (s)<br>Thermal Impedance<br>Normalized Ef fective T ransient<br>**----- End of picture text -----**<br> **Normalized Thermal Transient Impedance, Junction-to-Ambient** **==> picture [467 x 182] intentionally omitted <==** **----- Start of picture text -----**<br> 2<br>1<br>Duty Cycle = 0.5<br>0.2<br>0.1<br>0.1 0.05<br>0.02<br>Single Pulse<br>0.01<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10<br>Square Wave Pulse Duration (s)<br>Thermal Impedance<br>Normalized Effective Transient<br>**----- End of picture text -----**<br> **Normalized Thermal Transient Impedance, Junction-to-Foot** Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 www.vishay.com 5 **Si3590DV** ## Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** ## **P-CHANNEL TYPICAL CHARACTERISTICS** 25 °C unless noted **==> picture [483 x 618] intentionally omitted <==** **----- Start of picture text -----**<br> 8 8<br>V GS = 5 V thru 3.5 V T C = - 55 °C<br>7 7<br>3 V 25 °C<br>6 6<br>5 5 125 °C<br>4 4<br>2.5 V<br>3 3<br>2 2<br>2 V<br>1 1<br>1.5 V<br>0 0<br>0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5<br>V DS - Drain-to-Source Voltage (V) V GS - Gate-to-Source Voltage (V)<br>Output Characteristics Transfer Characteristics<br>0.75 500<br>0.60 400<br>Ciss<br>0.45 300<br>VGS = 2.5 V<br>0.30 200<br>VGS = 4.5 V<br>0.15 100 Coss<br>Crss<br>0.00 0<br>0 1 2 3 4 5 6 7 8 0 6 12 18 24 30<br>ID - Drain Current (A) VDS - Drain-to-Source Voltage (V)<br>On-Resistance vs. Drain Current Capacitance<br>6 1.8<br>5 I VDDS = 2 A = 15 V 1.6 V I D GS = 2 A = 4.5 V<br>4 1.4<br>3 1.2<br>2 1.0<br>1 0.8<br>0 0.6<br>0 1 2 3 4 5 - 50 - 25 0 2 5 5 0 7 5 100 125 150<br>Qg - Total Gate Charge (nC) T J - Junction T emperature (°C)<br>Gate Charge On-Resistance vs. Junction Temperature<br>- Drain Current (A) - Drain Current (A)<br>I D ID<br>) Ω<br>- On-Resistance ( C - Capacitance (pF)<br>DS(on)<br>R<br>- On-Resistance<br>(Normalized)<br>DS(on)<br>- Gate-to-Source Voltage (V) R<br> GS<br>V<br>**----- End of picture text -----**<br> www.vishay.com 6 Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 **Si3590DV** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** ## **P-CHANNEL TYPICAL CHARACTERISTICS** 25 °C unless noted **==> picture [212 x 196] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>T J = 150 °C<br>1<br>T J = 25 °C<br>0.1<br>0.00 0.3 0.6 0.9 1.2 1.5<br>V SD - Source-to-Drain Voltage (V)<br>Source-Drain Diode Forward Voltage<br>- Source Current (A)<br>IS<br>**----- End of picture text -----**<br> **==> picture [221 x 187] intentionally omitted <==** **----- Start of picture text -----**<br> 0.5<br>0.4<br>0.3<br>ID = 2 A<br>0.2<br>0.1<br>0.0<br>0 1 2 3 4 5 6 7<br>VGS - Gate-to-Source Voltage (V)<br>) Ω<br>- On-Resistance (<br>DS(on)<br>R<br>**----- End of picture text -----**<br> **On-Resistance vs. Gate-to-Source Voltage** **==> picture [216 x 184] intentionally omitted <==** **----- Start of picture text -----**<br> 0.4<br>I D = 250 µA<br>0.3<br>0.2<br>0.1<br>0.0<br>- 0.1<br>- 0.2<br>- 50 - 25 0 2 5 5 0 7 5 100 125 150<br>T J - T emperature (°C)<br>V ariance (V)<br>GS(th)<br>V<br>**----- End of picture text -----**<br> **==> picture [71 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> Threshold Voltage<br>**----- End of picture text -----**<br> **==> picture [214 x 193] intentionally omitted <==** **----- Start of picture text -----**<br> 8<br>6<br>4<br>2<br>0<br>0.01 0.1 1 10 30<br>Time (s)<br>Single Pulse Power, Junction-to-Ambient<br>Power (W)<br>**----- End of picture text -----**<br> **==> picture [213 x 194] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>I DM Limited<br>10 Limited by RDS(on)*<br>100 µs<br>1 1 ms<br>I D( on)<br>Limited 10 ms<br>0.1 T C = 25 °C 100 ms<br>Single Pulse 10 s, 1 s<br>DC<br> BV DS S Limited<br>0.01<br>0.1 1 1 0 100<br>VDS - Drain-to-Source Voltage (V)<br>* VGS > minimum VGS at which RDS(on) is specified<br>- Drain Current (A)<br>ID<br>**----- End of picture text -----**<br> **Safe Operating Area, Junction-to-Case** Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 www.vishay.com 7 **Si3590DV** ## Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** ## **P-CHANNEL TYPICAL CHARACTERISTICS** 25 °C unless noted **==> picture [471 x 393] intentionally omitted <==** **----- Start of picture text -----**<br> 2<br>1<br>Duty Cycle = 0.5<br>0.2 Notes:<br>0.1 P DM<br>0.1<br>0.05 t 1<br>0.02 1. Duty Cycle, D = t 2 t t 1 2<br>2. Per Unit Base = R th J A = 87 °C/W<br>3. T JM - T A = P DM Z th J A [(t ) ]<br>4. Surface Mounted<br>Single Pulse<br>0.01<br>10 [-4 ] 10 [-3 ] 10 [-2 ] 10 [-1 ] 1 1 0 100 600<br>Square W ave Pulse Duration (s)<br>Normalized Thermal Transient Impedance, Junction-to-Ambient<br>2<br>1<br>Duty Cycle = 0.5<br>0.2<br>0.1<br>0.1 0.05<br>0.02<br>Single Pulse<br>0.01<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10<br>Square Wave Pulse Duration (s)<br>Thermal Impedance<br>Normalized Ef fective T ransient<br>Thermal Impedance<br>Normalized Effective Transient<br>**----- End of picture text -----**<br> **Normalized Thermal Transient Impedance, Junction-to-Foot** _Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72032._ www.vishay.com Document Number: 72032 S09-1927-Rev. C, 28-Sep-09 8 **Package Information** ## Vishay Siliconix ## **TSOP: 5/6−LEAD JEDEC Part Number: MO-193C** **==> picture [421 x 277] intentionally omitted <==** **----- Start of picture text -----**<br> e1 e1<br>5 4 6 5 4<br>E 1 E E 1 E<br>1 1<br>2 3 2 3<br>-B- -B-<br>e b 0.15 M C B A e b 0.15 M C B A<br>5-LEAD TSOP 6-LEAD TSOP<br>-A- 4x 1<br>D 0.17 Ref<br>R c<br>A 2 A R L 2<br>Gauge Plane<br>Seating Plane Seating Plane<br>L<br>0.08 C -C- A 1<br>(L 1 )<br>4x 1<br>**----- End of picture text -----**<br> **==> picture [219 x 236] intentionally omitted <==** **----- Start of picture text -----**<br> MILLIMETERS INCHES<br>Dim Min Nom Max Min Nom Max<br>A 0.91 - 1.10 0.036 - 0.043<br>A 1 0.01 - 0.10 0.0004 - 0.004<br>A 2 0.90 - 1.00 0.035 0.038 0.039<br>b 0.30 0.32 0.45 0.012 0.013 0.018<br>c 0.10 0.15 0.20 0.004 0.006 0.008<br>D 2.95 3.05 3.10 0.116 0.120 0.122<br>E 2.70 2.85 2.98 0.106 0.112 0.117<br>E 1 1.55 1.65 1.70 0.061 0.065 0.067<br>e 0.95 BSC 0.0374 BSC<br>e 1 1.80 1.90 2.00 0.071 0.075 0.079<br>L 0.32 - 0.50 0.012 - 0.020<br>L 1 0.60 Ref 0.024 Ref<br>L 2 0.25 BSC 0.010 BSC<br>R 0.10 - - 0.004 - -<br>0 4 8 0 4 8<br>1 7 Nom 7 Nom<br>ECN: C-06593-Rev. I, 18-Dec-06<br>DWG: 5540<br>**----- End of picture text -----**<br> Document Number: 71200 18-Dec-06 www.vishay.com 1 **AN823 Vishay Siliconix** ## **Mounting LITTLE FOOT TSOP-6 Power MOSFETs** Surface mounted power MOSFET packaging has been based on integrated circuit and small signal packages. Those packages have been modified to provide the improvements in heat transfer required by power MOSFETs. Leadframe materials and design, molding compounds, and die attach materials have been changed. What has remained the same is the footprint of the packages. Since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. The basis of the pad design for surface mounted power MOSFET is the basic footprint for the package. For the TSOP-6 package outline drawing see http://www.vishay.com/doc?71200 and see http://www.vishay.com/doc?72610 for the minimum pad footprint. In converting the footprint to the pad set for a power MOSFET, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. ## REFLOW SOLDERING In the case of the TSOP-6 package, the electrical connections are very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and are connected together. For a small signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. Vishay Siliconix surface-mount packages meet solder reflow reliability requirements. Devices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, HAST, or pressure pot. The solder reflow temperature profile used, and the temperatures and time duration, are shown in Figures 2 and 3. Figure 1 shows the copper spreading recommended footprint for the TSOP-6 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlays the basic pattern on pins 1,2,5, and 6. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. Notice that the planar copper is shaped like a “T” to move heat away from the drain leads in all directions. This pattern uses all the available area underneath the body for this purpose. **==> picture [177 x 107] intentionally omitted <==** **----- Start of picture text -----**<br> 0.167<br>4.25<br>0.074<br>1.875<br>0.014 0.122<br>0.35 = — 3.1<br>oo<br>0.026<br>0.65<br>L of ea fo<br>0.049 0.049 0.010<br>1.25 1.25 0.25<br>**----- End of picture text -----**<br> **FIGURE 1.** Recommended Copper Spreading Footprint Ramp-Up Rate +6 C/Second Maximum Temperature @ 155 15 C 120 Seconds Maximum ~~ee~~ Temperature Above 180 C 70 − 180 Seconds ~~ee ee~~ Maximum Temperature 240 +5/ − 0 C ~~ee~~ Time at Maximum Temperature 20 − 40 Seconds Ramp-Down Rate +6 C/Second Maximum **FIGURE 2.** Solder Reflow Temperature Profile Document Number: 71743 27-Feb-04 www.vishay.com **1** ## **AN823** ~~a~~ **Vishay Siliconix** **==> picture [358 x 123] intentionally omitted <==** **----- Start of picture text -----**<br> 10 s (max)<br>255 − 260 C<br>1 4 C/s (max) 3-6 C/s (max)<br>217 . C<br>140 − 170 o C e | |<br>60 s (max)<br>3 C/s (max) 60-120 s (min) Reflow Zone<br>| Maximum peak temperature at 240Pre-Heating Zone 1 C is allowed. |<br>**----- End of picture text -----**<br> **FIGURE 3.** Solder Reflow Temperature and Time Durations ## THERMAL PERFORMANCE A basic measure of a device’s thermal performance is the junction-to-case thermal resistance, R jc, or the junction-to-foot thermal resistance, R jf. This parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other yo words, independent of the properties of the object to which the device is mounted. Table 1 shows the thermal performance of the TSOP-6. **==> picture [242 x 47] intentionally omitted <==** **----- Start of picture text -----**<br> TABLE 1.<br>Equivalent Steady State Performance—TSOP-6<br>————— Thermal Resistance R jf 30 C/W<br>**----- End of picture text -----**<br> ## SYSTEM AND ELECTRICAL IMPACT OF TSOP-6 **==> picture [218 x 192] intentionally omitted <==** **----- Start of picture text -----**<br> On-Resistance vs. Junction Temperature<br>1.6<br>VGS = 4.5 V<br>ID = 6.1 A<br>1.4<br>Le<br>1.2<br>BREEDER<br>1.0<br>0.8<br>ann<br>0.6 anne<br>− 50 − 25 0 25 50 75 100 125 150<br>TJ − Junction Temperature ( C)<br> On-Resiistance<br>−<br>(Normalized)<br>rDS(on)<br>**----- End of picture text -----**<br> **FIGURE 4.** Si3434DV In any design, one must take into account the change in MOSFET rDS(on) with temperature (Figure 4). Document Number: 71743 27-Feb-04 www.vishay.com **2** **Application Note 826** Vishay Siliconix **==> picture [59 x 50] intentionally omitted <==** ## **RECOMMENDED MINIMUM PADS FOR TSOP-6** **==> picture [232 x 299] intentionally omitted <==** **----- Start of picture text -----**<br> 0.099<br>(2.510)<br>0.039 0.020 0.019<br>(1.001) (0.508) (0.493)<br>Recommended Minimum Pads<br>Dimensions in Inches/(mm)<br>0.119 (3.023) 0.064 (1.626)<br>0.028 (0.699)<br>**----- End of picture text -----**<br> Return to Ind ~~ex~~ Return to Index www.vishay.com 26 Document Number: 72610 Revision: 21-Jan-08 **Legal Disclaimer Notice** Vishay www.vishay.com **==> picture [59 x 48] intentionally omitted <==** ## **Disclaimer** ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. ## **Material Category Policy** **Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant.** **Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.** **Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards.** Revision: 02-Oct-12 Document Number: 91000 **1**
Updated at June 9, 2026
Vishay is a global leader in the manufacturing of discrete semiconductors and passive electronic components. Renowned for its exceptional quality and engineering expertise, the company produces highly reliable solutions that drive innovation across the industrial, automotive, telecommunications, and consumer electronics markets. From advanced factory automation to vehicle electrification, Vishay components provide the foundational building blocks for modern electronic design. The company's expansive portfolio is heavily focused on efficient power management, signal routing, and energy storage. Within its passive component lineup, Vishay is recognized for its extensive array of high-performance capacitors, including robust aluminium electrolytic, film, and polymer variants, alongside highly efficient power inductors. In the realm of discrete semiconductors, Vishay is a premier manufacturer of single and dual MOSFETs, as well as a vast selection of Schottky, Zener, and fast-recovery rectifier diodes designed for demanding power applications. Furthermore, Vishay delivers industry-leading circuit protection and thermal management solutions. With a broad offering of transient voltage suppressors (TVS diodes) and temperature-sensing NTC thermistors, these components are engineered to safeguard sensitive circuitry against both electrical and thermal overstress. By combining this vital mix of advanced discretes and passives, Vishay enables engineers to develop robust, space-saving, and highly resilient electronic systems.
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