SI3443DV

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April 2001<br>**----- End of picture text -----**<br>


## **Si3443DV** 

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P-Channel 2.5V Specified PowerTrench   MOSFET<br>**----- End of picture text -----**<br>


Ω Ω 

||**S**||||||||||||||
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||**D**||||1|||||||6|||
||**D**||||||||||||||
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||©.<br>Me.||||2|||||||5|||
|**D**<br>**D**<br>**G**<br>**SuperSOT   -6**<br>**TM**<br>Cu|||||**3**|||||||4|||
|**Absolute Maximum Ratings**TA= 25°C unless otherwise noted||= 25°C unless otherwise noted|||||||||||||
|**Symbol**|**Parameter**||||||**Ratings**|||||||**Units**|
|VDSS|Drain-Source Voltage|||||||-20||||||V|
|VGSS|Gate-Source Voltage|||||||±8||||||V|
|ID|Drain Current<br>- Continuous||(Note 1)||||||-4|||||A|
||Drain Current<br>- Pulsed|- Pulsed|- Pulsed(Note 1a)|||||-20|||||||
|PD|Power Dissipation for Single Operation||(Note 1a)|||||1.6||||||W|
||||(Note 1b)|||||0.8|||||||
|TJ, Tstg|Operating and Storage Junction Temperature Range||||||-55 to +150|||||||°C|
|**Thermal Characteristics**|||||||||||||||
|RθJA|Thermal Resistance, Junction-to-Ambient||(Note 1a)|||||78||||||°C/W|
|RθJC|Thermal Resistance, Junction-to-Case||(Note 1)|||||30||||||°C/W|
|**Package Outlines and Ordering Information**|||||||||||||||
|**Device Markin**|**Device Marking**<br>**Device**||**Reel Size**||||**Tape Width**||||||**Quantity**||
|.443<br>Si3443DV|||7’’||||8mm||||||3000 units||



2001 Fairchild Semiconductor Corporation 

Si3443DV, REV A 

## **Electrical Characteristics** TA = 25°C unless otherwise noted 

|**Symbol**<br>**Parameter**<br>**Off Characteristics**|**Symbol**<br>**Parameter**<br>**Off Characteristics**|**Test Conditions**|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|
|BVDSS|Drain-Source Breakdown Voltage|VGS= 0 V, ID= -250µA|-20|||V|
|∆BVDSS|Breakdown Voltage Temperature|ID= -250µA, Referenced to 25°C||-16||mV/°C|
|∆TJ|Coefficient||||||
|IDSS|Zero Gate Voltage Drain Current|VDS= -16 V, VGS= 0 V|||-1|µA|
|IGSSF|Gate-Body Leakage Current, Forward|VGS= 8 V, VDS= 0 V|||100|nA|
|IGSSR|Gate-Body Leakage Current, Reverse|VGS= -8 V, VDS= 0 V|||-100|nA|
|**On Characteristics** (Note 2)|||||||
|VGS(th)|Gate Threshold Voltage|VDS= VGS, ID= -250µA|-0.4|-0.7|-1.5|V|
|∆VGS(th)|Gate Threshold Voltage|ID= -250µA, Referenced to 25°C||2.5||mV/°C|
|∆TJ|Temperature Coefficient||||||
|RDS(on)|Static Drain-Source|VGS= -4.5 V, ID= -4 A||0.054|0.065|Ω|
||On-Resistance|VGS= -4.5 V, ID= -4 A, TJ=125°C||0.076|0.105||
|||VGS = -2.5 V, ID = -3.2 A||0.077|0.100||
|ID(on)|On-State Drain Current|VGS= -4.5 V, VDS= -5 V|-10|||A|
|gFS|Forward Transconductance|VDS= -5 V, ID= -4 A||9||S|
|**Dynamic Characteristics**|||||||
|Ciss|Input Capacitance|VDS= -10 V, VGS= 0 V||640||pF|
|Coss|Output Capacitance|f = 1.0 MHz||180||pF|
|Crss|Reverse Transfer Capacitance|||90||pF|
|**Switching Characteristics** (Note 2)|||||||
|td(on)|Turn-On Delay Time|VDD= -10 V, ID= -1 A||11|20|ns|
|tr|Turn-On Rise Time|VGS= -4.5 V, RGEN= 6Ω||19|30|ns|
|td(off)|Turn-Off Delay Time|||26|42|ns|
|tf|Turn-Off Fall Time|||35|55|ns|
|Qg|Total Gate Charge|VDS= -10 V, ID= -4 A||7.2|10|nC|
|Qgs|Gate-Source Charge|VGS= -4.5 V,||1.7||nC|
|Qgd|Gate-Drain Charge|||1.6||nC|
|**Drain-Source Diode Characteristics and Maximum Ratings**|||||||
|IS|Maximum Continuous Drain-Source Diode Forward Current||||-1.3|A|
|VSD|Drain-Source Diode Forward Voltage|VGS= 0 V, IS= -1.3 A(Note 2)||-0.75|-1.2|V|



1.R θ JA is the sumof the junction-to-case and case-to-ambient thermal resistance where the case of the drain pins. R θ Jc is guaranteed by design while R θ CA is determined by the user's board design. 

° ° 

Si3443DV, REV A 

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20 1.6<br>VGS = -4.5V<br>-3.5V<br>-3.0V VGS = -2.5V<br>15 1.4<br>-2.5V<br>-3.0V<br>10 1.2<br>-3.5V<br>-2.0V<br>-4.0V<br>-4.5V<br>5 1<br>-1.5V<br>0 0.8<br>0 1 2 3 4 5 0 4 8 12 16 20<br>-VDS, DRAIN-SOURCE VOLTAGE (V) - ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation<br>with Drain Current and Gate Voltage.<br>1.5 0.25<br>1.4     V IDGS = - 4A  = - 4.5V ID = -2A<br>0.2<br>1.3<br>1.2 0.15<br>1.1<br>0.1<br>1<br>TA = 125 [o] C<br>0.9 0.05 TA = 25 [o] C<br>0.8<br>0.7 0<br>-50 -25 0 25 50 75 100 125 150 1 2 3 4 5<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation<br>with Temperature. with Gate-to-Source Voltage.<br>10 100<br>VDS = -5V TA = -55 [o] C 25 [o] C VGS = 0V<br>8 10 e e<br>LY =<br>125 [o] C<br>6 1 _ T = 125 [o] C<br>ne A 25 [o] C<br>4 ee) 0.1 L ef ae -55 [o] e C eee eeed<br>20 A 0.0010.01 =<br>0.4 0.8 1.2 1.6 2 2.4 0 0.2 0.4 0.6 0.8 1 1.2 1.4<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>, NORMALIZED<br>DS(ON)<br>R<br>, DRAIN-SOURCE CURRENT (A)-ID DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)-ID<br>, REVERSE DRAIN CURRENT (A)-IS<br>**----- End of picture text -----**<br>


Si3443DV, REV A 

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5 1250<br>ID = -4A VDS = -5V-10V f = 1 MHzVGS = 0 V<br>4 -15V 1000<br>3 Y 750<br>Of KR |<br>2 500 \ | CISS __<br>Y,Gf \ [o] [o] [o] SE<br>1 7A 250 N e<br>COSS<br>CRSS<br>0 / 0 —————————<br>Yy | [| | | | —<br>0 2 4 6 8 10 0 5 10 15 20<br>Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate-Charge Characteristics Figure 8. Capacitance Characteristics<br>100 5<br>SINGLE PULSE<br>RθJA = 156 [o] C/W<br>10 Sea RDS(ON a ) LIMIT 100µs Coo 4 NI]\ T A  = 25 [o] C<br>Nf nee | | \<br>1ms<br>SSSTP 10ms SesNo 3 LIN I yl<br>1 100ms<br>1s<br>V GS = -4.5V DC 2<br>0.1 see SINGLE PULSE SINsee |  CMTC NN<br>RθJA= 156 [o] C/W TI 1 NA<br>TA= 25 [o] C<br>0.01 SSSeeee 0 LLLIMMA<br>0.1 1 10 100 0.1 1 10 100 1000<br>-VDS, DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC)<br>Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum<br>Power Dissipation<br>1<br>0.5 EA  D = 0.5  EE et Vr R       (t) = r(t)  *  R            R        = 156°C/WθJAθJA θJA i<br>0.2   0.2   ee eee 7 |<br>0.1 |  0.1  P(pk) |<br>0.05 ==  0.05  Fo  t  1  t    2<br>[a  0.02  Perr _<br>0.02  0.01  T  - T    = P  * R       (t)J A θJA<br>Saar ee tn Duty Cycle, D = t  / t1 2 |<br>0.01  Single Pulse<br>mannii ol i<br>0.005 =<br>0.00001 0.0001 0.001 0.01 0.1 1 10 100 300<br>t  , TIME (sec)1<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>-V<br>POWER (W)<br>, DRAIN CURRENT (A)-ID<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


Si3443DV, REV A 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

|ACEx™|FAST<br>|PACMAN™||SuperSOT™-3|
|---|---|---|---|---|
|Bottomless™|FASTr™|POP™||SuperSOT™-6|
|CoolFET™|GlobalOptoisolator™|PowerTrench<br>||SuperSOT™-8|
|_CROSSVOLT_™|GTO™|QFET™||SyncFET™|
|DenseTrench™|HiSeC™|QS™||TinyLogic™|
|DOME™|ISOPLANAR™|QT Optoelectronics™||UHC™|
|EcoSPARK™|LittleFET™|Quiet Series™||UltraFET<br>|
|E2CMOSTM|MicroFET™|SILENT SWITCHER||VCX™|
|EnSignaTM|MICROWIRE™|SMART START™|||
|FACT™|OPTOLOGIC™|Star* Power™|||
|FACT Quiet Series™|OPTOPLANAR™|Stealth™|||



## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. 

## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

|**Datasheet Identification**|**Product Status**|**Definition**|
|---|---|---|
|Advance Information|Formative or<br>In Design|This datasheet contains the design specifications for<br>product development. Specifications may change in<br>any manner without notice.|
|Preliminary|First Production|This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.|
|No Identification Needed|Full Production|This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.|
|Obsolete|Not In Production|This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.|



Rev. H1