SI1869DH-T1-E3
Dual MOSFET, Complementary N and P Channel, 20 V, 20 V, 1.2 A, 1.2 A, 0.132 ohm
- Manufacturer: VISHAY
- Product type: Dual MOSFETs
- Transistor Polarity:N and P Channel; Continuous Drain Current Id:1.2A; Drain Source Voltage Vds:20V; On Resistance Rds(on); Available until stocks are exhausted Alternative available
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (23-Jan-2024)
- No. of Pins: 6Pins
- Channel Type: Complementary N and P Channel
- Product Range: -
- Qualification: -
- Transistor Case Style: SC-70
- Operating Temperature Max: 150°C
- Power Dissipation N Channel: 1W
- Power Dissipation P Channel: 1W
- Drain Source Voltage Vds N Channel: 20V
- Drain Source Voltage Vds P Channel: 20V
- Continuous Drain Current Id N Channel: 1.2A
- Continuous Drain Current Id P Channel: 1.2A
- Drain Source On State Resistance N Channel: 0.132ohm
- Drain Source On State Resistance P Channel: 0.132ohm
| Delivery and price | |
|---|---|
| Units per pack | 500 |
| Price | 0.233 € |
| Current stock | 10+ |
| Lead time | 30 days |
**==> picture [506 x 218] intentionally omitted <==** **----- Start of picture text -----**<br> Si1869DH<br>www.vishay.com Vishay Siliconix<br>a a<br>Load Switch with Level-Shift<br>SOT-363 FEATURES<br>SC-70 (6 leads) • TrenchFET [®] power MOSFETs: 1.8 V rated<br>S2<br>4 • ESD protected: 2000 V on input switch, VON/OFF<br>ON/OFF<br>5 • 165 m low RDS(on) RoHS<br>R1, C1<br>6 • 1.8 to 20 V input<br>• 1.5 to 8 V logic level control Available<br>3 • Low profile, small footprint SC-70-6 package<br>2 D2 • Adjustable slew-rate<br>F 1 D2 • Material categorization: for definitions of compliance<br>R2 please see www.vishay.com/doc?99912<br>Top View<br>**----- End of picture text -----**<br> ## **Marking code:** VC ## **PRODUCT SUMMARY** |VD2S2(V)|-20| |---|---| |RDS(on)max. () at VGS= 4.5 V<br>RDS(on)max. () at VGS= 2.5 V|0.165<br>0.222| |RDS(on)max. () at VGS= 1.8 V|0.303| |Configuration|Single| ## **APPLICATIONS** **==> picture [239 x 114] intentionally omitted <==** **----- Start of picture text -----**<br> Si1869DH<br>• Level shift for S2 4 2, 3 D2<br>portable devices Q2<br>6<br>R1,<br>C1<br>5<br>ON/OFF Q1<br>R2 [1]<br>**----- End of picture text -----**<br> ## **ORDERING INFORMATION** |Package|SOT-363| |---|---| |Lead (Pb)-free|Si1869DH-T1-E3| |Lead (Pb)-free and halogen-free|Si1869DH-T1-GE3| ## **ABSOLUTE MAXIMUM RATINGS** (TA = 25 °C, unless otherwise noted) |**ABSOLUTE MAXIMUM RATINGS**(TA = 25 °C, unless otherwise noted)TA = 25 °C, unless otherwise noted)A = 25 °C, unless otherwise noted)= 25 °C, unless otherwise noted), unless otherwise noted)unless otherwise noted))|**ABSOLUTE MAXIMUM RATINGS**(TA = 25 °C, unless otherwise noted)TA = 25 °C, unless otherwise noted)A = 25 °C, unless otherwise noted)= 25 °C, unless otherwise noted), unless otherwise noted)unless otherwise noted))|**ABSOLUTE MAXIMUM RATINGS**(TA = 25 °C, unless otherwise noted)TA = 25 °C, unless otherwise noted)A = 25 °C, unless otherwise noted)= 25 °C, unless otherwise noted), unless otherwise noted)unless otherwise noted))|**ABSOLUTE MAXIMUM RATINGS**(TA = 25 °C, unless otherwise noted)TA = 25 °C, unless otherwise noted)A = 25 °C, unless otherwise noted)= 25 °C, unless otherwise noted), unless otherwise noted)unless otherwise noted))|**ABSOLUTE MAXIMUM RATINGS**(TA = 25 °C, unless otherwise noted)TA = 25 °C, unless otherwise noted)A = 25 °C, unless otherwise noted)= 25 °C, unless otherwise noted), unless otherwise noted)unless otherwise noted))| |---|---|---|---|---| |**PARAMETER**||**SYMBOL**|**LIMIT**|**UNIT**| |Drain-source voltage (D2-S2)||VDS|-20|V| |Input voltage||VIN|20|| |ON/OFF voltage||VON/OFF|8|| |Load current|Continuousa, b|IL|± 1.2|A| ||Pulsedb, c||± 3|| |Continuous intrinsic diode conductiona||IS|-0.4|| |Maximum power dissipationa||PD|1|W| |Operatingjunction and storage temperature range||TJ, Tstg|-55 to +150|°C| |ESD rating, MIL-STD-883D human body model (100 pF, 1500)||ESD|2|kV| ## **THERMAL RESISTANCE RATINGS** |**PARAMETER**|**SYMBOL**|**TYPICAL**|**MAXIMUM**|**UNIT**| |---|---|---|---|---| |Maximum junction-to-ambient (continuous current)a|RthJA|100|125|°C/W| |Maximum junction-to-foot (Q2)|RthJF|44|55|| ## **Notes** a. Surface mounted on FR4 board - b. VIN = 20 V, VON/OFF = 8 V, TA = 25 °C c. Pulse test: pulse width 300 μs, duty cycle 2 % S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 **1** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si1869DH** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** www.vishay.com |**SPECIFICATIONS**(TA= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TA= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TA= 25 °C,unless otherwise noted)||||| |---|---|---|---|---|---|---| |**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**|**MIN.**|**TYP.**|**MAX.**|**UNIT**| |**OFF Characteristics**||||||| |Reverse leakage current|IFL|VIN= 8 V, VON/OFF= 0 V|-|-|1|μA| |Diode forward voltage|VSD|IS= -0.4 A|0.4|0.6|1.1|V| |**ON Characteristics**||||||| |Input voltage rangea|VIN||1.8|-|20|V| |Drain to source breakdown voltage<br>(p-channel)|VDS|VGS= 0 V, ID= -250 μA|-20|-|-|| |On-resistance (p-channel) at 1 A|RDS(on)|VON/OFF= 1.5 V, VIN= 4.5 V, ID= 1.2 A|-|0.132|0.165|| |||VON/OFF= 1.5 V, VIN= 2.5 V, ID= 1 A|-|0.177|0.222|| |||VON/OFF= 1.5 V, VIN= 1.8 V, ID= 0.7 A|-|0.242|0.303|| |On-state (p-channel) drain-current|ID(on)|VIN-OUT 0.2 V, VIN= 5 V, VON/OFF= 1.5 V|1|-|-|A| |||VIN-OUT 0.3 V, VIN= 3 V, VON/OFF= 1.5 V|1|-|-|| ## **Note** a. VIN = < 12 V, VON/OFF = 8 V, TA = 25 °C; recommended application specifications _Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability._ ## **APPLICATION CIRCUITS** **==> picture [231 x 201] intentionally omitted <==** **----- Start of picture text -----**<br> Si1869DH<br>4 2, 3<br>VIN VOUT<br>Q2<br>R1 C1<br>6 6<br>5<br>ON/OFF<br>Co LOAD<br>Q1<br>Ci<br>1<br>R2<br>R2 GND<br>**----- End of picture text -----**<br> **==> picture [217 x 227] intentionally omitted <==** **----- Start of picture text -----**<br> 40<br>tf<br>35<br>30 IL = 1 A<br>VON/OFF = 3 V<br>Ci = 10 µF<br>25 C o = 1 µF<br>20<br>15 td(off)<br>10<br>5<br>tr td(on)<br>0<br>0 2 4 6 8 10<br>R2 (kΩ)<br>Note: For R2 switching variations with other VIN/R1<br>combinations see Typical Characteristics<br>Switching Variation<br>R2 at VIN = 2.5 V, R1 = 20 k <br>µs)(<br>Time<br>**----- End of picture text -----**<br> ## **COMPONENTS** |**COMPONENTS**|**COMPONENTS**|**COMPONENTS**| |---|---|---| |R1|Pull-Up Resistor|Typical 10 kto 1 M a| |R2|Optional Slew-Rate Control|Typical 0 to 100 k a| |C1|Optional Slew-Rate Control|Typical 1000 pF| The Si1869DH is ideally suited for high-side load switching in portable applications. The integrated n-channel level-shift device saves space by reducing external components. The slew rate is set externally so that rise-times can be tailored to different load types. ## **Note** a. Minimum R1 value should be at least 10 x R2 to ensure Q1 turn-on S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 **2** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si1869DH** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** **==> picture [77 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> www.vishay.com<br>**----- End of picture text -----**<br> ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [199 x 172] intentionally omitted <==** **----- Start of picture text -----**<br> 0.6<br>VON/OFF = 1.5 V to 8 V<br>0.5<br>0.4<br>0.3 TJ = 125 ° C<br>TJ = 25 °C<br>0.2<br>0.1<br>0.0<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0<br>IL (A)<br>(V)<br>DROP<br>V<br>**----- End of picture text -----**<br> **VDROP vs. IL at VIN = 4.5 V** **==> picture [197 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> 0.6<br>VON/OFF = 1.5 V to 8 V<br>0.5<br>0.4<br>TJ = 125 °C<br>0.3<br>0.2<br>TJ = 25 °C<br>0.1<br>0.0<br>0.0 0.5 1.0 1.5 2.0 2.5<br>IL (A)<br>(V)<br>DROP<br>V<br>**----- End of picture text -----**<br> **VDROP vs. IL at VIN = 2.5 V** **==> picture [197 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> 0.6<br>VON/OFF = 1.5 V to 8 V<br>0.5<br>0.4<br>TJ = 125 °C<br>0.3<br>TJ = 25 °C<br>0.2<br>0.1<br>0.0<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>IL (A)<br>(V)<br>DROP<br>V<br>**----- End of picture text -----**<br> **VDROP vs. IL at VIN = 1.8 V** **==> picture [201 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> 0.10<br>IL = 0.7 A<br>VON/OFF = 1.5 V to 8 V<br>0.06<br>VIN = 1.8 V<br>0.02 VIN = 4.5 V<br>- 0.02<br>- 0.06<br>- 0.10<br>- 50 - 25 0 25 50 75 100 125 150<br>TJ - Junction Temperature (°C)<br>Variance (V)<br>DROP<br>V<br>**----- End of picture text -----**<br> **VDROP Variance vs. Junction Temperature** **==> picture [196 x 382] intentionally omitted <==** **----- Start of picture text -----**<br> 0.5<br>VON/OFF = 1.5 V to 8 V<br>0.4<br>0.3<br>0.2 T J = 125 °C<br>0.1<br>TJ = 25 °C<br>0.0<br>0 1 2 3 4 5 6<br>VIN (V)<br>VDROP vs. VIN at IL = 0.7 A<br>0.5<br>IL = 0.7 A<br>VON/OFF = 1.5 V to 8 V<br>0.4<br>0.3<br>TJ = 125 °C<br>0.2<br>TJ = 25 °C<br>0.1<br>0.0<br>0 1 2 3 4 5 6<br>VIN (V)<br>(V)<br>DROP<br>V<br>)Ω<br>- On-Resistance (<br>SS(on)<br>R<br>**----- End of picture text -----**<br> **On-Resistance vs. Input Voltage** Document Number: 73449 S18-0276-Rev. D, 12-Mar-18 **3** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si1869DH** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** **==> picture [77 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> www.vishay.com<br>**----- End of picture text -----**<br> ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [198 x 171] intentionally omitted <==** **----- Start of picture text -----**<br> 1.6<br>IL = 0.7 A<br>1.4 VON/OFF = 1.5 V to 8 V VIN = 4.5 V<br>VIN = 1.8 V<br>1.2<br>1.0<br>0.8<br>0.6<br>- 50 - 25 0 25 50 75 100 125 150<br>TJ - Junction Temperature (°C)<br> - On-Resistance (Normalized)<br>DS(on)<br>R<br>**----- End of picture text -----**<br> ## **Normalized On-Resistance vs. Junction Temperature** **==> picture [194 x 168] intentionally omitted <==** **----- Start of picture text -----**<br> 20<br>16 td(off)<br>tf<br>12<br>IL = 1 A<br>VON/OFF = 3 V<br>8 Ci = 10 µF<br>Co = 1 µF<br>4<br>tr<br>td(on)<br>0<br>0 2 4 6 8 10<br>R2 (kΩ)<br>µs)(<br>Time<br>**----- End of picture text -----**<br> **Switching Variation R2 at VIN = 4.5 V, R1 = 20 k** **==> picture [200 x 378] intentionally omitted <==** **----- Start of picture text -----**<br> 40<br>tf<br>35<br>IL = 1 A<br>30 VON/OFF = 3 V<br>Ci = 10 µF<br>25 Co = 1 µF<br>20<br>15 td(off)<br>10<br>5<br>tr td(on)<br>0<br>0 2 4 6 8 10<br>R2 (kΩ)<br>Switching Variation R2 at VIN = 2.5 V, R1 = 20 kIN = 2.5 V, R1 = 20 k = 2.5 V, R1 = 20 k <br>250<br>td(off)<br>200<br>150 IL = 1 A<br>VON/OFF = 3 V<br>Ci = 10 µF<br>100 Co = 1 µF<br>tf<br>50<br>tr<br>td(on)<br>0<br>0 20 40 60 80 100<br>R2 (kΩ)<br>µs)(<br>Time<br>(µs)<br>Time<br>**----- End of picture text -----**<br> **Switching Variation R2 at VIN = 2.5 V, R1 = 20 kIN = 2.5 V, R1 = 20 k = 2.5 V, R1 = 20 k** **Switching Variation R2 at VIN = 4.5 V, R1 = 300 k** **==> picture [195 x 169] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>80 tf<br>IL = 1 A<br>VON/OFF = 3 V<br>60 C i = 10 µF<br>Co = 1 µF<br>40<br>20 td(off)<br>tr td(on)<br>0<br>0 2 4 6 8 10<br>R2 (kΩ)<br>µs)(<br>Time<br>**----- End of picture text -----**<br> **Switching Variation R2 at VIN = 1.8 V, R1 = 20 k** **==> picture [197 x 169] intentionally omitted <==** **----- Start of picture text -----**<br> 200<br>td(off)<br>150 IL = 1 A<br>VON/OFF = 3 V<br>Ci = 10 µF<br>Co = 1 µF<br>100<br>tf<br>50<br>td(on)<br>0 tr<br>0 20 40 60 80 100<br>R2 (kΩ)<br>(µs)<br>Time<br>**----- End of picture text -----**<br> **Switching Variation R2 at VIN = 2.5 V, R1 = 300 k** S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 **4** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 **Si1869DH** Vishay Siliconix **==> picture [59 x 48] intentionally omitted <==** www.vishay.com ## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) **==> picture [200 x 168] intentionally omitted <==** **----- Start of picture text -----**<br> 200<br>td(off)<br>150 IL = 1 A<br>VON/OFF = 3 V<br>Ci = 10 µF<br>Co = 1 µF<br>100 t f<br>50<br>td(on)<br>0 tr<br>0 20 40 60 80 100<br>R2 (kΩ)<br>µs)(<br>Time<br>**----- End of picture text -----**<br> **Switching Variation R2 at VIN = 1.8 V, R1 = 300 k** **==> picture [435 x 387] intentionally omitted <==** **----- Start of picture text -----**<br> 2<br>1<br>Duty Cycle = 0.5<br>0.2<br>Notes:<br>0.1<br>0.1 PDM<br>0.05<br>t 1<br>0.02 1. Duty Cycle, D =t2 tt12<br>2. Per Unit Base = RthJA = 100 °C/W<br>3. TJM - TA = PDMZthJA [(t)]<br>Single Pulse 4. Surface Mounted<br>0.01<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 100 600<br>Square Wave Pulse Duration (s)<br>Normalized Thermal Transient Impedance, Junction-to-Ambient<br>2<br>1<br>Duty Cycle = 0.5<br>0.2<br>0.1<br>0.1<br>0.05<br>0.02<br>Single Pulse<br>0.01<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10<br>Square Wave Pulse Duration (s)<br>Normalized Thermal Transient Impedance, Junction-to-Foot<br>Thermal Impedance<br>Normalized Effective Transient<br>Thermal Impedance<br>Normalized Effective Transient<br>**----- End of picture text -----**<br> _Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73449._ S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 **5** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 ## ~~a~~ **Package Information Vishay Siliconix** **==> picture [482 x 192] intentionally omitted <==** **----- Start of picture text -----**<br> 6 5 4 E1 E oteeee DimAA1 ee Min 0.90– Nom –– Max 1.100.10 0.035 Min – Nom –– ee Max 0.0430.004<br>1 2 3 a A2 0.80 – 1.00 0.031 – 0.039<br>-B- ee b 0.15 – 0.30 0.006 – 0.012<br>ee c 0.10 – 0.25 0.004 – 0.010<br>e b<br>e1 ee D 1.80 2.00 2.20 0.071 0.079 0.087<br>a ee E 1.80 2.10 2.40 0.071 0.083 0.094<br>D -A-<br>- c ee E1 1.15 1.25 1.35 0.045 0.049 0.053<br>a e 0.65BSC 0.026BSC<br>A2 A ee e1 1.20 1.30 1.40 0.047 0.051 0.055<br>ee L 0.10 0.20 0.30 0.004 0.008 0.012<br>We | L ee 7 Nom 7 Nom<br>A1 ECN: S-03946—Rev. B, 09-Jul-01<br>DWG: 5550<br>**----- End of picture text -----**<br> Document Number: 71154 06-Jul-01 www.vishay.com **1** **AN816** # **Vishay Siliconix** ## **Dual-Channel LITTLE FOOT** ® **6-Pin SC-70 MOSFET Copper Leadframe Version Recommended Pad Pattern and Thermal Performance** ## INTRODUCTION The new dual 6-pin SC-70 package with a copper leadframe enables improved on-resistance values and enhanced thermal performance as compared to the existing 3-pin and 6-pin packages with Alloy 42 leadframes. These devices are intended for small to medium load applications where a miniaturized package is required. Devices in this package come in a range of on-resistance values, in n-channel and p-channel versions. This technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for the dual-channel version. ## PIN-OUT Figure 1 shows the pin-out description and Pin 1 identification for the dual-channel SC-70 device in the 6-pin configuration. Both n-and p-channel devices are available in this package – the drawing example below illustrates the p-channel device. **==> picture [113 x 132] intentionally omitted <==** **----- Start of picture text -----**<br> SOT-363<br>SC-70 (6-LEADS)<br>S1 1 6 D1<br>G1 2 5 G2<br>D2 3 4 S2<br>t e<br>Top View<br>FIGURE 1.<br>**----- End of picture text -----**<br> **==> picture [216 x 239] intentionally omitted <==** **----- Start of picture text -----**<br> 87 (mil)<br>26 (mil)<br>6 5 4<br>96 (mil)<br>71 (mil)<br>aay<br>48 (mil)<br>23 (mil) 61 (mil)<br>1 2 3<br>0.0 (mil)<br>“gon<br>8 (mil)<br>26 (mil)<br>16 (mil)<br>FIGURE 2. SC-70 (6 leads) Dual<br>**----- End of picture text -----**<br> ## EVALUATION BOARD FOR THE DUALCHANNEL SC70-6 The 6-pin SC-70 evaluation board (EVB) shown in Figure 3 measures 0.6 in. by 0.5 in. The copper pad traces are the same as described in the previous section, _Basic Pad Patterns_ . The board allows for examination from the outer pins to the 6-pin DIP connections, permitting test sockets to be used in evaluation testing. For package dimensions see outline drawing SC-70 (6-Leads) (http://www.vishay.com/doc?71154) The thermal performance of the dual 6-pin SC-70 has been measured on the EVB, comparing both the copper and Alloy 42 leadframes. This test was then repeated using the 1-inch[2] PCB with dual-side copper coating. ## BASIC PAD PATTERNS See Application Note 826, _Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFET_ s, (http://www.vishay.com/doc?72286) for the SC-70 6-pin basic pad layout and dimensions. This pad pattern is sufficient for the low-power applications for which this package is intended. Increasing the drain pad pattern (Figure 2) yields a reduction in thermal resistance and is a preferred footprint. A helpful way of displaying the thermal performance of the 6-pin SC-70 dual copper leadframe is to compare it to the traditional Alloy 42 version. Document Number: 71405 12-Dec-03 www.vishay.com **1** **AN816** ~~CCNISSHA~~ Y **Vishay Siliconix** **==> picture [117 x 132] intentionally omitted <==** **----- Start of picture text -----**<br> Front of Board SC70-6<br>S1 D1<br>G1 G2<br>a \ Le.<br>ei He<br>D2 S2<br>eo e<br>SC70 − 6 DUAL<br>**----- End of picture text -----**<br> **==> picture [84 x 7] intentionally omitted <==** **----- Start of picture text -----**<br> Back of Board SC70-6<br>**----- End of picture text -----**<br> **==> picture [110 x 18] intentionally omitted <==** **----- Start of picture text -----**<br> vishay.com<br>**----- End of picture text -----**<br> **FIGURE 3.** ## THERMAL PERFORMANCE ## **Junction-to-Foot Thermal Resistance (the Package Performance)** Thermal performance for the dual SC-70 6-pin package is measured as junction-to-foot thermal resistance, in which the “foot” is the drain lead of the device as it connects with the body. The junction-to-foot thermal resistance for this device is typically 80 . C/W, with a maximum thermal resistance of approximately 100 C/W. This data compares favorably with another compact, dual-channel package – the dual TSOP-6 – which features a typical thermal resistance of 75 C/W and a maximum of 90 C/W. **==> picture [241 x 104] intentionally omitted <==** **----- Start of picture text -----**<br> CP COOPER LEADFRAME<br>Room Ambient 25 C Elevated Ambient 60 C<br>ee ee<br>PD - —,— TJ(max)R JA TA PD oo TJ(max)R JA TA<br>PD - 150224 [o] C [o] 7 C 25W [o] C PD ae 150224 [o] C [o] C 60W [o] C<br>PD 558 mW PD 402 mW<br>**----- End of picture text -----**<br> Although they are intended for low-power applications, devices in the 6-pin SC-70 dual-channel configuration will handle power dissipation in excess of 0.5 W. ## TESTING ## **Power Dissipation** The typical R θ JA for the dual-channel 6-pin SC-70 with a copper leadframe is 224 C/W steady-state, compared to 413 C/W for the Alloy 42 version. All figures are based on the 1-inch[2] FR4 test board. The following example shows how the thermal resistance impacts power dissipation for the dual 6-pin SC-70 package at varying ambient temperatures. ## _**Alloy 42 Leadframe**_ |ALLOY 42 LEADFRAME<br>~~CP~~<br>~~ee~~|ALLOY 42 LEADFRAME<br>~~CP~~<br>~~ee~~| |---|---| |**Room Ambient 25 C**<br>~~ee~~|**Elevated Ambient 60 C**| |PD<br>TJ(max)<br>TA<br>R JA<br>PD<br>150oC<br>25oC<br>413oC W<br>PD<br>303 mW<br>~~ee~~<br>= ~~——~~<br>—|PD<br>TJ(max)<br>TA<br>R JA<br>PD<br>150oC<br>60oC<br>413oC W<br>PD<br>218 mW<br>_ ~~——~~<br>-| To further aid the comparison of copper and Alloy 42 leadframes, Figures 4 and 5 illustrate the dual-channel 6-pin SC-70 thermal performance on two different board sizes and pad patterns. The measured steady-state values of R θ JA for the dual 6-pin SC-70 with varying leadframes are as follows: |LITTLE FOOT 6-PIN SC-70<br>~~Cd~~<br>~~es~~|LITTLE FOOT 6-PIN SC-70<br>~~Cd~~<br>~~es~~|LITTLE FOOT 6-PIN SC-70<br>~~Cd~~<br>~~es~~| |---|---|---| |~~ee~~|**Alloy 42**<br>~~ee~~<br>~~es~~<br>~~ee~~|**Copper**<br>~~ee~~<br>~~ee~~| |1) Minimum recommended pad pattern on<br>the EVB board (see Figure 3).<br>~~ee~~|518 C/W<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|344 C/W<br>~~ee~~<br>~~ee~~<br>~~ee~~| |2) Industry standard 1-inch2PCB with<br>maximum copper both sides.<br>~~ee~~|413 C/W<br>~~ee ~~<br>~~ee~~<br>~~ee~~|224 C/W<br> ~~ee~~<br>~~ee~~<br>~~ee~~| The results indicate that designers can reduce thermal resistance ( θ JA) by 34% simply by using the copper leadframe device as opposed to the Alloy 42 version. In this example, a 174 C/W reduction was achieved without an increase in board area. If an increase in board size is feasible, a further 120 C/W ° reduction can be obtained by utilizing a 1-inch[2] . PCB area. The Dual copper leadframe versions have the following suffix: |Dual:<br>Compl.:|Si19xxEDH<br>Si15xxEDH| |---|---| Document Number: 71405 12-Dec-03 www.vishay.com **2** **AN816** **==> picture [486 x 272] intentionally omitted <==** **----- Start of picture text -----**<br> Vishay Siliconix<br>Vv<br>500 500<br>400 400<br>a =n<br>300 300<br>Alloy<br>H Alloy 42 e a 42<br>200 200<br>eae Copper Mo<br>100 100<br>WA 2A fl Copper<br>0 A 0<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 100 1000 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 100 1000<br>Time (Secs) Time (Secs)<br>FIGURE 4. Dual SC70-6 Thermal Performance on EVB FIGURE 5. Dual SC70-6 Comparison on 1-inch [2] PCB<br>Thermal Resistance (C/W) Thermal Resistance (C/W)<br>**----- End of picture text -----**<br> ## **Vishay Siliconix** Document Number: 71405 12-Dec-03 www.vishay.com **3** **Application Note 826** Vishay Siliconix **==> picture [59 x 50] intentionally omitted <==** ## **RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead** **==> picture [178 x 217] intentionally omitted <==** **----- Start of picture text -----**<br> 0.067<br>(1.702)<br>0.016 0.026 0.010<br>(0.406) (0.648) (0.241)<br>0.026 (0.648)<br>0.096 (2.438) 0.045 (1.143)<br>**----- End of picture text -----**<br> **==> picture [95 x 16] intentionally omitted <==** **----- Start of picture text -----**<br> Recommended Minimum Pads<br>Dimensions in Inches/(mm)<br>**----- End of picture text -----**<br> **==> picture [48 x 6] intentionally omitted <==** **----- Start of picture text -----**<br> Return to Index<br>**----- End of picture text -----**<br> Return to Index ## www.vishay.com 18 Document Number: 72602 Revision: 21-Jan-08 **Legal Disclaimer Notice** Vishay www.vishay.com **==> picture [59 x 48] intentionally omitted <==** ## **Disclaimer** ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. _**© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED**_ Revision: 08-Feb-17 Document Number: 91000 **1**
Updated at June 9, 2026
Vishay is a global leader in the manufacturing of discrete semiconductors and passive electronic components. Renowned for its exceptional quality and engineering expertise, the company produces highly reliable solutions that drive innovation across the industrial, automotive, telecommunications, and consumer electronics markets. From advanced factory automation to vehicle electrification, Vishay components provide the foundational building blocks for modern electronic design. The company's expansive portfolio is heavily focused on efficient power management, signal routing, and energy storage. Within its passive component lineup, Vishay is recognized for its extensive array of high-performance capacitors, including robust aluminium electrolytic, film, and polymer variants, alongside highly efficient power inductors. In the realm of discrete semiconductors, Vishay is a premier manufacturer of single and dual MOSFETs, as well as a vast selection of Schottky, Zener, and fast-recovery rectifier diodes designed for demanding power applications. Furthermore, Vishay delivers industry-leading circuit protection and thermal management solutions. With a broad offering of transient voltage suppressors (TVS diodes) and temperature-sensing NTC thermistors, these components are engineered to safeguard sensitive circuitry against both electrical and thermal overstress. By combining this vital mix of advanced discretes and passives, Vishay enables engineers to develop robust, space-saving, and highly resilient electronic systems.
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