SI1302DL-T1-GE3

**Si1302DL** 

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Vishay Siliconix 

## **N-Channel 30-V (D-S) MOSFET** 

|**PRODUCT**|**SUMMARY**|**SUMMARY**|
|---|---|---|
|**VDS (V)**|**RDS(on) (****)**|**ID (A)**|
|30|0.480 at VGS= 10 V|0.64|
||0.700 at VGS= 4.5 V|0.53|



## **FEATURES** 

- **Halogen-free According to IEC 61249-2-21 Definition** 

- TrenchFET[®] Power MOSFET 

- Compliant to RoHS Directive 2002/95/EC 

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## **SC-70 (3-LEADS)** 

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G 1<br>Marking Code<br>KA XX<br>3 D<br>Lot Traceability<br>and Date Code<br>S 2 Part # Code<br>Top View<br>Ordering Information:  Si1302DL-T1-E3 (Lead (Pb)-free)<br>Si1302DL-T1-GE3 (Lead (Pb)-free and Halogen-free)<br>Y<br>Y<br>**----- End of picture text -----**<br>


|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TA= 25 °C, unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|---|---|---|
|**Parameter**||||**Symbol**||**5 s**||**Steady State**||**Unit**|
|Drain-Source Voltage||||VDS|||30|||V|
|Gate-Source Voltage||||VGS|||± 20||||
|Continuous Drain Current (TJ= 150 °C)a||TA= 25 °C||ID||0.64||0.60||A|
|||TA= 70 °C||||0.51||0.48|||
|Pulsed Drain Current||||IDM|||1.5||||
|Continuous Diode Current(Diode Conduction)a||||IS||0.26||0.23|||
|Maximum Power Dissipationa||TA= 25 °C||PD||0.31||0.28||W|
|||TA= 70 °C||||0.20||0.18|||
|OperatingJunction and Storage Temperature Range||||TJ, Tstg|||- 55 to 150|||°C|
||||||||||||
|**THERMAL RESISTANCE RATINGS**|||||||||||
|**Parameter**|||**Symbol**|||**Typical**|**Maximum**||**Unit**||
|Maximum Junction-to-Ambienta|t5 s<br>SteadyState|t5 s|RthJA|||355|400||°C/W||
|||||||380|450||||
|Maximum Junction-to-Foot(Drain)|SteadyState||RthJF|||285|340||||



Notes: 

a. Surface mounted on 1" x 1" FR4 board. 

Document Number: 71249 S10-2140-Rev. F, 20-Sep-10 

www.vishay.com 

1 

**Si1302DL** 

## Vishay Siliconix 

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|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Conditions**|**Min.**|**Typ**|**Max.**|**Unit**|
|**Static**|||||||
|Gate Threshold Voltage|VGS(th)|VDS= VGS, ID= 250 µA|1||3|V|
|Gate-Body Leakage|IGSS|VDS= 0 V, VGS= ± 20 V|||± 100|nA|
|Zero Gate Voltage Drain Current|IDSS|VDS= 30 V, VGS= 0 V|||1|µA|
|||VDS= 30 V, VGS= 0 V, TJ= 70 °C|||5||
|On-State Drain Currenta|ID(on)|VDS= 5 V, VGS= 10 V|1.5|||A|
|Drain-Source On-State Resistancea|RDS(on)|VGS= 10 V, ID= 0.6 A||0.410|0.480||
|||VGS= 4.5 V, ID= 0.2 A||0.600|0.700||
|Forward Transconductancea|gfs|VGS= 15 V, ID= 0.6 A||0.75||S|
|Diode Forward Voltagea|VSD|IS= 0.23 A, VGS= 0 V||0.8|1.2|V|
|**Dynamicb**|||||||
|Total Gate Charge|Qg|VDS= 15 V, VGS= 10 V, ID= 0.6 A||0.86|1.4|nC|
|Gate-Source Charge|Qgs|||0.24|||
|Gate-Drain Charge|Qgd|||0.08|||
|Turn-On Delay Time|td(on)|VDD= 15 V, RL= 30<br>ID 0.5 A, VGEN= 10 V, Rg= 6||5|10|ns|
|Rise Time|tr|||8|15||
|Turn-Off DelayTime|td(off)|||8|15||
|Fall Time|tf|||7|15||
|Source-Drain Reverse Recovery Time|trr|IF= 0.23 A, dI/dt = 100 A/µs||15|30||



Notes: 

a. Pulse test; pulse width  300 µs, duty cycle  2 %. 

b. Guaranteed by design, not subject to production testing. 

_Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability._ 

## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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1.0 1.0<br>0.8 VGS = 10 V thru 4 V 0.8<br>0.6 0.6<br>0.4 0.4<br>3 V TC = 125 °C<br>0.2 0.2<br>25 °C - 55 °C<br>0.0 0.0<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0<br>VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V)<br>Output Characteristics Transfer Characteristics<br>- Drain Current (A) - Drain Current (A)<br>I D I D<br>**----- End of picture text -----**<br>


www.vishay.com 2 

Document Number: 71249 S10-2140-Rev. F, 20-Sep-10 

**Si1302DL** 

Vishay Siliconix 

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## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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1.6<br>1.4<br>1.2<br>1.0<br>0.8 V GS  = 4.5 V<br>0.6<br>VGS = 10 V<br>0.4<br>0.2<br>0.0<br>0.0 0.2 0.4 0.6 0.8 1.0<br>ID - Drain Current (A)<br>)Ω<br>- On-Resistance (<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


## **On-Resistance vs. Drain Current** 

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10<br>VDS = 15 V<br>ID = 0.6 A<br>8<br>6<br>4<br>2<br>0<br>0.0 0.2 0.4 0.6 0.8 1.0<br>Qg - Total Gate Charge (nC)<br>Gate Charge<br>1<br>TJ = 150 °C<br>TJ = 25 °C<br>0.1<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VSD - Source-to-Drain Voltage (V)<br>Source-Drain Diode Forward Voltage<br>- Gate-to-Source Voltage (V)<br>GS<br>V<br>- Source Current (A)<br>I S<br>**----- End of picture text -----**<br>


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60<br>50 C iss<br>40<br>30<br>20 C oss<br>Crss<br>10<br>0<br>0 4 8 12 16 20<br>VDS - Drain-to-Source Voltage (V)<br>Capacitance<br>1.8<br>VGS = 10 V<br>1.6 ID = 0.6 A<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>- 50 - 25 0 25 50 75 100 125 150<br>TJ - Junction Temperature (°C)<br>On-Resistance vs. Junction Temperature<br>1.8<br>1.5<br>1.2<br>ID =  0.6 A<br>0.9<br>0.6<br>0.3<br>0.0<br>0 2 4 6 8 10<br>VGS - Gate-to-Source Voltage (V)<br>C - Capacitance (pF)<br>- On-Resistance<br>(Normalized)<br>DS(on)<br>R<br>)Ω<br>- On-Resistance (<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**On-Resistance vs. Gate-to-Source Voltage** 

Document Number: 71249 S10-2140-Rev. F, 20-Sep-10 

www.vishay.com 

3 

**Si1302DL** 

## Vishay Siliconix 

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## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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0.4 5<br>0.2 4<br>ID = 250 µA<br>0.0 3<br>TA = 25 °C<br>- 0.2 2<br>- 0.4 1<br>- 0.6 0<br>- 50 - 25 0 25 50 75 100 125 150 10 [-2] 10 [-1] 1 10 100 600<br>TJ - Temperature (°C) Time (s)<br>Threshold Voltage Single Pulse Power<br>2<br>1<br>Duty Cycle = 0.5<br>0.2<br>Notes:<br>0.1<br>0.1 PDM<br>0.05<br>t 1<br>0.02 1. Duty Cycle, D =t2 tt12<br>2. Per Unit Base = RthJA = 360 °C/W<br>3. TJM – TA = PDMZthJA [(t)]<br>Single Pulse 4. Surface Mounted<br>0.01<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 100 600<br>Square Wave Pulse Duration (s)<br>Normalized Thermal Transient Impedance, Junction-to-Ambient<br>2<br>1<br>Duty Cycle = 0.5<br>0.2<br>0.1<br>0.1<br>0.05<br>0.02<br>Single Pulse<br>0.01<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10<br>Square Wave Pulse Duration (s)<br>Normalized Thermal Transient Impedance, Junction-to-Foot<br>(W)<br>Variance (V)<br>Power<br>GS(th)<br>V<br>Thermal Impedance<br>Normalized Effective Transient<br>Thermal Impedance<br>Normalized Effective Transient<br>**----- End of picture text -----**<br>


_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71249._ 

www.vishay.com 4 

Document Number: 71249 S10-2140-Rev. F, 20-Sep-10 

## ~~a~~ **Package Information Vishay Siliconix** 

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3<br>F f _<br>E1 E<br>f 1 2<br>e | b i<br>e1<br>D<br>A2 A<br>a— 0.08 c A1<br>**----- End of picture text -----**<br>


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Dim Min Nom Max Min Nom Max<br>|eeMMMETERS | INCHES |<br>ee A 0.90 – 1.10 0.035 – ee 0.043<br>ee A1 – – 0.10 – – 0.004<br>A2 0.80 – 1.00 0.031 – 0.039<br>b 0.25 – 0.40 0.010 – 0.016<br>a<br>ee c 0.10 – 0.25 0.004 – 0.010<br>ee D 1.80 2.00 2.20 0.071 0.079 0.087<br>ee E 1.80 2.10 2.40 0.071 0.083 0.094<br>ee E1 1.15 1.25 1.35 0.045 0.049 0.053<br>a e 0.65BSC 0.026BSC<br>e1 1.20 1.30 1.40 0.047 0.051 0.055<br>ee L 0.10 0.20 0.30 0.004 0.008 0.012<br>ee 7 Nom 7 Nom<br>ECN: S-03946—Rev. C, 09-Jul-01<br>DWG:  5549<br>**----- End of picture text -----**<br>


Document Number: 71153 06-Jul-01 

www.vishay.com 

**1** 

**AN813** ~~ce~~ **Vishay Siliconix** 

## **Single-Channel LITTLE FOOT** ® **SC-70 3-Pin and 6-Pin MOSFET Recommended Pad Pattern and Thermal Peformance** 

## INTRODUCTION 

## BASIC PAD PATTERNS 

This technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for single-channel LITTLE FOOT power MOSFETs in the SC-70 package. These new Vishay Siliconix devices are intended for small-signal applications where a miniaturized package is needed and low levels of current (around 350 mA) need to be switched, either directly or by using a level shift configuration. Vishay provides these single devices with a range of on-resistance specifications and in both traditional 3-pin and new 6-pin versions. The new 6-pin SC-70 package enables improved on-resistance values and enhanced thermal performance compared to the 3-pin package. 

## PIN-OUT 

Figure 1 shows the pin-out description and Pin 1 identification for the single-channel SC-70 device in both 3-pin and 6-pin configurations. The pin-out of the 6-pin device allows the use of four pins as drain leads, which helps to reduce on-resistance and junction-to-ambient thermal resistance. 

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SOT-323 SOT-363<br>SC-70 (3-LEADS) SC-70 (6-LEADS)<br>Top View Top View<br>G 1 D 1 6<br>3 D D 2 5<br>S 2 G 3 4<br>**----- End of picture text -----**<br>


See Application Note 826, _Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFET_ s, (http://www.vishay.com/doc?72286) for the basic pad layout and dimensions for the 3-pin SC-70 and the 6-pin SC-70. These pad patterns are sufficient for the low-power applications for which this package is intended. Increasing the pad pattern has little effect on thermal resistance for the 3-pin device, reducing it by only 10% to 15%. But for the 6-pin device, increasing the pad patterns yields a reduction in thermal resistance on the order of 35% when using a 1-inch square with full copper on both sides of the printed circuit board (PCB). The availability of four drain leads rather than the traditional single drain lead allows a better thermal path from the package to the PCB and external environment. 

## EVALUATION BOARDS FOR THE SINGLE SC70-3 AND SC70-6 

Figure 2 shows the 3-pin and 6-pin SC-70 evaluation boards (EVB).  Both measure 0.6 inches by 0.5 inches. Their copper pad traces are the same as described in the previous section, _Basic Pad Patterns_ . Both boards allow interrogation from the outer pins to 6-pin DIP connections, permitting test sockets to be used in evaluation testing. 

The thermal performance of the single SC-70 has been measured on the EVB for both the 3-pin and 6-pin devices,  the results shown in Figures 3 and 4. The minimum recommended footprint on the evaluation board was compared with the industry standard of 1-inch square FR4 PCB with copper on both sides of the board. 

**FIGURE  1.** 

For package dimensions see outline drawings: SC-70 (3-Leads) (http://www.vishay.com/doc?71153) SC-70 (6-Leads) (http://www.vishay.com/doc?71154) 

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Front of Board SC70-3 Back of Board, SC70-3 and SC70-6<br>® Vishay Siliconix<br>ChipFET<br>G @ | c<br>D @ @ 3<br>S e @ =<br>SINGLE vishay.com<br>**----- End of picture text -----**<br>


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Front of Board SC70-6<br>ChipFET<br>**----- End of picture text -----**<br>


**FIGURE  2.** 

Document Number:  71236 12-Dec-03 

www.vishay.com 

**1** 

## **AN813** ~~a~~ **Vishay Siliconix** 

## THERMAL PERFORMANCE 

## **Junction-to-Foot Thermal Resistance (the Package Performance)** 

Thermal performance for the 3-pin SC-70 measured as junction-to-foot thermal resistance is 285 . C/W typical, 340 ° C/W maximum. Junction-to-foot thermal resistance for the 6-pin SC70-6 is 105 ° C/W typical, 130 ° C/W maximum — a nearly two-thirds reduction compared with the 3-pin device. The “foot” is the drain lead of the device as it connects with the body. This improved performance is obtained by the increase in drain leads from one to four on the 6-pin SC-70. Note that these numbers are somewhat higher than other LITTLE FOOT devices due to the limited thermal performance of the Alloy 42 lead-frame compared with a standard copper lead-frame. 

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SC-70 (6-PIN)<br>Pp<br>ee Room Ambient 25 C Elevated Ambient 60 C<br>PD - TJ(max)R 9 JA : TA PD TJ(max)R JA TA<br>: TT<br>PD -—=— 150180 [o] C [o] C 25W [o] C PD — 150180 [o] C [o] C 60W [o] C<br>PD 694 mW PD 500 mW<br>**----- End of picture text -----**<br>


NOTE:  Although they are intended for low-power applications, devices in the 6-pin SC-70 will handle power dissipation in excess of 0.5 W. 

## **Testing** 

## **Junction-to-Ambient Thermal Resistance (dependent on PCB size)** 

The typical R θ JAfor the single 3-pin SC-70 is 360 C/W steady state, compared with 180 C/W for the 6-pin SC-70. Maximum ratings are 430 C/W for the 3-pin device versus 220 C/W for the 6-pin device. All figures are based on the 1-inch square FR4 test board.The following table shows how the thermal resistance impacts power dissipation for the two different pin-outs at two different ambient temperatures. 

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SC-70 (3-PIN)<br>Room Ambient 25 C Elevated Ambient 60 C<br>PD = TJ(max)R JA TA PD = —,— TJ(max)R JA TA<br>PD = —— 150360 [o] C [o] C 25W [o] C PD _ 150360 [o] C [o] C = 60W [o] C<br>PD 347 mW PD 250 mW<br>**----- End of picture text -----**<br>


To aid comparison further, Figures 3 and 4 illustrate single-channel SC-70 thermal performance on two different board sizes and two different pad patterns. The results display the thermal performance out to steady state and produce a graphic account of the thermal performance variation between the two packages. The measured steady state values of R θ JA for the single 3-pin and 6-pin SC-70 are as follows: 

|LITTLE FOOT SC-70<br>~~PO~~<br>~~ee~~|LITTLE FOOT SC-70<br>~~PO~~<br>~~ee~~|LITTLE FOOT SC-70<br>~~PO~~<br>~~ee~~|
|---|---|---|
|~~ee~~|**3-Pin**<br>~~ee~~<br>~~ee~~|**6-Pin**<br>~~ee~~|
|1) Minimum recommended pad pattern<br>(see Figure 4) on the EVB.<br>410.31|410.31 C/W<br>~~ee~~|329.7 C/W|
|2) Industry standard 1” square PCB with<br>maximum copper both sides.<br>~~pe~~|360 C/W|211.8 C/W|



The results show that designers can reduce thermal resistance R θ JA on the order of 20% simply by using the 6-pin device rather than the 3-pin device. In this example, a 80 ° C/W reduction was achieved without an increase in board area. If increasing board size is an option, a further 118 . C/W reduction could be obtained by utilizing a 1-inch square PCB area. 

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400320 CA Yi<br>3-pin<br>240 A A al<br>6-pin<br>160<br>A A<br>80<br>Ue ee A<br>0.5 in x 0.6 in EVB<br>0<br>eS el  |<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 100 1000<br>Time (Secs)<br>Thermal Resistance (C/W)<br>**----- End of picture text -----**<br>


**FIGURE  3.** Comparison of  SC70-3 and SC70-6 on EVB 

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400<br>320<br>3-pin<br>240 O YN a<br>6-pin<br>160<br>YA A<br>80<br>Wage<br>1” Square FR4 PCB<br>0<br>Ce eee<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 100 1000<br>Time (Secs)<br>Thermal Resistance (C/W)<br>**----- End of picture text -----**<br>


**FIGURE  4.** Comparison of SC70-3 and SC70-6 on 1” Square FR4 PCB 

Document Number:  71236 12-Dec-03 

www.vishay.com 

**2** 

**Application Note 826** 

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## Vishay Siliconix 

## **RECOMMENDED MINIMUM PADS FOR SC-70: 3-Lead** 

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0.025 0.022<br>(0.622) (0.559)<br>0.027<br>(0.686)<br>0.071<br>(1.803)<br>0.096 (2.438) 0.045 (1.143)<br>0.026 (0.648)<br>**----- End of picture text -----**<br>


Recommended Minimum Pads Dimensions in Inches/(mm) 

Return to Index 

Return to Inde ~~x~~ 

Document Number: 72601 Revision: 21-Jan-08 

www.vishay.com 17 

**Legal Disclaimer Notice** Vishay 

www.vishay.com 

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## **Disclaimer** 

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product.  To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. 

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications.  Such statements are not binding statements about the suitability of products for a particular application.  It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application.  Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time.  All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. 

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.  Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. 

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay.  Product names and markings noted herein may be trademarks of their respective owners. 

## **Material Category Policy** 

**Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant.** 

**Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.** 

**Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards.  Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition.  We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards.** 

Revision: 02-Oct-12 

Document Number: 91000 

**1**