SFSD1024L1AS1TO-I-DF-221-STD
Flash Memory Card, SLC, SD Card, 1 GB, Class 10, UHS-I U1
- Manufacturer: SWISSBIT
- Product type: Flash Memory Cards
- SVHC: No SVHC (15-Jan-2018)
- App Rating: -
- UHS Standard: UHS-I U1
- Product Range: S-600 Series
- Memory Capacity: 1GB
- Video Speed Class: -
- Supply Voltage Nom: 3.3V
- Standard Speed Class: Class 10
- Flash Memory Card Type: SD Card
- Operating Temperature Max: 85°C
- Operating Temperature Min: -40°C
| Delivery and price | |
|---|---|
| Units per pack | 1 |
| Price | 30.79 € |
| Current stock | 10+ |
| Lead time | 30 days |
Product Data Sheet
**Industrial SD / SDHC Memory Card S-600 Series UHS-I Interface, SLC**
Standard and Extended Temperature Grade
Date: August 18, 2022 Revision: 1.02
## **Contents**
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||||
|---|---|---|
|1.|PRODUCT SUMMARY ............................................................................................................ 3|
|2.|PRODUCT FEATURES ............................................................................................................ 4|
|3.|ORDERING INFORMATION ...................................................................................................... 5|
|4.|PRODUCT DESCRIPTION ......................................................................................................... 6|
|4.1|PERFORMANCE SPECIFICATIONS ......................................................................................................6|
|4.2|ENVIRONMENTAL SPECIFICATIONS ................................................................................................... 7|
|4.3|REGULATORY COMPLIANCE ......................................................................................................... 8|
|4.4|PHYSICAL DIMENSIONS ............................................................................................................ 8|
|4.5|RELIABILITY ....................................................................................................................... 8|
|4.6|ENDURANCE|.......................................................................................................................9|
|5.|USER DENSITY SPECIFICATION ................................................................................................. 9|
|6.|CARD PHYSICAL ................................................................................................................ 10|
|7.|ELECTRICAL INTERFACE ......................................................................................................... 11|
|7.1|ELECTRICAL DESCRIPTION ............................................................................................................ 11|
|7.2|POWER UP /|POWER DOWN BEHAVIOR AND RESET................................................................................... 12|
|7.3|DC CHARACTERISTICS ............................................................................................................... 12|
|7.4|SIGNAL LOADING .................................................................................................................. 13|
|7.5|AC CHARACTERISTICS ............................................................................................................... 13|
|8.|HOST ACCESS SPECIFICATION .................................................................................................. 14|
|8.1|SD AND SPI|BUS MODES .......................................................................................................... 14|
|8.2|CARD REGISTERS ................................................................................................................... 15|
|9.|LIFE TIME MONITORING ....................................................................................................... 20|
|10.|PART NUMBER DECODER ...................................................................................................... 21|
|10.1|MANUFACTURER .................................................................................................................. 21|
|10.2|MEMORY TYPE ................................................................................................................... 21|
|10.3|PRODUCT TYPE ................................................................................................................... 21|
|10.4|DENSITY ......................................................................................................................... 21|
|10.5|PLATFORM ....................................................................................................................... 21|
|10.6|PRODUCT GENERATION ........................................................................................................... 21|
|10.7|MEMORY ORGANIZATION ......................................................................................................... 21|
|10.8|TECHNOLOGY ..................................................................................................................... 21|
|10.9|CHANNELS ....................................................................................................................... 21|
|10.10|FLASH CODE .................................................................................................................... 22|
|10.11|TEMPERATURE OPTION ........................................................................................................... 22|
|10.12|DIE CLASSIFICATION.............................................................................................................. 22|
|10.13|PIN MODE ...................................................................................................................... 22|
|10.14|CONFIGURATION XYZ ............................................................................................................ 22|
|10.15|OPTION ......................................................................................................................... 22|
|11.|MARKING SPECIFICATION ..................................................................................................... 23|
|11.1|FRONT SIDE....................................................................................................................... 23|
|11.2|BACK SIDE MARKING ............................................................................................................. 23|
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12. REVISION HISTORY ............................................................................................................. 24
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## **S-600 Series – Industrial SD/SDHC Memory Card, SLC 512 MBytes up to 32 GBytes**
## **1. Product Summary**
- Capacities: 512 MBytes, 1 GBytes, 2 GBytes, 4 GBytes, 8 GBytes, 16 GBytes, 32 GBytes
- Form Factor: Standard SD Memory Card 32.0mm x 24.0mm x 2.1mm and Write Protect slider
- Compliance[1] : Fully compliant with SD Memory Card specification 5.0 (4-32GB) / 3.0 (512MB-2GB)
- Up to speed class 10/U3/V30 according SD5.0 specification
- Fully compatible with UHS-I/SDR104 hosts
- SD2.0 SDHC backward compliant, default speed and high speed mode
- FAT16 / FAT32
- Environmental: RoHS / REACH Compliant
- Compatibility: Support SD SPI mode
- Performance (max. capacity):
- SD Default speed
- SD High speed
- SD UHS-I
- Read performance: sequential read up to 95 MBytes/s
- Write performance: sequential write up to 55 MBytes/s
- Operating Temperature Range:
- Extended: -25 °C to 85 °C
- Industrial: -40 °C to 85 °C
- Storage Temperature Range: -40 °C to 100 °C
- Operating Voltage: 2.7 … 3.6V (Low-power CMOS technology)
- Data Retention: 10 Years @ Life Begin / 1 Year @ Life End
- Reliability:
- Mean Time Between Failure (MTBF): > 3,000,000 hours
- Number of insertions: up to 20,000
- Shock/Vibration: 1,500 g /50 g
- Electromagnetic Compatibility Test: Radiated Emission; Radiated Immunity; Electrostatic Discharge
> 1 The verification of host system and storage device compatibility is in customer’s responsibility. Swissbit can provide guidance and support on request.
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## **2. Product Features**
- Optimized FW algorithms especially for read/write access, highest random write performance and best endurance with long data retention
- Designed for usage in applications with highest requirements regarding reliability like data logging, POS/POI, Medical and other demanding use-cases
- Especially suitable for intensive read/write operations
- Advanced power-off reliability technology
- Wear Leveling technology
Equal wear leveling of static and dynamic data. The wear leveling assures that dynamic data as well as static data is balanced evenly across the memory. With that the maximum write endurance of the device is guaranteed
- The S-600 series is optimized for high read/write traffic for demanding industrial applications.
- Read Disturb Management
- The read commands are monitored and the content is refreshed when critical levels have occurred
- Data Care Management
- The interruptible background process maintain the user data for Read Disturb effects or Retention degradation due to high temperature effects
- Near miss ECC technology
- Minimize the risk of uncorrectable bit failure over the product life time. Each read command analyzes the ECC margin level and refresh data if necessary
- Diagnostic features with Life Time Monitoring tool support
- High reliability
- SLC Flash
- The product is optimized for long life cycle that requires good data retention because of high temperature mission profile
- Number of card insertions/removals 20,000
- Industrial Temperature range -40° up to 85°C inclusive full cross temperature support[2]
- SIP (System In Package) process for extreme dust, water and ESD proof
- Controlled “Locked” BOM & PCN process
- Manufactured in a TS 16949 certified factory
- Customized options like CID registers, CPRM keys, firmware incl. settings and marking on request
- In-field firmware update[3]
- Swissbit Device Manager (SBDM) Tool and SDK for SBDM (on request)
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> 2 Cross temp. stability of 125 Kelvin: Feasible temperature difference between write/read of same data, e.g. write @-40°C, read @85°C.
> 3 The support of In-Field FW update capabilities on host systems is recommended.
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## **3. Ordering Information**
Table 1: Standard Product List
|Capacity|Extended Temperature|Industrial Temperature|
|---|---|---|
||Part Number|Part Number|
|512 MBytes|SFSD0512LgAS1TO-E-xx-2y1-STD|SFSD0512LgAS1TO-I-xx-2y1-STD|
|1 GBytes|SFSD1024LgAS1TO-E-xx-2y1-STD|SFSD1024LgAS1TO-I-xx-2y1-STD|
|2 GBytes|SFSD2048LgAS1TO-E-xx-2y1-STD|SFSD2048LgAS1TO-I-xx-2y1-STD|
|4 GBytes|SFSD4096LgAS1TO-E-xx-2y1-STD|SFSD4096LgAS1TO-I-xx-2y1-STD|
|8 GBytes|SFSD008GLgAS1TO-E-xx-2y1-STD|SFSD008GLgAS1TO-I-xx-2y1-STD|
|16 GBytes|SFSD016GLgAS1TO-E-xx-2y1-STD|SFSD016GLgAS1TO-I-xx-2y1-STD|
|32 GBytes|SFSD032GLgAS1TO-E-xx-2y1-STD|SFSD032GLgAS1TO-I-xx-2y1-STD|
g = product generation; xx = flash configuration; y = firmware revision
Table 2: Available Part Numbers
|Capacity|Extended Temperature|Industrial Temperature|
|---|---|---|
||Part Number|Part Number|
|512 MBytes|SFSD0512L1AS1TO-E-ME-221-STD|SFSD0512L1AS1TO-I-ME-221-STD|
|1 GBytes|SFSD1024L1AS1TO-E-DF-221-STD|SFSD1024L1AS1TO-I-DF-221-STD|
|2 GBytes|SFSD2048L1AS1TO-E-QG-221-STD|SFSD2048L1AS1TO-I-QG-221-STD|
|4 GBytes|SFSD4096L1AS1TO-E-ME-221-STD|SFSD4096L1AS1TO-I-ME-221-STD|
|8 GBytes|SFSD008GL1AS1TO-E-DF-221-STD|SFSD008GL1AS1TO-I-DF-221-STD|
|16 GBytes|SFSD016GL1AS1TO-E-QG-221-STD|SFSD016GL1AS1TO-I-QG-221-STD|
|32 GBytes|SFSD032GL1AS1TO-E-NG-221-STD|SFSD032GL1AS1TO-I-NG-221-STD|
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## **4. Product Description**
The SD Memory Card is a small form factor non-volatile memory card which provides high capacity data storage. Its aim is to capture, retain and transport data, audio and images, facilitating the transfer of all types of digital information between a large variety of digital systems. The card operates in two basic modes:
- SD/SDHC and UHS-I card modes
- SPI mode
The SD Memory Card also supports SD Default and High Speed mode with up to 50MHz clock frequency as well as UHS-I modes.
The cards are compliant with
- SD Memory card Specification Part 1, Physical layer Specification V3.01 (5.00)
- SD Memory card Specification Part 2, File System Specification V3.00
- SD Memory card Specification Part 3, Security Specification V3.00
- SD Memory Card Addendum V4.00
- Standard Size SD Card Mechanical Addendum Ver7.00
## Simplified specifications are available at https://www.sdcard.org/
The SD Card has an internal intelligent controller which manages interface protocols, data storage and retrieval as well as hardware BCH Error Correction Code (ECC), defect handling, diagnostics and clock control. The advanced wear leveling mechanism assures an equal usage of the Flash memory cells to extend the life time.
The hardware BCH-code ECC allows to detect and correct up to 24 defect bits per 1kByte.
The controller performs control read operations and checks the consistence of the data. If an error of some bits is detected, the card refreshes all data in the flash cells to prevent data retention problems.
The card has a power-loss management feature to prevent data corruption after power-down. The cards are RoHS compliant and lead-free.
## _**4.1 Performance Specifications**_
Table 3: Read/Write Performance
|System Performance<br>~~a~~|typ<br>~~a~~|typ<br>~~a~~|typ<br>~~a~~|typ<br>~~a~~|typ<br>~~a~~|typ<br>~~a~~|typ<br>~~a~~|Unit<br>~~a~~|
|---|---|---|---|---|---|---|---|---|
|~~SG~~|512MB<br>~~SG~~|1GB<br>~~SG~~|2GB<br>~~SG~~|4GB<br>~~SG~~|8GB<br>~~SG~~|16GB<br>~~SG~~|32GB<br>~~SG~~|~~SG~~|
|Sequential Read<br>~~SG~~<br>~~a~~<br>~~Ss~~|33<br>~~SG~~<br>~~CG~~|35<br>~~SG~~<br>~~CG~~|35<br>~~SG~~<br>~~CG~~|95<br>~~SG~~<br>~~CG~~|95<br>~~SG~~|95<br>~~SG~~|95<br>~~SG~~|MB/s<br>~~SG~~|
|Sequential Write<br>~~Ss~~|16<br>~~CG~~|20<br>~~CG~~|21<br>~~CG~~|45<br>~~CG~~|55|55|55||
|Random Read 4k<br>~~Ss~~<br>~~a~~|850<br>~~CG~~|850<br>~~CG~~|850<br>~~CG~~|1200<br>~~CG~~|1200|1200|1200|IOPS|
|Random Write 4k<br>~~a~~<br>~~CG~~|1000<br>~~CG~~|1100<br>~~CG~~|1200<br>~~CG~~|800<br>~~CG~~|800<br>~~CG~~|800<br>~~CG~~|800<br>~~CG~~||
|Speed class<br>~~OO~~|10/U1<br>~~OO~~|||10/U3/V30<br>~~OO~~||||-<br>~~OO~~|
The values are measured using Crystal Disk Mark 7.0.0 at 25°C. Performance depends on flash type and number, file/cluster size, and interface speed.
The cards use thermal management to ensure stability and reliability at high operating temperatures. Performance can be lower depending on ambient temperature and airflow.
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## _**4.2 Environmental Specifications**_
## 4.2.1 Recommended Operating Conditions
The recommended operating conditions for the S-600 SD Memory Card are provided in Table 4 below.
Table 4: SD Memory Card recommended operation conditions
|Parameter|Value4|
|---|---|
|Extended Operating Temperature|-25 °C to 85 °C|
|Industrial Operating Temperature|-40 °C to 85 °C|
## 4.2.2 Recommended Storage Conditions
The recommended storage conditions are listed below in Table 5.
Table 5: SD Memory Card recommended Storage Conditions
|Parameter<br>~~——<—_—————~~|Value5<br>~~——<—_—————~~|
|---|---|
|Extended Storage Temperature<br>~~——<—_—————~~|-25 °C to 100 °C<br>~~——<—_—————~~|
|Industrial Storage Temperature<br>~~——<—_—————~~|-40 °C to 100 °C<br>~~——<—_—————~~|
## 4.2.3 Humidity & EMC
The humidity and EMC conditions are listed below in Table 6.
Table 6: Humidity & EMC
|Table 6: Humidity & EMC||
|---|---|
|Parameter|Value|
|Humidity (Non-Condensing)|85% RH @85°C 1000h|
|ESD|up to ±4 kV (contact discharge),<br>according to IEC61000-4-2 and SDA, Human Body Model 150pF/ 330Ohm,<br>on each contact pad, non-operating<br>up to ±15 kV, (air discharge),<br>according to IEC61000-4-2 and SDA, Human Body Model 150pF/ 330Ohm,<br>isolated contactpad area,non-operating|
## 4.2.4 Environmental Conditions
## Table 7: Environmental Conditions
|Parameter|Value|
|---|---|
|UV light exposure|UV: 254nm, 15Ws/cm2 according to ISO7816-1|
|X-Ray|0.1 Gy 70keV to 140KeV (ISO7816-1) according SDA|
|Durability|20,000 mating cycles|
|Drop Test|1.5m free fall|
|Bending / Torque|10N / 0.15Nm ±2.5° max|
|Mechanical Shock|1500G, 0.5ms, half sine wave ±xyz-axis, 4 pulses each non-operating,<br>JESD22B110/B104 Condition B|
|Vibration|50G, p-p, 20..2000Hz, sweep xyz-axis, 4 pulses each, non-operating, MIL-STD-<br>883 M2007.3 Condition B|
> 4 High Temperature storage without operation reduces the data retention, in operation the data will be refreshed, if data error issues were detected.
> 5 High Temperature storage without operation reduces the data retention, in operation the data will be refreshed, if data error issues were detected.
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## _**4.3 Regulatory Compliance**_
The S-600 devices comply with the regulations / standards listed in Table 8.
Table 8: Regulatory Compliance
|Abbreviation|Regulation/ Standard|
|---|---|
||CE - 2014/30/EU|
|EMC|FCC - 47 CFR Part 15|
||UKCA - S.I. 2016 No. 1091 and S.I. 2012 No. 3032|
|RoHS|2011/65/EU with 2015/863/EU and 2017/2102/EU|
|REACh|1907/2006/EU and 207/2011/EU|
|WEEE|2012/19/EU|
## _**4.4 Physical Dimensions**_
The physical dimensions of the S-600 SD Memory Card are listed in the following table.
Table 9: Measured Physical Dimensions
|Table 9: Measured Physical Dimensions|Table 9: Measured Physical Dimensions||
|---|---|---|
|Physical Dimensions||Unit|
|Length|32.00±0.1|mm|
|Width|24.00±0.1||
|Thickness (Max)|2.10±0.15||
|Weight (Typ)|2|g|
## _**4.5 Reliability**_
Table 10: Reliability
|**_4.5 Reliability_**<br>Table 10: Reliability||
|---|---|
|Parameter|Value6|
|Data Retention at beginning @ 40°C|10 years|
|Data Retention at life end (100k PE cycles) @ 40°C|1 year|
> 6 After every 50 power on cycle the card reads the whole flash and performs a data refresh if necessary. So, the data retention can be much longer in most use cases.
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## _**4.6 Endurance**_
Endurance represented as TeraBytes Written (TBW) is provided in the following Table 11:
Table 11: Endurance[7,][8]
|Table 11: Endurance[7,] [8]||||
|---|---|---|---|
|Capacity|TeraBytes Written (TBW)<br>@<br>Seq. Write 1MB<br>Operation|TeraBytes Written (TBW)<br>@<br>Random Write 128kB<br>Operation|TeraBytes Written (TBW)<br>@<br>Random Write 4kB<br>Operation|
|512 MBytes|53|21|4,3|
|1 GByte|106|31|7,1|
|2 GBytes|212|62|13,9|
|4 GBytes|425|128|27|
|8 GBytes|851|179|41|
|16 GBytes|1702|349|76|
|32 GBytes|3405|961|192|
## **5. User density specification**
The S-600 drive geometry is set to report industry standard LBA settings per the IDEMA standard (LBA1-03). The values for each capacity are shown below in Table 12.
Table 12: SD Memory Card capacity specification
|Table 12: SD Memory Card capacity specification|Table 12: SD Memory Card capacity specification||
|---|---|---|
|Capacity|Total LBA|User Addressable Bytes|
|512 MBytes|967,680|495,452,160|
|1 GBytes|1,953,792|1,000,341,504|
|2 GBytes|3,938,304|2,016,411,648|
|4 GBytes|7,774,208|3,980,394,496|
|8 GBytes|15,802,368|8,090,812,416|
|16 GBytes|31,834,112|16,299,065,344|
|32 GBytes|62,333,952|31,914,983,424|
> 7 The specified TBW is valid, if the amount of data is spread evenly over at least 24 months. Higher daily data volume or frequent writing below 0°C reduces the specified TBW. The drive endurance limit, also called EOL or 0% remaining life, is defined as TBW or DWPD over the product’s limited lifetime warranty period. TBW calculations refer to the JEDEC JESD218A and JESD219A standard for SSD device life and endurance measurement techniques if not otherwise specified.
> 8 Sequential write 1MB simulates a continuous stream recording on a drive which has been preconditioned with a sequential write of the complete drive, Random Write 128KB or 4KB represent data logging applications with large or small block sizes.
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## **6. Card physical**
The SD Memory Card contains a single chip controller and Flash memory module(s). The controller interfaces with a host system allowing data to be written to and read from the Flash memory module(s).
Figure 1: Simplified mechanical dimensions SD Memory Card
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## **7. Electrical interface**
## _**7.1 Electrical description**_
Figure 2: SD Memory Card shape and interface (Bottom view)
– Table 13: Pad assignment SD Mode
|Pin|SD Mode|SD Mode|SD Mode|
|---|---|---|---|
||Name|Type9|Description|
|1|CD/DAT310|I/O/PP11|Card Detect/ Data Line [Bit 3]|
|2|CMD|PP|Command/Response|
|3|VSS1|S|Supplyvoltageground|
|4|VDD|S|Supplyvoltage|
|5|CLK|I|Clock|
|6|VSS2|S|Supplyvoltageground|
|7|DAT0|I/O/PP|Data Line[Bit 0]|
|8|DAT112|I/O/PP|Data Line [Bit 1]|
|9|DAT213|I/O/PP|Data Line [Bit 2]|
– Table 14: Pad assignment SPI Mode
|Pin|SPI Mode|SPI Mode|SPI Mode|
|---|---|---|---|
||Name|Type9|Description|
|1|CS|I11|Chip Select (neg true)|
|2|DI|I|Data In|
|3|VSS|S|Supplyvoltageground|
|4|VDD|S|Supplyvoltage|
|5|SCLK|I|Clock|
|6|VSS2|S|Supplyvoltageground|
|7|DO|O/PP|Data Out|
|8|RSV|||
|9|RSV|||
> 9 S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers
- 10 The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used.
- 11 At power up this line has a 50kOhm pull up enabled in the card. This resistor serves two functions Card detection and Mode Selection. For Mode Selection, the host can drive the line high or let it be pulled high to select SD mode. If the host wants to select SPI mode it should drive the line low. For Card detection, the host detects that the line is pulled high. This pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command
- 12 DAT1 line may be used as Interrupt Output (from the Card) in SDIO mode during all the times that it is not in use for data transfer operations (refer to "SDIO Card Specification" for further details).
> 13 DAT2 line may be used as Read Wait signal in SDIO mode (refer to "SDIO Card Specification" for further details).
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## _**7.2 Power up / Power down behavior and reset**_
## 7.2.1 Power up
The host can start with communication 1ms after 2.7V is reached according the SDA specification. That should perform 74 clock cycles and start with the sequence CMD0, CMD8, ACMD41 until card is ready as described in the SD specification 3.00.
## 7.2.2 Power down
When the power falls below 2.6V the controller stops the communication to the flash, but enables the flash to finish a started flash program operation (if voltage drop is not fast).
After next initialization the controller checks the last written data for consistency and refreshes the data. Either the new or the old data (if the write operation could not be finished) are available.
## 7.2.3 Power drop
If the voltage drops below 2.6V and rises again, the card performs a reset. The card must be initialized like after a power on.
## 7.2.4 Operation below minimum voltage
512MB-2GB
If the card is initialized from the host (ACMD41) below 2.7V the card may not be recognized.
## 4GB-32GB
If the card initialization is performed below the specified voltage of 2.7V, the card may be detected as 1MB card with no useful data. In this case the host should power off and on the card and start initialization above 2.7V.
## _**7.3 DC characteristics**_
Measurements are at recommended Operating Conditions unless otherwise specified. Table 15: DC Characteristics[14]
|Table 15: DC Characteristics<br>~~a~~|Table 15: DC Characteristics[14]<br>~~nt~~|~~rn~~|~~III~~|~~I~~|~~I~~|~~I~~||
|---|---|---|---|---|---|---|---|
|Symbol<br>~~a~~|Parameter<br>~~nt~~|Density<br>~~rn~~|Min<br>~~III~~|Typ<br>~~I~~|Max<br>~~I~~|Unit<br>~~I~~|Notes|
|IDD<br>~~a~~<br>~~—~~|Operating Current Read<br>(SDR50 max. 2GB<br>SDR104 >2GB)<br>~~nt ~~|512MB<br> ~~rn ~~<br>~~Sp~~|~~III ~~<br>~~Sp~~|75<br> ~~I~~|80<br>~~I ~~|mA<br> ~~I~~|@25°C|
|IDD<br>~~—~~||1GB-2GB<br>~~Sp~~|~~Sp~~|80|85|mA|@ 25°C|
|IDD<br>~~—~~<br>~~|~~||4GB-32GB<br>~~Sp~~<br>~~es~~|~~Sp~~<br>~~es~~|125<br>~~ee~~|135<br>~~es~~|mA<br>~~ee~~|@ 25°C|
|IDD<br>~~—~~<br>~~|~~<br>~~||~~<br>~~So~~|Operating Current Write<br>(SDR50 max. 2GB<br>SDR104 >2GB)<br>~~So~~<br>~~ee~~|512MB<br>~~Sp~~<br>~~es~~<br>~~es~~<br>~~ee~~|~~Sp~~<br>~~es~~<br>~~es~~<br>~~ee~~|75<br>~~ee~~<br>~~es~~<br>~~ee~~|80<br>~~es~~<br>~~es~~<br>~~ee~~|mA<br>~~ee~~<br>~~es~~<br>~~ee~~|@ 25°C<br>~~ee~~|
|IDD<br>~~|~~<br>~~||~~<br>~~So~~||1GB-2GB<br>~~es~~<br>~~es~~<br>~~ee~~|~~es~~<br>~~es~~<br>~~ee~~|95<br>~~ee~~<br>~~es~~<br>~~ee~~|100<br>~~es ~~<br>~~es~~<br>~~ee~~|mA<br> ~~ee~~<br>~~es~~<br>~~ee~~|@25°C<br>~~ee~~|
|IDD<br>~~||~~<br>~~So~~<br>~~|~~||4GB<br>~~es~~<br>~~ee~~<br>~~es~~|~~es~~<br>~~ee~~<br>~~ee~~|100<br>~~es~~<br>~~ee~~<br>~~es~~|105<br>~~es~~<br>~~ee~~<br>~~es~~|mA<br>~~es~~<br>~~ee~~<br>~~es~~|@ 25°C<br>~~ee~~|
|IDD<br>~~So~~<br>~~|~~<br>~~ee~~||8GB-32GB<br>~~ee~~<br>~~es~~<br>~~ee~~|~~ee~~<br>~~ee~~<br>~~ee~~|120<br>~~ee~~<br>~~es~~<br>~~ee~~|130<br>~~ee~~<br>~~es~~|mA<br>~~ee~~<br>~~es~~<br>~~ee~~|@ 25°C<br>~~ee~~<br>~~ee~~|
|IDD<br>~~|~~<br>~~ee~~|Background read and refresh15<br>~~ee~~<br>~~es~~|512MB-2GB<br>~~es ~~<br>~~ee~~|~~ee ~~<br>~~ee~~|80<br> ~~es~~<br>~~ee~~|100<br>~~es~~|mA<br>~~es~~<br>~~ee~~|@ 25°C<br>~~ee~~|
|IDD<br>~~ee~~<br>~~a~~||4GB-32GB<br>~~ee~~<br>~~ry~~|~~ee~~<br>~~nn~~|105<br>~~ee~~<br>~~I~~|120|mA<br>~~ee~~|@25°C<br>~~ee~~|
|IDD<br>~~ee~~<br>~~a~~|Pre-initialization Standby Current<br>~~ee~~<br>~~es~~|~~ee~~<br>~~ry~~|~~ee~~<br>~~nn~~|5<br>~~ee~~<br>~~I~~|15|mA<br>~~ee~~|@ 25°C<br>~~ee~~|
|IDD<br>~~a~~<br>~~a~~<br>~~a~~|Post-initialization StandbyCurrent16<br>~~es ~~<br>|~~ry ~~<br>|~~nn ~~<br>~~I~~<br>|10<br> ~~I~~<br>~~I~~<br>|12<br>|mA<br>|@ 25°C<br>|
|IDD<br>~~a~~<br>~~a ery~~<br>~~a~~<br>~~a~~|Post-initialization StandbyCurrent17<br>~~ery~~<br>|~~ery~~<br>|~~ery~~<br>~~I~~<br><br>~~ee~~|10<br>~~ery~~<br>~~I~~<br><br>~~ee~~|12<br>~~ery~~<br><br>~~ee~~|mA<br>~~ery~~<br><br>~~**ee**~~|@ 25°C<br>~~ery~~<br>|
|ILI<br>~~a~~<br>~~a~~|Input Leakage Current<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|-2<br>~~I~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|~~I~~<br>~~ee~~<br>~~ee~~<br>~~es~~|2<br>~~ee~~<br>~~ee~~<br>~~ee~~|µA<br>~~ee~~<br>~~**ee**~~|without<br>pull upR<br>~~ee~~|
|ILO<br>~~a~~|Output Leakage Current<br>~~ee~~|~~ee~~|-2<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~es~~|2<br>~~ee ~~<br>~~ee~~|µA<br> ~~**ee**~~|without<br>pull upR|
> 14 Target values
> 15 The card can perform auto data read of the whole card to check for ECC errors and performs data refresh
> 16 Before auto read the idle current is larger than the typical idle current after auto read
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## _**7.4 Signal Loading**_
According to SD specification
## _**7.5 AC characteristics**_
## 7.5.1 Default Speed mode (0–25MHz)
According to SD specification
## 7.5.2 High Speed mode (0–50MHz)
According to SD specification
## 7.5.3 UHS modes
UHS modes were driven with a signal level of 1.8V. The cards support following UHS-I modes:
- Table 17: Supported UHS I modes for max. 2GB cards
|Host request|Card Modes<br>(to select by host)|Max. Burst MB/s|Max. Clock frequency MHz|
|---|---|---|---|
|SDR12|SDR12|up to 12.5|up to 25|
|SDR25|SDR12, SDR25|up to 25|up to 50|
|SDR50|SDR12, SDR25, SDR50|up to 50|up to 100|
|DDR50|SDR12, SDR25, SDR50, DDR50|up to 50|50 (rising and falling edge)|
|SDR104|SDR12, SDR25, SDR50, DDR50|up to 50|up to 100|
Table 188: Supported UHS-I modes for >2GB cards
|Host request|Card Modes<br>(to select by host)|Max. Burst MB/s|Max. Clock frequency MHz|
|---|---|---|---|
|SDR12|SDR12|up to 12.5|up to 25|
|SDR25|SDR12, SDR25|up to 25|up to 50|
|SDR50|SDR12, SDR25, SDR50|up to 50|up to 100|
|DDR50|SDR12, SDR25, SDR50, DDR50|up to 50|50 (rising and falling edge)|
|SDR104|SDR12, SDR25, SDR50, DDR50, SDR104|up to 104|up to 208|
According to SD specification
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## **8. Host access specification**
The following chapters summarize how the host accesses the card:
- Chapter 8.1 summarizes the SD and SPI buses.
- Chapter 8.2 summarizes the registers.
## _**8.1 SD and SPI Bus Modes**_
The card supports SD and the SPI Bus modes. Application can chose either one of the modes. Mode selection is transparent to the host. The card automatically detects the mode of the reset command and will expect all further communication to be in the same communication mode. The SD mode uses a 4-bit high performance data transfer, and the SPI mode provides compatible interface to MMC host systems with little redesign, but with a lower performance.
## 8.1.1 SD Bus Mode Protocol
The SD Bus mode has a single master (host) and multiple slaves (cards) synchronous topology. Clock, power, and ground signals are common to all cards. After power up, the SD Bus mode uses DAT0 only; after initialization, the host can change the cards’ bus width from 1 bit (DAT0) to 4 bits (DAT0-DAT3). In high speed mode, only one card can be connected to the bus.
Communication over the SD bus is based on command and data bit streams which are initiated by a start bit and terminated by a stop bit.
- Command: a command is a token which starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). A command is transferred serially on the CMD line.
- Response: a response is a token which is sent from an addressed card, or (synchronously) from all connected cards, to the host as an answer to a previously received command. A response is transferred serially on the CMD line.
- Data: data can be transferred from the card to the host or vice versa. Data is transferred via the data lines.
## 8.1.2 SPI Bus Mode Protocol
The Serial Peripheral Interface (SPI) Bus is a general purpose synchronous serial interface. The SPI mode consists of a secondary communication protocol. The interface is selected during the first reset command after power up (CMD0) and it cannot be changed once the card is powered on.
While the SD channel is based on command and data bit streams which are initiated by a start bit and terminated by a stop bit, the SPI channel is byte oriented. Every command or data block is built of 8-bit bytes and is byte aligned to the CS signal.
The card identification and addressing methods are replaced by a hardware Chip Select (CS) signal. There are no broadcast commands. For every command, a card (slave) is selected by asserting (active low) the CS signal.
The CS signal must be continuously active for the duration of the SPI transaction (command, response and data). The only exception occurs during card programming, when the host can de-assert the CS signal without affecting the programming process.
The bidirectional CMD and DAT lines are replaced by unidirectional dataIn and dataOut signals.
Table 19: SPI Bus Signals
|Signal|Description|
|---|---|
|/CS|Host to card chip select|
|CLK|Host to card clock signal|
|Data In|Host to card data signal|
|Data Out|Card to host data signal|
|Vdd, Vss|Power and ground|
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## 8.1.3 Mode Selection
The SD Memory Card wakes up in the SD mode. It will enter SPI mode if the CS signal is asserted (negative) during the reception of the reset command (CMD0) and the card is in idle_state. If the card recognizes that the SD mode is required it will not respond to the command and remain in the SD mode. If SPI mode is required the card will switch to SPI and respond with the SPI mode R1 response. The only way to return to the SD mode is by entering the power cycle. In SPI mode the SD Memory Card protocol state machine is not observed. All the SD Memory Card commands supported in SPI mode are always available.
During the initialization sequence, if the host gets Illegal Command indication for ACMD41 sent to the card, it may assume that the card is Multimedia Card. In that case it should re-start the card as Multimedia Card using CMD0 and CMD1.
## _**8.2 Card registers**_
The SD Memory Card has the following registers.
Table 20: SD Memory Card registers
|Register name|Bit width|Description|Function|
|---|---|---|---|
|CID|128|Card Identification information|This register contains the card<br>identification information used during<br>the Card Identificationphase.|
|OCR|32|Operation Conditions Registers|This register describes the operating<br>voltage range and contains the status<br>bit in thepower supply.|
|CSD|128|Card specific information|This register provides information on<br>how to access the card content. Some<br>fields of this register are writeable by<br>PROGRAM_CSD(CMD27).|
|SCR|64|SD Memory Card’s Special features|This register provides information on<br>special features.|
|RCA17|16|Relative Card Address|This register carries the card address is<br>SD Card mode.|
|SSR|512|SD Status|information about the card proprietary<br>features and vendor specific life time<br>information|
Table 21: CID registers
|Table 21: CID registers||||
|---|---|---|---|
|Register name|Bit width|Description|Function|
|MID|8|Manufacture ID|0x5d|
|OID|16|OEM/Application ID|0x5342|
|PNM|40|Product Name|SB PNM Naming|
|PRV|8|Product Revision|0xgg|
|PSN|32|Product Serial Number|xxxxxxxx|
|—|4|Reserved|0x0|
|MDT|12|Manufacture Date|0xyym|
|CRC|7|Check sum of CID contents|chksum|
|—|1|Not used; always=1|1|
> 17 RCA register is not available in SPI mode
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Table 22: OCR register
|~~ee ee es~~|~~ee es~~|~~ee es~~|~~es~~|||
|---|---|---|---|---|---|
|OCR bit positon<br>~~ee ee es~~|VDD voltage<br>windows<br>~~ee es~~|Typ. value<br>~~ee es~~|OCR bit<br>position<br>~~es~~|VDD voltage window|Typ. value|
|0-3<br>~~ee ee es~~<br>~~PT~~|Reserved<br>~~ee es~~<br>~~PT~~|0<br>~~ee es~~<br>~~PT~~|15<br>~~es~~<br>~~PT~~|2.7-2.8<br>~~PT~~|1<br>~~PT~~|
|4<br>~~PT~~<br>~~PT~~|1.6-1.7<br>~~PT~~<br>~~PT~~|0<br>~~PT~~<br>~~PT~~|16<br>~~PT~~<br>~~PT~~|2.8-2.9<br>~~PT~~<br>~~PT~~|1<br>~~PT~~<br>~~PT~~|
|5<br>~~PT~~<br>~~PT~~|1.7-1.8<br>~~PT~~<br>~~PT~~|0<br>~~PT~~<br>~~PT~~|17<br>~~PT~~<br>~~PT~~|2.9-3.0<br>~~PT~~<br>~~PT~~|1<br>~~PT~~<br>~~PT~~|
|6<br>~~PT~~<br>~~PT~~<br>~~es~~|1.8-1.9<br>~~PT~~<br>~~PT~~<br>~~i~~|0<br>~~PT~~<br>~~PT~~<br>~~i~~|18<br>~~PT~~<br>~~PT~~<br>~~rs~~|3.0-3.1<br>~~PT~~<br>~~PT~~|1<br>~~PT~~<br>~~PT~~|
|7<br>~~es~~<br>~~es~~|1.9-2.0<br>~~i~~<br>~~i~~|0<br>~~i~~<br>~~i~~|19<br>~~rs~~<br>~~rs~~|3.1-3.2|1|
|8<br>~~es~~<br>~~es~~<br>~~es~~|2.0-2.1<br>~~i~~<br>~~i~~<br>~~i~~|0<br>~~i~~<br>~~i~~<br>~~i~~|20<br>~~rs~~<br>~~rs~~<br>~~rs~~|3.2-3.3|1|
|9<br>~~es~~<br>~~es~~<br>~~es~~|2.1-2.2<br>~~i~~<br>~~i~~<br>~~i~~|0<br>~~i~~<br>~~i~~<br>~~i~~|21<br>~~rs~~<br>~~rs~~<br>~~rs~~|3.3-3.4|1|
|10<br>~~es~~<br>~~es~~<br>~~es~~|2.2-2.3<br>~~i~~<br>~~i~~<br>~~i~~|0<br>~~i~~<br>~~i~~<br>~~i~~|22<br>~~rs~~<br>~~rs~~<br>~~rs~~|3.4-3.5|1|
|11<br>~~es~~<br>~~es~~<br>~~a~~|2.3-2.4<br>~~i~~<br>~~i~~<br>~~ee~~|0<br>~~i~~<br>~~i~~<br>~~ee~~|23<br>~~rs~~<br>~~rs~~<br>~~ee~~|3.5-3.6<br>~~ee~~|1<br>~~ee~~|
|12<br>~~es~~<br>~~a~~|2.4-2.5<br>~~i~~<br>~~ee~~|0<br>~~i~~<br>~~ee~~|24<br>~~rs~~<br>~~ee~~|Switching to 1.8V<br>accepted<br>~~ee~~|1<br>~~ee~~|
|13<br>~~a~~<br>~~PT~~<br>~~To~~|2.5-2.6<br>~~ee~~<br>~~PT~~<br>~~PT~~|0<br>~~ee ~~<br>~~PT~~<br>~~PT~~|25-29<br> ~~ee~~<br>~~PT~~<br>~~PT~~|Reserved<br>~~ee~~<br>~~PT~~<br>~~PT~~|~~ee~~<br>~~PT~~<br>~~PT~~|
|14<br>~~To~~|2.6-2.7<br>~~PT~~|0<br>~~PT~~|30<br>~~PT~~|Card Capacity Status (CCS)<br>~~PT~~|*18<br>~~PT~~|
|~~To ~~<br>~~PT~~|~~PT~~<br>~~PT~~|~~PT~~<br>~~PT~~|31<br>~~PT~~<br>~~PT~~|0=busy; 1=ready<br>~~PT~~<br>~~PT~~|*19<br>~~PT~~<br>~~PT~~|
> 18 This bit is valid only when the card power up status bit is set
> 19 This bit is set to LOW if the card has not finished the power up routine
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Table 23: CSD register
|Table 23: CSD register|Table 23: CSD register|||||
|---|---|---|---|---|---|
|Register name<br>~~GC~~<br>~~ee~~|Bits<br>~~GC~~<br>~~es~~|Bit width<br>~~GC~~<br>~~es~~|Description<br>~~GC~~<br>~~es~~|Typ. value (max. 2GB)<br>~~GC~~<br>~~es~~|Typ. value (>2GB)<br>~~GC~~<br>~~es~~|
|CSD_STRUCTURE<br>~~ee~~<br>~~ee~~|127:126<br>~~es~~<br>~~es~~|2<br>~~es~~<br>~~es~~|CSD structure<br>~~es~~<br>~~es~~|00<br>~~es~~<br>~~es~~|01<br>~~es~~<br>~~es~~|
|—<br>~~ee~~<br>~~ee~~|125:120<br>~~es~~<br>~~es~~|6<br>~~es~~<br>~~es~~<br>~~ee~~|Reserved<br>~~es~~<br>~~es~~|00000<br>~~es~~<br>~~es~~|00000<br>~~es~~<br>~~es~~|
|TAAC<br>~~ee~~<br>~~ee~~<br>~~a~~|119:112<br>~~es~~<br>~~ee~~|8<br>~~es~~<br>~~ee~~<br>~~ee~~<br>ee|Data read access time<br>1<br>~~es~~<br>~~ee~~|00101111<br>~~es~~<br>~~ee~~|00001110<br>~~es~~<br>~~ee~~|
|NSAC<br>~~ee~~<br>~~a~~<br>~~ee~~|111:104<br>~~ee~~<br>~~ee~~<br>|8<br>~~ee~~<br>~~ee~~<br>ee<br>~~ee~~<br>|Data read access time<br>2(CLK cycle)<br>~~ee~~<br>~~ee~~<br>|00000000<br>~~ee~~<br>~~ee~~<br>|00000000<br>~~ee~~<br>~~ee~~<br>|
|TRAN_SPEED<br>~~a~~<br>~~ee~~|103:96<br>~~ee~~<br>|8<br>ee<br>~~ee~~<br>|Data transfer rate<br>~~ee~~<br>|00110010 Default speed<br>00001011 SDR 50<br>or other values<br>~~ee~~<br>|00110010 Default speed<br>00001011 SDR 50<br>or other values<br>~~ee~~<br>|
|CCC<br>~~ee~~|95:84<br>~~ee~~<br>~~es~~|12<br>~~ee~~<br>~~es~~<br>~~ee~~|Card command classes<br>~~ee~~<br>~~es~~|010111110101<br>~~ee~~<br>~~es~~|010110110101<br>~~ee~~<br>~~es~~|
|READ_BL_LEN<br>~~ee~~<br>~~ee~~<br>~~ee~~|83:80<br>~~ee~~<br><br>~~ee~~<br>|4<br>~~ee ~~<br><br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|Read data block<br>length<br> ~~ee~~<br><br>~~ee~~|1001<br>~~ee~~<br><br>~~ee~~<br>~~ee~~|1001<br>~~ee~~<br><br>~~ee~~<br>~~ee~~|
|READ_BL_PARTIAL<br>~~ee~~<br>~~ee~~|79<br>~~ee~~<br>|1<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|Partial blocks for read<br>allowed<br>~~ee~~|1<br>~~ee~~<br>~~ee~~|0<br>~~ee~~<br>~~ee~~|
|WRITE_BLK_MISALIGN<br>~~ee~~<br>~~ee~~<br>~~To~~|78<br>~~ee~~<br>~~ee~~<br>|1<br>~~ee~~<br>~~ee~~<br>|Write block<br>misalignment<br>|0<br>~~ee~~<br>|0<br>~~ee~~<br>|
|READ_BLK_MISALIGN<br>~~ee ~~<br>~~ee~~<br>~~To~~|77<br> ~~ee~~<br>~~ee~~<br>|1<br>~~ee~~<br>~~ee~~<br>|Read block<br>misalignment<br>|0<br>~~ee~~<br>|0<br>~~ee~~<br>|
|DSR_IMP<br> <br>~~ee ~~<br>~~To~~<br>~~To~~|76<br> ~~ee~~<br> ~~ee~~<br>~~**oT**~~<br>|1<br>~~ee~~<br>~~**oT**~~<br>|DSR implemented<br>~~**oT**~~<br>|0<br>~~**oT**~~<br>|0<br>~~**oT**~~<br>|
|—<br> <br>~~To ~~<br>~~To~~|75:74<br> ~~ee~~<br> ~~**oT**~~<br>|2<br>~~**oT**~~<br>|Reserved<br>~~**oT**~~<br>|00<br>~~**oT**~~<br>|-<br>~~**oT**~~<br>|
|C_SIZE<br> <br>~~TooT~~|73:62<br> ~~**oT**~~<br>~~oT~~|12<br>~~**oT**~~<br>~~oT~~|Device size<br>~~**oT**~~<br>~~oT~~|xxx20<br>~~**oT**~~<br>~~oT~~|-<br>~~**oT**~~<br>~~oT~~|
|VDD_R_CURR_MIN<br>~~oT~~<br>~~oT~~|61:59<br>~~oT~~<br>~~oT~~|3<br>~~oT~~<br>~~oT~~|VDD min read current<br>~~oT~~<br>~~oT~~|111<br>~~oT~~<br>~~oT~~|-<br>~~oT~~<br>~~oT~~|
|VDD_R_CURR_MAX<br>~~oT~~<br>~~oT~~|58:56<br>~~oT~~<br>~~oT~~|3<br>~~oT~~<br>~~oT~~|VDD max read current<br>~~oT~~<br>~~oT~~|111<br>~~oT~~<br>~~oT~~|-<br>~~oT~~<br>~~oT~~|
|VDD_W_CURR_MIN<br>~~oT~~<br>~~oT~~|55:53<br>~~oT~~<br>~~oT~~|3<br>~~oT~~<br>~~oT~~|VDD min write current<br>~~oT~~<br>~~oT~~|111<br>~~oT~~<br>~~oT~~|-<br>~~oT~~<br>~~oT~~|
|VDD_W_CURR_MAX<br>~~oT~~<br>~~oT~~|52:50<br>~~oT~~<br>~~oT~~|3<br>~~oT~~<br>~~oT~~|VDD max write current<br>~~oT~~<br>~~oT~~|111<br>~~oT~~<br>~~oT~~|-<br>~~oT~~<br>~~oT~~|
|C_SIZE_MULT<br>~~oT~~<br>~~oT~~<br>~~To~~|49:47<br>~~oT~~<br>~~oT~~<br>~~oT~~|3<br>~~oT~~<br>~~oT~~<br>~~oT~~|Device size multiplier<br>~~oT~~<br>~~oT~~<br>~~oT~~|11120<br>~~oT~~<br>~~oT~~<br>~~oT~~|-<br>~~oT~~<br>~~oT~~<br>~~oT~~|
|—<br>~~oT~~<br>~~To~~<br>~~To~~|75:70<br>~~oT~~<br>~~oT~~<br>~~J~~|6<br>~~oT~~<br>~~oT~~|Reserved<br>~~oT~~<br>~~oT~~|-<br>~~oT~~<br>~~oT~~|000000<br>~~oT~~<br>~~oT~~|
|C_SIZE<br>~~To ~~<br>~~To~~|69:48<br> ~~oT~~<br>~~J~~|22<br>~~oT~~|Device size<br>~~oT~~|-<br>~~oT~~|xxx20<br>~~oT~~|
|—<br>~~To~~<br>~~TT~~<br>~~ee~~|47<br>~~J~~<br>~~TT~~<br>~~ee~~|1<br>~~TT~~|Reserved<br>~~TT~~|-<br>~~TT~~|0<br>~~TT~~|
|ERASE_BLK_EN<br>~~ee~~|46<br>~~ee~~|1|Erase single block<br>enable|1|1|
|SECTOR_SIZE<br>~~ee ~~<br>~~TT~~<br>~~ee~~|45:39<br> ~~ee~~<br>~~TT~~<br>~~ee~~|7<br>~~TT~~<br>~~ee~~|Erase sector size<br>~~TT~~|1111111<br>~~TT~~|1111111<br>~~TT~~|
|WP_GRP_SIZE<br>~~ee~~<br>~~ee~~|38:32<br>~~ee~~<br>~~ee~~|7<br>~~ee~~<br>~~es ee~~|Write protect group<br>size<br>~~ee~~|0000000|0000000|
|WP_GRP_ENABLE<br>~~ee ~~<br>~~ee~~|31<br> ~~ee ~~<br>~~ee~~|1<br> ~~ee~~<br>~~es ee~~|Write protect group<br>enable<br>~~ee~~|1|0|
|—<br>~~ee ~~<br>~~oT~~|30:29<br> ~~ee ~~<br>~~oT~~|2<br> ~~es ee~~<br>~~oT~~|Reserved<br>~~ee~~<br>~~oT~~|00<br>~~oT~~|00<br>~~oT~~|
|R2W_FACTOR<br>~~oT~~<br>~~oT~~<br>~~ee~~|28:26<br>~~oT~~<br>~~oT~~<br>~~ee~~|3<br>~~oT~~<br>~~oT~~|Write speed factor<br>~~oT~~<br>~~oT~~|010<br>~~oT~~<br>~~oT~~|010<br>~~oT~~<br>~~oT~~|
|WRITE_BL_LEN<br>~~oT~~<br>~~ee~~<br>~~a~~|25:22<br>~~oT~~<br>~~ee~~<br>~~ee~~|4<br>~~oT~~|Write data block<br>length<br>~~oT~~|100120<br>~~oT~~|100120<br>~~oT~~|
|WRITE_BL_PARTIAL<br>~~ee ~~<br>~~a~~|21<br> ~~ee~~<br>~~ee~~|1|Partial blocks for write<br>allowed|0|0|
> 20 Drive size and block sizes vary with card capacity
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|—<br>~~OT~~<br>~~To~~|20:16<br>~~OT~~<br>~~oT~~|5<br>~~OT~~<br>~~oT~~|Reserved<br>~~OT~~<br>~~oT~~|00000<br>~~OT~~<br>~~oT~~|00000<br>~~OT~~<br>~~oT~~|
|---|---|---|---|---|---|
|FILE_FORMAT_GRP<br>~~OT~~<br>~~To~~<br>~~To~~|15<br>~~OT~~<br>~~oT~~|1<br>~~OT~~<br>~~oT~~|File format group<br>~~OT~~<br>~~oT~~|0 W(1)<br>~~OT~~<br>~~oT~~|0 W(1)<br>~~OT~~<br>~~oT~~|
|COPY<br>~~To ~~<br>~~To~~<br>~~es~~|14<br> ~~oT~~<br>~~ee~~|1<br>~~oT~~|Copy flag<br>~~oT~~|0 W(1)<br>~~oT~~|0 W(1)<br>~~oT~~|
|PERM_WRITE_PROTECT<br>~~To~~<br>~~es~~<br>~~ee~~|13<br>~~ee~~<br>|1<br>~~ee~~<br>|Permanent write<br>protection<br>|0 W(1)<br>|0 W(1)<br>|
|TMP_WRITE_PROTECT<br>~~es ~~<br>~~ee~~<br>~~ee~~|12<br> ~~ee~~<br>~~ee~~<br>|1<br>~~ee~~<br>~~ee~~<br>|Temporary write<br>protection<br>~~ee~~<br>|0 W<br>~~ee~~<br>|0 W<br>~~ee~~<br>|
|FILE_FORMAT<br>~~ee~~<br>~~ee~~|11:10<br>~~es~~<br>|2<br>~~ee~~<br>~~es~~<br>|File format<br>~~es~~<br>|00 W(1)<br>~~es~~<br>|00 W(1)<br>~~es~~<br>|
|—<br>~~ee~~<br>~~ee~~<br>~~—~~|9:8<br>~~es~~<br>~~es~~<br>|2<br>~~ee~~<br>~~es~~<br>~~es~~<br>|Reserved<br>~~es~~<br>~~es~~<br>|00 W<br>~~es~~<br>~~es~~<br>|00 W<br>~~es~~<br>~~es~~<br>|
|CRC<br><br>~~ee~~<br>~~—~~|7:1<br>~~es~~<br>~~es~~<br>|7<br>~~es~~<br>~~es~~<br>|Checksum of CSD<br>contents<br>~~es~~<br>~~es~~<br>|xxxxxxx W<br>~~es~~<br>~~es~~<br>|xxxxxxx W<br>~~es~~<br>~~es~~<br>|
|—<br><br>~~—TT~~|0<br>~~es~~<br>~~TT~~|1<br>~~es~~<br>~~TT~~|Always=1<br>~~es~~<br>~~TT~~|1<br>~~es~~<br>~~TT~~|1<br>~~es~~<br>~~TT~~|
>2GB memory capacity = (C_SIZE+1) * 512kByte
W value can be changed with CMD27 (PROGRAM_CSD) W(1) value can be changed ONCE with CMD27 (PROGRAM_CSD)
|Table 24: SCR register|||||
|---|---|---|---|---|
|Field<br>~~I~~|Bits<br>~~I~~|Bit width<br>~~JT~~|Typ. value<br>~~JT~~|Remark<br>~~JT~~|
|SCR_STRUCTURE<br>~~LT~~|63:60<br>~~LT~~|4<br>~~LT~~|0000<br>~~LT~~|SCR 1.01…2.00<br>~~LT~~|
|SD_SPEC<br>~~LT~~|59:56<br>~~LT~~|4<br>~~LT~~|0010<br>~~LT~~|SD 2.0 or 3.0<br>~~LT~~|
|DATA_STAT_AFTER_ERASE<br>~~TT~~<br>~~ee~~|55<br>~~TT~~<br>~~ee~~|1<br>~~TT~~|1<br>~~TT~~|data are 0xFF after erase<br>~~TT~~|
|SD_SECURITY<br>~~ee~~<br>~~To~~|54:52<br>~~ee~~|3|010<br>011|1.01 (SDSC)<br>2.00(SDHC)|
|SD_BUS_WIDTHS<br>~~ee~~<br>~~To~~<br>~~To~~|51:48<br>~~ee~~|4|0101|1 or 4 bit|
|SD_SPEC3<br>~~To~~<br>~~To~~<br>~~To~~|47|1|1|yes>= SD3.0|
|EX_SECURITY<br>~~To~~<br>~~To~~<br>~~To~~|46:43|4|0000|no extended security|
|SD_SPEC4<br>~~To~~<br>~~To~~<br>~~To~~|42:42|1|0 / 1|no / yes|
|SD_SPECX<br>~~To~~<br>~~To~~|41:38|4|O / 1|Version 3.xx / Version 5.x|
|Reserved<br>~~To~~<br>~~TT~~|37:36<br>~~TT~~<br>~~es~~|9<br>~~TT~~<br>~~ee Gs~~|0<br>~~TT~~<br>~~Gs~~|~~TT~~|
|CMD_SUPPORT<br>~~ee~~|35:32<br>~~ee~~<br>~~es~~|2<br>~~ee~~<br>~~ee Gs~~|00<br>11<br>~~ee~~<br>~~Gs~~|CMD23 CMD20 not supported<br>CMD23 CMD20 supported<br>~~ee~~|
> 21 After initialization the card can change the RCA register
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Table 26: SSR register
|Table 26: SSR register|||||
|---|---|---|---|---|
|Field<br>~~a~~|Bits<br>~~a~~<br>~~rere rr~~|Bit width<br>~~a~~<br>~~rr~~|Typ. value<br>~~a~~|Remark<br>~~a~~|
|Data bus width<br>~~rs~~|511:510<br>~~rs~~<br>~~rere rr~~<br>~~rere rr~~|2<br>~~rs~~<br>~~rr~~<br>~~rr~~|0x222<br>~~rs~~|4 bit width<br>~~rs~~|
|Secured mode<br>~~rs~~|509:509<br>~~rere rr~~<br>~~rs~~<br>~~rere rr~~<br>~~rere rr~~|1<br>~~rr~~<br>~~rs~~<br>~~rr~~<br>~~rr~~|0x0<br>~~rs~~|not secured<br>~~rs~~|
|Reserved for security<br>~~rs~~|508:502<br>~~rere rr~~<br>~~rs~~<br>~~rere rr~~<br>~~rere rr~~|7<br>~~rr~~<br>~~rs~~<br>~~rr~~<br>~~rr~~|0x00<br>~~rs~~|-<br>~~rs~~|
|Reserved<br>~~rs~~|501:496<br>~~rere rr~~<br>~~rs~~<br>~~rere rr~~<br>~~rere rr~~|6<br>~~rr~~<br>~~rs~~<br>~~rr~~<br>~~rr~~|0x00<br>~~rs~~|-<br>~~rs~~|
|SD card type<br>~~rs~~<br>~~a~~|495:480<br>~~rere rr~~<br>~~rs~~<br>~~rere rr~~<br>~~ee~~|16<br>~~rr~~<br>~~rs~~<br>~~rr~~<br>~~ee~~|0x0000<br>~~rs~~<br>~~ee~~|Regular SD<br>~~rs~~<br>~~ee~~|
|Size protected area<br>~~ee~~<br>~~a~~|479:448<br>~~rere rr~~<br>~~ee~~<br>~~ee~~|32<br>~~rr~~<br>~~ee~~<br>~~ee~~|0x02800000<br>0x05000000<br>~~ee~~<br>~~ee~~|40MB<br>80MB<br>~~ee~~<br>~~ee~~|
|Speed class<br>~~ee~~<br>~~a~~|447:440<br>~~ee~~<br>~~ee~~<br>~~a~~<br>~~ee ee~~|8<br>~~ee~~<br>~~ee~~<br>~~ee~~|0x04<br>~~ee~~<br>~~ee~~<br>~~es~~|Class 10<br>~~ee~~<br>~~ee~~|
|Move performance<br>~~a~~<br>~~ee~~<br>~~a~~|439:432<br>~~ee ~~<br>~~a~~<br>~~ee~~<br>~~ee ee~~<br>~~ee ee~~|8<br> ~~ee ~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|0x05<br> ~~ee~~<br>~~ee~~<br>~~es~~<br>~~es~~|5 MB/s<br>sequential write<br>~~ee~~<br>~~ee~~|
|Allocation unit size<br>~~ee~~<br>~~ee~~<br>~~a~~|431:428<br>~~ee~~<br>~~ee ee~~<br>~~ee~~<br>~~ee ee~~|4<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|0x7<br>0x9<br>~~ee~~<br>~~es~~<br>~~ee~~<br>~~es~~|1 MiB<br>4 MiB<br>~~ee~~<br>~~ee~~|
|Reserved<br>~~ee~~<br>~~a~~|427:424<br>~~ee~~<br>~~ee ee~~<br>~~a~~|4<br>~~ee~~<br>~~ee~~|0x0<br>~~ee~~<br>~~es~~|~~ee~~|
|Erase unit size<br>~~aa~~|423:408<br>~~aa~~|16<br>~~aa~~|0x0001<br>~~aa~~|1 AU|
|Erase unit timeout<br>~~aa~~<br>~~a~~|407:402<br>~~aa~~<br>~~aa~~|6<br>~~aa~~|0x01<br>~~aa~~|1 second|
|Erase unit offset<br>~~a~~<br>~~aa~~|401:400<br>~~aa~~<br>~~aa~~|2<br>~~aa~~|0x1<br>~~aa~~|1 seconds|
|UHS mode Speed Grade<br>~~aa~~<br>~~a~~<br>~~a~~|399:396<br>~~aa~~<br>~~a~~<br>~~a~~<br>~~ee~~|4<br>~~aa~~<br>~~ee~~|0x1 / 0x3<br>~~aa~~<br>~~ee~~|UHS Grade 1 / 3<br>~~ee~~|
|Allocation unit size in UHS mode<br>~~a~~<br>~~ee~~<br>~~a~~|395:392<br>~~a~~<br>~~a~~<br>~~ee~~<br>~~ee~~|4<br>~~ee~~<br>~~ee~~|0x7<br>0x9<br>~~ee~~<br>~~ee~~|1 MiB<br>4 MiB<br>~~ee~~<br>~~ee~~|
|Reserved<br>~~a~~|391:312<br>~~ee ~~<br>~~ee~~|80<br> ~~ee ~~<br>~~ee~~|~~ee~~<br>~~es~~|~~ee~~|
|Data structure version identifier,<br>currently1<br>~~ee~~|311:304<br>~~ee~~<br>~~ee~~<br>~~ee~~|8<br>~~ee~~<br>~~ee~~<br>~~ee~~|0x01<br>~~ee~~<br>~~es~~<br>~~es~~|version 1<br>~~ee~~|
|Number of manufacturer marked<br>defect blocks<br>~~ee~~|303:288<br>~~ee ~~<br>~~ee~~<br>~~ee~~<br>~~ee ee~~|16<br> ~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee es~~|0x0008<br>~~es~~<br>~~ee~~<br>~~es~~<br>~~es~~|8 initial BB<br>~~ee~~|
|Number of initial spare blocks<br>(worst chip)<br>~~es~~|287:272<br>~~ee ~~<br>~~es~~<br>~~ee ee~~<br>~~ee~~|16<br> ~~ee~~<br>~~es~~<br>~~ee es~~<br>~~ee~~|0x00bf<br>~~es~~<br>~~es~~<br>~~es~~<br>~~ee~~|191 spare blocks<br>~~es~~<br>~~ee~~|
|Number of initial spare blocks<br>(sum over all chips)<br>~~es~~<br>~~ee~~|271:256<br>~~es~~<br>~~ee ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|16<br>~~es~~<br>~~ee es~~<br>~~ee~~<br>~~ee~~<br>~~ee ee~~|0x017e<br>~~es~~<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|382 spare blocks<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|Percentage of remaining spare<br>blocks(worst chip)<br>~~ee~~<br>~~ee~~<br>~~Ce~~|255:248<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|8<br>~~ee~~<br>~~ee ~~<br>~~ee~~<br>~~ee ee~~<br>~~ee~~<br>|0x6422<br>~~ee~~<br> ~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|100%<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|
|Percentage of remaining spare<br>blocks(all chips)<br>~~ee~~<br>~~ee~~<br>~~Ce~~|247:240<br>~~ee~~<br>~~ee ~~<br>~~ee~~<br>~~ee~~<br>|8<br>~~ee~~<br> ~~ee ee~~<br>~~ee~~<br>~~ee~~<br>|0x6422<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|100%<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|
|Number of uncorrectable ECC<br>errors (not including ECC errors<br>duringstartup)<br>~~ee~~<br>~~Ce~~|239:224<br>~~ee~~<br>~~ee~~<br><br>~~ee~~|16<br>~~ee~~<br>~~ee~~<br><br>~~ee~~|0x000022<br>~~ee~~<br>~~ee~~<br>|0 uncorrectable errors<br>~~ee~~<br>~~ee~~<br><br>~~ee~~|
|Number of correctable ECC errors<br>(not including ECC errors during<br>startup)<br>~~Ceee~~|223:192<br>~~ee ~~<br>~~ee~~<br>~~ee~~|32<br> ~~ee ~~<br>~~ee~~<br>~~ee~~|0x0045074b22<br> ~~ee~~<br>~~ee~~|4523851 correctable ECC errors<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|Lowest wear level class<br>~~eo~~|191:176<br>~~ee ~~<br>~~eo~~|16<br> ~~ee~~<br>~~eo~~|0x000022<br>~~eo~~|0<br>~~ee~~<br>~~eo~~|
|Highest wear level class<br>~~eo~~|175:160<br>~~eo~~|16<br>~~eo~~|0x000022<br>~~eo~~|0<br>~~eo~~|
|Wear level threshold<br>~~a~~|159:144|16|0x01ff|512 block erases per WL class|
|Total number of block erases<br>~~a~~|143:96<br>~~ee~~|48<br>~~ee~~|0x00…1ff022<br>~~ee~~|8176 block erase commands|
|Number of flash blocks, in units<br>of 256 blocks<br>~~ee~~<br>~~a~~|95:80<br>~~ee~~<br>~~ee~~<br>~~ee~~|16<br>~~ee~~<br>~~ee~~<br>~~ee~~|0x0020<br>~~ee~~<br>~~ee~~<br>~~ee~~|8192 flash blocks<br>~~ee~~|
|Maximum flash block erase count<br>target,in wear level class units<br>~~ee~~<br>~~a~~|79:64<br>~~ee~~<br>~~ee~~<br>~~ee~~|16<br>~~ee ~~<br>~~ee~~<br>~~ee~~|0x0075<br> ~~ee~~<br>~~ee~~<br>~~ee~~|Flash endurance 117 WL classes<br>(59904 erases)<br>~~ee~~|
|Power on count<br>~~a~~|63:32<br>~~ee ~~|32<br> ~~ee ~~|0x0000000322<br> ~~ee~~|3x power on|
|Firmware version<br>~~a~~|31:0<br>~~a~~|32|0xYYMMDDXX|Firmware version|
Bit 311:0 are vendor specific, example values in the table
> 22 Value change in operation Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland
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## **9. Life Time Monitoring**
The products support life time monitoring with a vendor specific SD command CMD56 with argument 0x53420001 (read transfer). CMD56 follows the SD protocol specification and returns 512 bytes of data. All multi-byte values are in big endian order (most significant byte first).
Table 27: Life Time Monitoring
|Table 27: Life Time Monitoring||||
|---|---|---|---|
|Field<br>~~a~~<br>~~a~~|Bytes<br>~~es~~|Byte width<br>~~ee~~|Remark|
|Unique ID<br>~~a~~<br>~~es~~<br>~~a~~|0:7<br>~~es~~<br>~~es~~|8<br>~~es~~<br>~~ee~~|53 77 69 73 73 62 69 74<br>«Swissbit» in ASCII<br>~~es~~|
|Reserved<br>~~a~~|8:15<br>~~es~~|8<br>~~ee~~|All 0x00|
|SD CID Register<br>~~a~~|16:31|16|See chapter 8.2|
|Firmware Revision<br>~~a~~|32:47|16|ASCII Null-Terminated|
|User Area Rated Cycles<br>~~a~~|48:51|4||
|User Area Max. Cycle Coun<br>~~es~~|52:55<br>~~es~~|4<br>~~es~~|~~es~~|
|User Area Total Cycle Count<br>~~es~~<br>~~a~~|56:59<br>~~es~~|4<br>~~es~~|~~es~~|
|User Area Average Cycle Count<br>~~a~~<br>~~a~~|60:63|4||
|Reserved<br>~~a~~<br>~~a~~|64:67|4|All 0x00|
|System Area Max. Cycle Count<br>~~a~~<br>~~a~~|68:71|4||
|System Area Total Cycle Count<br>~~a~~|72:75|4||
|System Area Average Cycle Count<br>~~a~~|76:79<br>~~es Gs~~|4<br>~~Gs~~||
|Remaining Card Lifetime Percent (user<br>area)<br>~~es~~|80:80<br>~~es~~<br>~~es Gs~~|1<br>~~es~~<br>~~Gs~~|~~es~~|
|Reserved|81:85<br>~~es Gs~~|5<br>~~Gs~~|All 0x00|
|Current SD Card Speed Mode<br>~~a~~|86:86<br>~~es~~|1|0x00: Default Speed<br>0x01: High Speed<br>0x10: SDR12<br>0x11: SDR25<br>0x12: SDR50<br>0x14: DDR50<br>0x18: SDR104|
|Current SD Card Bus Width<br>~~es~~<br>~~a~~|87:87<br>~~es~~<br>~~es~~|1<br>~~es~~|0x00: 1 bit width<br>0x10: 4 bit width<br>~~es~~|
|Current Spare Blocks User Area<br>~~es~~<br>~~a~~|88:91<br>~~es~~<br>~~es~~|4<br>~~es~~|~~es~~|
|Current Spare Blocks System Area<br>~~a~~<br>~~a~~|92:95<br>~~es~~|4||
|Runtime Bad Blocks User Area<br>~~a~~<br>~~a~~|96:99|4||
|Runtime Bad Blocks System Area<br>~~a~~<br>~~a~~|100:103|4||
|Refresh Count User Area<br>~~a~~<br>~~a~~|104:107|4||
|Refresh Count System Area<br>~~a~~<br>~~a~~|108:111|4||
|Host Interface CRC count<br>~~a~~|112:115|4||
|Power Cycle Counter<br>~~a~~|116:119|4||
|Reserved<br>~~a~~|120:511|392||
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## **10. Part Number Decoder**
S F SD 032G L 1 A S 1 TO - I - N G - 221 - STD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Manuf. Option Memory Type. Configuration Product Type Manuf. Code: Flash Mode Density Manuf. Code: Flash Package Platform Temp. Option Product Generation Flash Vendor Code Memory Organization Number of Channels ~~mm"~~ Technology _**10.1 Manufacturer**_
## _**10.2 Memory Type**_
## _**10.3 Product Type**_
## _**10.4 Density**_
## _**10.5 Platform**_
Swissbit code S Flash F SD Memory Card SD 512 MByte 0512 1 GByte 1024 2 GByte 2048 4 GByte 4096 8 GByte 008G 16 GBytes 016G 32 GBytes 032G SD Memory Card L ~~=~~
## _**10.6 Product Generation**_
## _**10.7 Memory Organization**_
## _**10.8 Technology**_
## _**10.9 Channels**_
|512 MByte<br>1 GByte<br>2 GByte<br>4 GByte<br>8 GByte<br>16 GBytes<br>32 GBytes<br>SD Memory Card<br>**_10.7 Memory Organization_**<br>~~=~~|0512<br>1024<br>2048<br>4096<br>008G<br>016G<br>032G<br>L<br>~~=~~|
|---|---|
|x8|A|
|||
|SD Memory Card controller S-6xx platform|S|
|||
|1 Flash channel|1|
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## _**10.10 Flash Code**_
Toshiba / Kioxia TO ~~ee~~
_**10.11 Temperature Option**_
Extended Temperature Range: -25 °C to 85 °C E Industrial Temperature Range: -40 °C to 85 °C I ~~es~~
## _**10.12 Die Classification**_
|Extended Temperature Range: -25 °C to 85 °C<br>Industrial Temperature Range: -40 °C to 85 °C<br>~~es~~|E<br>I<br>~~es~~|
|---|---|
|SLC MONO (single die package)|M|
|SLC DDP (dual die package)|D|
|SLC QDP (quad die package)|Q|
SLC ODP (octal die package) N
## _**10.13 Pin Mode**_
## _**10.14 Configuration XYZ**_
## _**10.15 Option**_
Single nCE and Single R/nB E Dual nCE and Dual R/nB F Quad nCE and Quad R/nB G ~~a~~ X = Configuration Configuration X UHS-I 2 ~~a~~ Y = Firmware Revision FW Revision Y Version 2 2 ~~es~~ Z = Optional Optional Z Optional 1 ~~a~~ Swissbit/Standard STD ~~ee~~
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## **11.Marking specification**
## _**11.1 Front side**_
## _**11.2 Back side marking**_
SWISSBIT SFSDXXXLXAS1 PartTO-X-XX-XXX-STD number 5021-6131210x Calendar week and year – Lot code Made in Germany CE WEEE
Example of the back side laser marking
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## **12. Revision History**
Table 28: Document Revision History
|Date|Revision|Description|Revision Details|
|---|---|---|---|
|13-April-2022|1.00|Initial release|Doc. req. no. 5366|
|22-April-2022|1.01|Adjusted Performance values of 512MB-2GB|Doc. req. no. 5380|
|15-August-2022|1.02|Updated to firmware “2”|Doc. req. no. 5678|
## Disclaimer:
No part of this document may be copied or reproduced in any form or by any means, or transferred to any third party, without the prior written consent of an authorized representative of Swissbit AG (“SWISSBIT”). The information in this document is subject to change without notice. SWISSBIT assumes no responsibility for any errors or omissions that may appear in this document, and disclaims responsibility for any consequences resulting from the use of the information set forth herein. SWISSBIT makes no commitments to update or to keep current information contained in this document. The products listed in this document are not suitable for use in applications such as, but not limited to, aircraft control systems, aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. Moreover, SWISSBIT does not recommend or approve the use of any of its products in life support devices or systems or in any application where failure could result in injury or death. If a customer wishes to use SWISSBIT products in applications not intended by SWISSBIT, said customer must contact an authorized SWISSBIT representative to determine SWISSBIT willingness to support a given application. The information set forth in this document does not convey any license under the copyrights, patent rights, trademarks or other intellectual property rights claimed and owned by SWISSBIT. The information set forth in this document is considered to be “Proprietary” and “Confidential” property owned by SWISSBIT.
ALL PRODUCTS SOLD BY SWISSBIT ARE COVERED BY THE PROVISIONS APPEARING IN SWISSBIT’S TERMS AND CONDITIONS OF SALE ONLY, INCLUDING THE LIMITATIONS OF LIABILITY, WARRANTY AND INFRINGEMENT PROVISIONS. SWISSBIT MAKES NO WARRANTIES OF ANY KIND, EXPRESS, STATUTORY, IMPLIED OR OTHERWISE, REGARDING INFORMATION SET FORTH HEREIN OR REGARDING THE FREEDOM OF THE DESCRIBED PRODUCTS FROM INTELLECTUAL PROPERTY INFRINGEMENT, AND EXPRESSLY DISCLAIMS ANY SUCH WARRANTIES INCLUDING WITHOUT LIMITATION ANY EXPRESS, STATUTORY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
©2022 SWISSBIT AG All rights reserved.
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Updated at June 3, 2026
Swissbit is a premier independent European manufacturer specializing in industrial-grade storage and embedded IoT solutions. Founded in 2001, the company is globally recognized for engineering highly reliable products designed to meet the rigorous demands of the industrial, automotive, telecommunications, and medical sectors. With manufacturing operations rooted in Germany, Swissbit delivers exceptional quality, long-term component availability, and custom optimization for mission-critical applications. The core of the company's offering centers on advanced semiconductor memory solutions, with a strong emphasis on high-performance flash memory cards. These robust storage options, which include industrial SD cards, microSD memory cards, and CompactFlash, are specifically engineered to provide secure, reliable data retention in extreme operating environments. Swissbit's flash memory products integrate sophisticated wear-leveling and error-correction technologies to guarantee maximum endurance and data integrity over extended product lifecycles. Beyond portable flash memory cards, Swissbit's comprehensive storage ecosystem encompasses managed NAND BGAs, USB flash drives, and a wide array of solid-state drives across multiple interfaces. By combining cutting-edge packaging expertise with hardware-based security features, Swissbit empowers design engineers to reliably store and protect sensitive data across the entire spectrum of modern connected devices.
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Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
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We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
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