SFCA008GH3AA2TO-I-GS-22P-STD
Flash Memory Card, pSLC, CFast Card, 8 GB
- Manufacturer: SWISSBIT
- Product type: Flash Memory Cards
- SVHC: No SVHC (15-Jan-2018)
- App Rating: -
- UHS Standard: -
- Product Range: F-66 Series
- Memory Capacity: 8GB
- Video Speed Class: -
- Supply Voltage Nom: 3.3V
- Standard Speed Class: -
- Flash Memory Card Type: CFast Card
- Operating Temperature Max: 85°C
- Operating Temperature Min: -40°C
| Delivery and price | |
|---|---|
| Units per pack | 1 |
| Price | 196.65 € |
| Current stock | 10+ |
| Lead time | 30 days |
Product Data Sheet
## everbit[™]
**Industrial CFast™ Card F-66 Series** SATA Gen3 - 6.0 Gbit/s, pSLC
Commercial and Industrial Temperature Grade
Date: October 31, 2019 Revision: 1.04
## **Contents**
||**Contents**|
|---|---|
|1.|PRODUCT SUMMARY ............................................................................................................ 3|
|2.|PRODUCT FEATURES ............................................................................................................ 4|
|3.|ORDERING INFORMATION ...................................................................................................... 5|
|4.|PRODUCT DESCRIPTION ......................................................................................................... 6|
||4.1 PERFORMANCESPECIFICATIONS...................................................................................................... 7|
||4.2 CURRENTCONSUMPTION............................................................................................................ 7|
||4.3 ENVIRONMENTALSPECIFICATIONS.................................................................................................. 8|
||4.4 REGULATORYCOMPLIANCE......................................................................................................... 9|
||4.5 MECHANICALSPECIFICATIONS...................................................................................................... 9|
||4.6 RELIABILITY ANDENDURANCE.................................................................................................... 10|
||4.7 DRIVEGEOMETRYSPECIFICATION.................................................................................................. 10|
|5.|ELECTRICAL INTERFACE ......................................................................................................... 11|
|6.|PACKAGE MECHANICAL ........................................................................................................ 12|
|7.|ATA COMMANDS ............................................................................................................... 13|
|8.|IDENTIFY DEVICE INFORMATION .............................................................................................. 15|
|9.|S.M.A.R.T. FUNCTIONALITY ....................................................................................................17|
||9.1 S.M.A.R.T. SUBCOMMANDS...................................................................................................... 17|
||9.2 S.M.A.R.T. READDATA.......................................................................................................... 17|
||9.3 S.M.A.R.T. ATTRIBUTES........................................................................................................ 18|
||9.4 S.M.A.R.T. ATTRIBUTEENTRYSTRUCTURE........................................................................................19|
|10.|PART NUMBER DECODER ...................................................................................................... 20|
|11.|MARKING SPECIFICATION ..................................................................................................... 22|
||11.1 TOPVIEW.........................................................................................................................22|
||11.2 BOTTOMVIEW.....................................................................................................................22|
||11.3 LABELCONTENT...................................................................................................................22|
|12.|REVISION HISTORY ............................................................................................................. 23|
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## **F-66 Series – Industrial CFast™ Solid State Drive, pSLC 4 GBytes up to 120 GBytes**
## **1. Product Summary**
- Capacities: 4 GBytes, 8 GBytes, 16 GBytes, 30 GBytes, 60 GBytes, 120 GBytes
- Form Factor: CFast-Sized Solid State Drive (36.4 mm x 42.8 mm x 3.6 mm)
- Compliance: SATA Gen3 - 6 Gbit/s (Gen2 - 3 Gbit/s and Gen1 - 1.5 Gbit/s backward compatible)
- CFast 2.0 Compatible
- Command Sets: Supports ATA/ATAPI-8 and ACS-2
- High Performance:
- Burst Transfer Rate: Up to 600 MBytes/s in SATA Gen3 - 6.0 Gbit/s
- Read Performance: Sequential Read up to 520 MBytes/s, Random Read 4K up to 80,000 IOPS
- Write Performance: Sequential Write up to 415 MBytes/s, Random Write 4K up to 75,000 IOPS
- Operating Temperature Range[1] :
- Commercial: 0 °C to 70 °C
- Industrial: -40 °C to 85 °C
- Storage Temperature Range: -40 °C to 85 °C
- Operating Voltage: 3.3V ± 5%
- Power (Max Capacity):
- Read (Active): 1.4 W
- Write (Active): 1.8 W
- Idle: 380 mW
- Slumber: 116 mW
- Data Retention: 10 Years @ Life Begin; 1 Year @ Life End
- Endurance in TeraBytes Written (TBW) @ Max Capacity[2] :
- Client > 1805
- Embedded > 495
- Enterprise > 465
- Shock/Vibration: 1,500 g / 50 g
- High-Performance 32-Bit Processor with Integrated, Parallel Flash Interface Engines:
- Pseudo Single-Level Cell (pSLC) NAND Flash
- Hardware BCH Code ECC (up to 66 bit correction per 1 KByte page)
- High Reliability:
- Mean Time Between Failure (MTBF): > 2,000,000 hours
- Data Reliability: < 1 non-recoverable error per 10[16] bits read
> 1 Adequate airflow is required to ensure the temperature, as reported in the S.M.A.R.T. data, does not exceed 115°C (industrial temperature drive) and 100°C (commercial temperature drive) respectively.
> 2 According to JEDEC (JESD47I), the time to write the full TBW is 18 months. Higher average daily data volume reduces the specified TBW. The values listed are estimates and are subject to change without notice.
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## **2. Product Features**
- Pseudo SLC Flash with 20,000 Program/Erase Cycles and everbit™ Reduced Write Amplification
- Dynamic and Static Wear Leveling
- Subpage Mode Flash Translation Layer (FTL)
- Data Care Management
- Active: Adaptive Read Refresh
- Passive: Background Media Scan
- Lifetime Enhancements
- Dynamic Bad Block Remapping
- Write Amplification Reduction
- On-Board Power Fail Protection
- AHCI, TRIM, and NCQ Support
- ATA Security Feature Set Support
- DEVSLP Compatible
- In-Field Firmware Update
- Enterprise-Grade Self-Monitoring, Analysis, and Reporting Technology (S.M.A.R.T.)
- Life Cycle Management
- Controlled “Locked” BOM
- RoHS-6 Compliant
- AES256 Encryption (on request)
- 30 µinch Gold-Plated Connector (on request)
- Swissbit Life Time Monitoring (SBLTM) Tool and SDK for SBLTM (on request)
leL [| -[ole[ [sis
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## **3. Ordering Information**
Table 1: Standard Product List
|Capacity|Temperature|Temperature|
|---|---|---|
||Commercial|Industrial|
||Part Number|Part Number|
|4 GBytes|SFCA004GHxAA1TO-C-GS-2yP-STD|SFCA004GHxAA1TO-I-GS-2yP-STD|
|8 GBytes|SFCA008GHxAA2TO-C-GS-2yP-STD|SFCA008GHxAA2TO-I-GS-2yP-STD|
|16 GBytes|SFCA016GHxAA2TO-C-GS-2yP-STD|SFCA016GHxAA2TO-I-GS-2yP-STD|
|30 GBytes|SFCA030GHxAA2TO-C-LB-2yP-STD|SFCA030GHxAA2TO-I-LB-2yP-STD|
|60 GBytes|SFCA060GHxAA2TO-C-HC-2yP-STD|SFCA060GHxAA2TO-I-HC-2yP-STD|
|120 GBytes|SFCA120GHxAA2TO-C-OC-2yP-STD|SFCA120GHxAA2TO-I-OC-2yP-STD|
x = product generation and y = firmware revision
Table 2: Available Part Numbers
|Capacity|Temperature|Temperature|
|---|---|---|
||Commercial|Industrial|
||Part Number|Part Number|
|4 GBytes|SFCA004GH3AA1TO-C-GS-22P-STD|SFCA004GH3AA1TO-I-GS-22P-STD|
|8 GBytes|SFCA008GH3AA2TO-C-GS-22P-STD|SFCA008GH3AA2TO-I-GS-22P-STD|
|16 GBytes|SFCA016GH3AA2TO-C-GS-22P-STD|SFCA016GH3AA2TO-I-GS-22P-STD|
|30 GBytes|SFCA030GH3AA2TO-C-LB-22P-STD|SFCA030GH3AA2TO-I-LB-22P-STD|
|60 GBytes|SFCA060GH3AA2TO-C-HC-22P-STD|SFCA060GH3AA2TO-I-HC-22P-STD|
|120 GBytes|SFCA120GH3AA2TO-C-OC-22P-STD|SFCA120GH3AA2TO-I-OC-22P-STD|
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## **4. Product Description**
The Swissbit[®] F-66 Solid State Drive (SSD) leverages the CFast 2.0 compatible, industry-standard form factor and connectivity. Combined with a SATA Gen3 controller and pseudo Single-Level Cell (pSLC) NAND flash technology, the F-66 realizes a robust non-volatile storage solution for today’s embedded storage applications. A functional block diagram of the F-66 SSD is provided below in Figure 1.
Figure 1: F-66 CFast Functional Block Diagram
**==> picture [216 x 149] intentionally omitted <==**
**----- Start of picture text -----**<br>
NAND<br>Flash<br>NAND<br>Flash<br>SATA (6 Gbps) Controller<br>NAND<br>Flash<br>DRAM Power NAND<br>Cache Manager Flash<br>**----- End of picture text -----**<br>
The F-66 SSD incorporates two existing industry standards into a single product: the CompactFlash™ (CF) card form factor and the Serial ATA (SATA) interface commonly used with hard disk drives (HDDs) and SSDs. The interface consists of a female 7-pin SATA data connector and a female 17-pin power connector. Because standard SATA hard drives use male connectors, an adaptor is required to replace drives with CFast cards. CFast cards can be used to replace HDDs, SSDs, and Compact Flash™ cards in applications requiring smaller form factors, high endurance, and the ability to withstand shock, vibration, extreme temperatures (-40 °C to 85 °C), high altitude, and rough environmental conditions. The Swissbit CFast™ cards provide rugged storage for embedded and industrial systems where performance, data and system reliability, power fail protection, and flexibility are important design considerations.
The on-board SATA Gen3 controller manages the interface between the host and the non-volatile NAND flash memory array. The controller supports SATA Gen3 (6 Gbit/s) interface speeds and is fully backward compatible with SATA Gen2 (3 Gbit/s) and SATA Gen1 (1.5 Gbit/s) to enable the broadest possible range of platform compatibility. The controller utilizes an ARC 700 processing core, providing an optimum balance between read/write performance, Data Care Management, and power fail protection.
Swissbit’s everbit™ F-66 CFast cards deliver an impressive IOPS rate and highest endurance by combining pSLC flash technology with a high-end controller architecture, firmware, and an optimized configuration. The everbit™ SSDs are designed for applications requiring high data transfer rates (see Table 3: Read/Write Performance). This performance is achieved through an on-board DRAM cache and the controller 4-channel NAND flash interface that supports ONFI and Toggle 2 (400 MT/s) interface speeds. The use of pSLC NAND increases the endurance of the drive, extending the rated program/erase (P/E) cycles to 20,000. In addition, the F-66 series feature Swissbit’s proven power fail safety and support for the ATA security feature set, NCQ, TRIM, advanced wear leveling and bad block management, and in-field firmware updates.
An on-controller BCH Error Correction Code (ECC) engine provides the F-66 hardware ECC, which is capable of correcting up to 66 bits per 1 KByte page. This, combined with Swissbit’s Data Care Management firmware, provides both passive and active data management strategies to ensure data integrity and extract the maximum possible endurance and reliability from the NAND flash array. These strategies include, but are not limited to, Global Wear Leveling, Adaptive Read Refresh, Background Media Scan, and Dynamic Block Remapping.
The risk of data loss as a result of an unexpected power fail event is mitigated using a robust sequence of voltage regulators and detectors designed to ensure a graceful shutdown of the controller and NAND flash array. A combination of both hardware and firmware power fail features prevent the possibility of resident data being corrupted during an unexpected power failure.
## Related Documentation
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- CFast Specification 2.0 (http://www.compactflash.org)
- Serial ATA International Organization Serial ATA Revision 3.0 (http://www.serialata.org)
- Serial Transport Protocols and Physical Interconnect (ATA/ATAPI-8) (http://www.t13.org)
- Electronic Industries Alliance (http://www.ecianow.org)
## _**4.1 Performance Specifications**_
The F-66 read/write sequential and random CDM performance benchmarks are detailed in the following Table 3.
Table 3: Read/Write Performance[3]
|Capacity|Sequential Read<br>(MBPS)|Sequential Write<br>(MBPS)|Random Read 4K<br>(IOPS)|Random Write 4K<br>(IOPS)|
|---|---|---|---|---|
|4 GBytes|150|70|17,000|15,000|
|8 GBytes|300|130|32,000|32,000|
|16 GBytes|300|110|32,000|27,000|
|30 GBytes|520|220|63,000|55,000|
|60 GBytes|520|410|80,000|72,000|
|120 GBytes|520|415|80,000|75,000|
## _**4.2 Current Consumption**_
The drive-level current consumption as a function of operating mode is shown in the following Table 4.
Table 4: Current Consumption[4]
|Table 4: Current Consumption<br>~~es~~|Table 4: Current Consumption[4]<br>~~es~~|~~es es~~|~~es~~|~~ee~~|~~es~~|~~es~~||
|---|---|---|---|---|---|---|---|
|Drive Capacity<br>~~es~~<br>~~es~~|Sequential<br>Read<br>~~es~~<br>~~es~~|Sequential<br>Write<br>~~es es~~|Random<br>Read 4K<br>~~es~~|Random<br>Write 4K<br>~~ee~~|Idle<br>~~es~~|Slumber<br>~~es~~|Unit|
|4 GBytes<br>~~es~~<br>~~es~~<br>~~es~~|225<br>~~es ~~<br>~~es~~|235<br> ~~es es~~|225<br>~~es ~~|235<br> ~~ee ~~|105<br> ~~es ~~|35<br> ~~es~~|mA|
|8 GBytes<br>~~es ~~<br>~~es~~<br>~~Ss~~|270<br> ~~es~~<br>~~es~~|295|265|290|105|35||
|16 GBytes<br>~~es~~<br>~~Ss~~<br>~~es~~|275<br>~~es~~<br>~~es~~|295|265|290|105|35||
|30 GBytes<br>~~Ss~~<br>~~es~~<br>~~es~~|350<br>~~es~~<br>~~es~~<br>~~es~~|385|340|380|105|35||
|60 GBytes<br>~~es~~<br>~~es~~<br>~~es~~|425<br>~~es~~<br>~~es~~|550|415|530|110|35||
|120 GBytes<br>~~es~~<br>~~es~~|435<br>~~es~~|560|425|555|115|35||
> 3 The values are measured using Crystal Disk Mark (CDM) across the full drive density. Performance depends on flash type and number, file/cluster size, and burst speed.
> 4 All values are the maximum recorded running IOMeter script for Read/Write operations with 1MB transfer size in 1 minute intervals at 25 °C, with nominal supply voltage and SATA transfer rate 6Gb/s.
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## _**4.3 Environmental Specifications**_
## Recommended Operating Conditions
The recommended operating conditions for the F-66 SSD are provided in the following Table 5.
Table 5: Recommended Operating Conditions[5]
|Table 5: Recommended Operating Conditions[5]||
|---|---|
|Parameter|Value|
|Commercial Operating Temperature|0 °C to 70 °C|
|Industrial Operating Temperature|-40 °C to 85 °C|
|Power Supply VCCVoltage|3.3 V ± 5%|
## Recommended Storage Conditions
The recommended storage conditions are listed in the following Table 6.
Table 6: Recommended Storage Conditions
|Table 6: Recommended Storage Conditions||
|---|---|
|Parameter|Value|
|Commercial Storage Temperature|-40 °C to 85 °C|
|Industrial Storage Temperature|-40 °C to 85 °C|
## Shock, Vibration and Humidity
The maximum shock, vibration and humidity conditions are listed in the following Table 7.
Table 7: Shock, Vibration and Humidity
|Table 7: Shock, Vibration and Humidity||
|---|---|
|Parameter|Value|
|Non-Operating Shock|1,500g, 0.5 ms pulse duration, half-sine wave<br>(IEC 60068-2-27 and JESD22-B110 cond. B)|
|Non-Operating Vibration|50g, 80-2,000 Hz, 3 axes, 12 cycles<br>(IEC 60068-2-6,MIL-STD-883 H Method 2007.3)|
|Humidity (Non-Condensing)|85% RH 85 °C, 1000 hrs, max. supply voltage<br>(JESD22-A101B)|
> 5 Adequate airflow is required to ensure the temperature, as reported in the S.M.A.R.T. data, does not exceed 115°C (industrial temperature drive) and 100°C (commercial temperature drive) respectively.
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## _**4.4 Regulatory Compliance**_
The F-66 devices comply with the standards listed in the following Table 8.
Table 8: Regulatory Compliance
|Compliance<br>~~A~~<br>~~ee~~|Country<br>~~A~~|Type<br>~~A~~|Standard(s)/Directive<br>~~A~~|
|---|---|---|---|
|CE<br>~~ee~~<br>~~ee~~|European Union<br>~~ee~~|Certificate<br>~~eee~~|2011/65/EU, 2012/19/EU, 2004/30/EU<br>~~ee~~|
|CE/EMC<br>~~ee~~<br>~~ee~~|European Union<br>~~ee~~|Compliance<br>~~eee~~|2004/108/EC (AS/NZS CISPR22 :2009 +A1:2010, EN 61000-<br>6-2:2005/AC:2005,EN 61000-6-4:2007/A1:2011<br>[EN55022:2010 Class B])<br>~~ee~~|
|CE/RoHS<br>~~ee~~<br>~~sO~~<br>~~ee~~|European Union<br>~~ee ~~<br>~~sO~~<br>|Compliance<br> ~~eee~~<br>~~sO~~<br>|2011/65/EU<br>~~ee~~<br>~~sO~~<br>|
|CE/WEEE<br>~~ee~~|European Union<br>|Compliance<br>|2012/19/EU<br>|
|REACH<br>~~eea~~|European Union<br>~~a~~|Certificate<br>~~a~~|1907/2006<br>~~a~~|
|FCC<br>~~a~~<br>~~a~~|United States<br>~~a~~<br>~~a~~|Certificate<br>~~a~~<br>~~a~~|47CFR Part 15, Class B<br>~~a~~<br>~~a~~|
|UL<br>~~a~~<br>~~A~~|United States<br>~~a~~<br>~~A~~|Compliance<br>~~a~~<br>~~A~~|UL/CSA 60950-1, Second Edition<br>~~a~~<br>~~A~~|
|VCCI<br>~~a~~<br>~~ee~~|Japan<br>~~a~~<br>~~ee~~|Compliance<br>~~a~~<br>~~ee~~|ITE (Class A)<br>~~a~~|
|CCC<br>~~a~~<br>~~ee~~|China<br>~~a~~<br>~~ee~~|Compliance<br>~~a~~<br>~~ee~~|Laws and Regulations of the People's Republic of China<br>GoverningForeign-Related Matters(1991.7)<br>~~a~~|
|C-Tick<br>~~ee~~<br>~~a~~|Australia<br>~~ee~~|Compliance<br>~~ee~~|AS/NZS CISPR22|
|TüV<br>~~a~~<br>~~a~~|Germany|Compliance|TüV IEC 60950-1; UL/CSA 60950-1, Second Edition|
|SATA-IO<br>~~a~~|International|Compliance|SATA Revision 1.4 Interoperability|
## _**4.5 Mechanical Specifications**_
The F-66 SSD consists of a flash controller and NAND flash memory devices. The controller interfaces with a host system allowing data to be written to and read from the flash memory array. The SSD has a female 7-pin SATA data connector and a female 17-pin power connector. Because standard SATA hard drives use male connectors, an adaptor is required to replace drives with CFast cards. Physical dimensions are detailed in the following Table 9. Figure 3 on page 12 illustrates the F-66 dimensions and connector location.
Table 9: Physical Dimensions
|Table 9: Physical Dimensions|Table 9: Physical Dimensions||
|---|---|---|
|Physical Dimensions||Unit|
|Length|36.40±0.15|mm|
|Width|42.80±0.10||
|Thickness (Max)|3.60||
|Weight (Max Capacity)|10|g|
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## _**4.6 Reliability and Endurance**_
The Mean Time Between Failure (MTBF) is specified to exceed the value listed in the following Table 10. Data reliability with effective error tolerance and data retention at the beginning and end of life is also provided.
Table 10: Reliability
|Table 10: Reliability||
|---|---|
|Parameter|Value|
|MTBF (at 25 °C)|> 2,000,000 hours|
|Data Reliability|< 1 Non-Recoverable Error per 1016Bits Read|
|Data Retention|10 Years at Start (JESD47), 1 Year at EOL|
|Endurance represented as both TeraBytes Written (TBW) and full Drive Writes Per Day (DWPD) for three different|Endurance represented as both TeraBytes Written (TBW) and full Drive Writes Per Day (DWPD) for three different|
|---|---|
|application scenarios is provided in the following Table 11.||
|Table 11: Endurance6||
|Drive<br>Capacity<br>Client7<br>Enterprise<br>Embedded<br>TBW<br>DWPD8<br>TBW<br>DWPD8<br>TBW<br>DWPD8<br>4 GBytes<br>56.45<br>13.20<br>11.70<br>2.735<br>15.63<br>3.65<br>8 GBytes<br>112.90<br>25.53<br>2.984<br>31.25<br>16 GBytes<br>225.83<br>58.13<br>3.40<br>62.50<br>30 GBytes<br>451.65<br>116.26<br>125.00<br>60 GBytes<br>903.31<br>232.53<br>250.00<br>120 GBytes<br>1806.62<br>465.06<br>500.00<br>~~a~~||
|**_4.7 Drive Geometry Specification_**||
|The F-66 drive geometry is set to report industry standard LBA settings per the IDEMA standard (LBA1-03). The|The F-66 drive geometry is set to report industry standard LBA settings per the IDEMA standard (LBA1-03). The|
|values for each capacity are shown in the following Table 12.||
|Table 12: Drive Geometry||
|Raw Capacity<br>User Capacity9<br>Total LBA<br>User Addressable Bytes<br>Decimal<br>(Unformatted)<br>4 GBytes<br>4 GBytes<br>7,732,368<br>3,958,972,416<br>8 GBytes<br>8 GBytes<br>15,465,744<br>7,918,460,928<br>16 GBytes<br>15 GBytes<br>29,323,728<br>15,013,748,736<br>32 GBytes<br>30 GBytes<br>58,626,288<br>30,016,659,456<br>64 GBytes<br>60 GBytes<br>117,231,408<br>60,022,480,896<br>128 GBytes<br>120 GBytes<br>234,441,648<br>120,034,123,776<br>~~a~~||
|6Client and Enterprise workloads follow the JEDEC JESD219 standard. the Embedded workload creates a 4 KByte file and appends it.|Client and Enterprise workloads follow the JEDEC JESD219 standard. the Embedded workload creates a 4 KByte file and appends it.|
|Enterprise workload values are measured based on 168 hours of runtime. 1 TByte = 1012bytes||
> 7 Because the JEDEC master trace file for the Client workload is designed for capacities ≥ 60 GBytes, the TBW and DWPD values for the capacities below 60 GBytes are estimates
> 8 DWPD values are based on a service life of 3 years
> 9 1 GByte = 109 bytes
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## **5. Electrical Interface**
The CFast card is connected with a standard 7-pin SATA connector and a standard 17-pin power connector. (Figure 2). The signal/pin assignments and descriptions are listed in the following Table 13.
Figure 2: F-66 CFast Connector
|Table 13: Pin Assignment, Name and Description<br>~~es es~~|Table 13: Pin Assignment, Name and Description<br>~~es~~||
|---|---|---|
|Pin<br>~~es es~~<br>~~es~~|Signal Name<br>~~es~~<br>~~Rs~~|Description|
|S1<br>~~es es~~<br>~~es~~<br>~~es~~|SGround<br>~~es~~<br>~~Rs~~<br>~~Cs~~|Signal Ground|
|S2<br>~~es~~<br>~~es~~<br>~~es~~|A+<br>~~Rs~~<br>~~Cs~~|+ Differential Device Transmit Signal|
|S3<br>~~es~~<br>~~es~~<br>~~es~~|A-<br>~~Cs~~<br>~~Rs~~|- Differential Device Transmit Signal|
|S4<br>~~es~~<br>~~es~~<br>~~es~~|SGround<br>~~Rs~~|Signal Ground|
|S5<br>~~es~~<br>~~es~~<br>~~es~~|B-<br>~~Rs~~<br>~~Ps~~|- Differential Device Receive Signal|
|S6<br>~~es~~<br>~~es~~<br>~~es~~|B+<br>~~Ps~~<br>~~Gs~~|+ Differential Device Receive Signal|
|S7<br>~~es~~<br>~~es~~<br>~~PO~~<br>~~—SY~~|SGround<br>~~Ps~~<br>~~Gs~~<br>~~—SY~~|Signal Ground|
|~~es~~<br>~~PO~~<br>~~—SY~~|~~Gs~~<br>~~—SY~~||
|PC1<br>~~PO~~<br>~~—SY~~<br>~~es~~<br>~~es~~|CDI10<br>~~—SY~~<br>~~Gs~~<br>~~ts~~|Card Detect In|
|PC2<br>~~es~~<br>~~es~~<br>~~es~~|PGround<br>~~Gs~~<br>~~ts~~|Power Ground|
|PC3<br>~~es~~<br>~~es~~<br>~~es~~|DEVSLP<br>~~ts~~<br>~~rs~~|DEVSLP Input|
|PC4-PC6<br>~~es~~<br>~~es~~<br>~~es~~|NC<br>~~rs~~|No Connect|
|PC7<br>~~es~~<br>~~es~~<br>~~es~~|PGround<br>~~rs~~<br>~~rs~~|Power Ground|
|PC8<br>~~es~~<br>~~es~~<br>~~es~~|LED1<br>~~rs~~<br>~~rs~~|Reserved|
|PC9<br>~~es~~<br>~~es~~<br>~~es~~|LED2<br>~~rs~~<br>~~rs~~|Reserved|
|PC10-PC11<br>~~es~~<br>~~es~~<br>~~es~~|~~rs~~<br>~~rs~~|Reserved|
|PC12<br>~~es~~<br>~~es~~<br>~~es~~|IFDet<br>~~rs~~<br>~~ts~~|Card Output, Connected to GND|
|PC13-PC14<br>~~es~~<br>~~es~~<br>~~es~~|3.3 V<br>~~rs~~<br>~~ts~~<br>~~rs~~|Device Power 3.3 V|
|PC15-PC16<br>~~es~~<br>~~es~~<br>~~ee Cs~~|PGround<br>~~ts~~<br>~~rs~~<br>~~Cs~~|Power Ground|
|PC17<br>~~es~~<br>~~ee Cs~~|CDO10<br>~~rs~~<br>~~Cs~~|Card Detect Out|
10 CDI and CDO are physically shorted together in the device. The CDO logic state shall follow the CDI logic state whether the device is powered up or not.
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## **6. Package Mechanical**
NOTE: The dimensions in the following Figure 3 are the maximum values based on the CFast specification. For the product dimensions, see the Mechanical Specifications section on page 9.
Figure 3: CFast SSD Dimensions in mm [in]
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## **7. ATA Commands**
This section provides information on the ATA commands supported by the SSD. The commands are issued to the ATA by loading the required registers in the command block with the supplied parameter and then writing the command code to the register. For backward compatibility, some commands are implemented as a “no operation”. See the following Table 14 for a list of ATA commands the device supports. For details about setting up the command registers, see the latest ATA Specification.
Table 14: ATA Command Set
|Table 14: ATA Command Set|~~DD~~||
|---|---|---|
|Command<br>~~I~~|Code<br>~~I~~<br>~~DD~~|Protocol<br>~~I~~|
|General Feature Set<br>~~I~~<br>~~DD~~<br>~~ee~~<br>~~ID~~|||
|Execute Device Diagnostic<br>~~nD~~<br>~~Cn~~|90h<br>~~nD~~<br>~~ID~~<br>~~ID~~<br>|Execute Device Diagnostic<br>~~nD~~<br>|
|Flush Cache<br>~~I~~<br>~~Cn~~|E7h<br>~~ID~~<br>~~I~~<br>~~ID~~<br>|Non-data<br>~~I~~<br>|
|IdentifyDevice<br>~~I~~<br>~~Cn~~|ECh<br>~~I~~<br>~~ID~~<br><br>~~ID~~|PIO data-in<br>~~I~~<br>|
|Initialize Drive Parameters<br>~~CnnD~~<br>~~Cn~~|91h<br>~~ID~~<br>~~nD~~<br>~~ID~~<br>~~ID~~<br>|Non-data<br>~~nD~~<br>|
|Read DMA<br>~~I~~<br>~~Cn~~|C8h<br>~~ID~~<br>~~I~~<br>~~ID~~<br>|DMA<br>~~I~~<br>|
|Read LogExt<br>~~I~~<br>~~Cn~~|2Fh<br>~~I~~<br>~~ID~~<br><br>~~I~~|PIO data-in<br>~~I~~<br>|
|Read Multiple<br>~~Cnes~~|C4h<br>~~ID~~<br>~~es~~<br>~~I~~<br>~~ID~~|PIO data-in<br>~~es~~|
|Read Sector(s)<br>~~es~~<br>~~I~~|20h<br>~~es~~<br>~~I~~<br>~~I~~<br>~~ID~~|PIO data-in<br>~~es~~<br>~~I~~|
|Read VerifySector(s)<br>~~Ce~~|40h or 41h<br>~~ID~~<br>~~Ce~~|Non-data<br>~~Ce~~|
|Set Feature<br>~~Ce~~<br>~~nn~~|EFh<br>~~Ce~~<br>~~nn~~<br>~~ID~~|Non-data<br>~~Ce~~<br>~~nn~~|
|Set Multiple Mode<br>~~nn~~<br>~~I~~|C6h<br>~~nn~~<br>~~I~~<br>~~ID~~|Non-data<br>~~nn~~<br>~~I~~|
|Write DMA<br>~~Ce~~|CAh<br>~~ID~~<br>~~Ce~~|DMA<br>~~Ce~~|
|Write Multiple<br>~~Ce~~<br>~~nn~~|C5h<br>~~Ce~~<br>~~nn~~<br>~~ID~~|PIO data-out<br>~~Ce~~<br>~~nn~~|
|Write Sector(s)<br>~~nn~~<br>~~I~~|30h<br>~~nn~~<br>~~I~~<br>~~ID~~|PIO data-out<br>~~nn~~<br>~~I~~|
|NOP<br>~~Ce~~|00h<br>~~ID~~<br>~~Ce~~|Non-data<br>~~Ce~~|
|Read Buffer<br>~~Ce~~<br>~~nn~~|E4h<br>~~Ce~~<br>~~nn~~<br>~~ID~~|PIO data-in<br>~~Ce~~<br>~~nn~~|
|Write Buffer<br>~~nn~~<br>~~I~~|E8h<br>~~nn~~<br>~~I~~<br>~~ID~~|PIO data-out<br>~~nn~~<br>~~I~~|
|Power Management Feature Set<br>~~ID~~<br>~~Ce~~|||
|Check Power Mode<br>~~Ce~~<br>~~Pn~~|E5h or 98h<br>~~Ce~~<br>~~Pn~~<br>~~ID~~|Non-data<br>~~Ce~~<br>~~Pn~~|
|Idle<br>~~Pn~~<br>~~I~~<br>~~a~~|E3h or 97h<br>~~Pn~~<br>~~I~~<br>~~ID~~<br>~~nn~~|Non-data<br>~~Pn~~<br>~~I~~|
|Idle Immediate<br>~~I~~<br>~~a~~|E1h or 95h<br>~~ID~~<br>~~I~~<br>~~nn~~<br>~~Gn~~|Non-data<br>~~I~~|
|Sleep<br>~~I~~<br>~~a~~|E6h or 99h<br>~~I~~<br>~~nn~~<br>~~Gn~~<br>~~nD~~|Non-data<br>~~I~~|
|Standby<br>~~a~~<br>~~I~~|E2h or 96h<br>~~nn~~<br>~~Gn~~<br>~~I~~<br>~~nD~~<br>~~GR~~|Non-data<br>~~I~~|
|StandbyImmediate<br>~~I~~|E0h or 94h<br>~~nD~~<br>~~I~~<br>~~GR~~|Non-data<br>~~I~~|
|SecurityMode Feature Set<br>~~I~~<br>~~GR~~<br>~~Ce~~<br>~~TD~~|||
|SecuritySet Password<br>~~Ce~~<br>~~ID~~<br>~~a~~|F1h<br>~~Ce~~<br>~~ID~~<br>~~TD~~<br>~~**G**t~~|PIO data-out<br>~~Ce~~<br>~~ID~~|
|SecurityUnlock<br>~~I~~<br>~~a~~|F2h<br>~~TD~~<br>~~I~~<br>~~**G**t~~<br>~~n~~|PIO data-out<br>~~I~~|
|SecurityErase Prepare<br>~~I~~<br>~~a~~|F3h<br>~~I~~<br>~~**G**t~~<br>~~n~~<br>~~nD~~|Non-data<br>~~I~~|
|SecurityErase Unit<br>~~a~~<br>~~I~~|F4h<br>~~**G**t~~<br>~~n~~<br>~~I~~<br>~~nD~~<br>~~Gt~~|PIO data-out<br>~~I~~|
|SecurityFreeze Lock<br>~~I~~|F5h<br>~~nD~~<br>~~I~~<br>~~Gt~~<br>~~RR~~|Non-data<br>~~I~~|
|SecurityDisable Password<br>~~I~~<br>~~nt~~|F6h<br>~~I~~<br>~~Gt~~<br>~~nt~~<br>~~RR~~|PIO data-out<br>~~I~~<br>~~nt~~|
|S.M.A.R.T. Feature Set<br>~~nt~~<br>~~RR~~<br>~~Ce~~<br>~~PY~~|||
|S.M.A.R.T. Disable Operations<br>~~I~~|B0h<br>~~I~~<br>~~PY~~<br>~~GD~~|Non-data<br>~~I~~|
|S.M.A.R.T. Enable/Disable Autosave<br>~~I~~<br>~~I~~|B0h<br>~~I~~<br>~~PY~~<br>~~I~~<br>~~GD~~|Non-data<br>~~I~~<br>~~I~~|
|S.M.A.R.T. Enable Operations<br>~~I~~<br>~~I~~|B0h<br>~~I~~<br>~~GD~~<br>~~I~~<br>~~GR~~|Non-data<br>~~I~~<br>~~I~~|
|S.M.A.R.T. Execute OFF-LINE Immediate<br>~~I~~|B0h<br>~~I~~<br>~~GR~~<br>~~Pn~~|Non-data<br>~~I~~|
|S.M.A.R.T. Read Data<br>~~I~~|B0h<br>~~GR~~<br>~~I~~<br>~~Pn~~<br>~~GD~~|PIO data-in<br>~~I~~|
|S.M.A.R.T. Read Log<br>~~I~~|B0h<br>~~Pn~~<br>~~I~~<br>~~GD~~<br>~~GR~~|PIO data-in<br>~~I~~|
|S.M.A.R.T. Read Threshold<br>~~I~~|B0h<br>~~GD~~<br>~~I~~<br>~~GR~~<br>~~Pn~~|PIO data-in<br>~~I~~|
|S.M.A.R.T. Return Status<br>~~I~~|B0h<br>~~GR~~<br>~~I~~<br>~~Pn~~<br>~~TD~~|Non-data<br>~~I~~|
|S.M.A.R.T. Save Attribute Values<br>~~ID~~|B0h<br>~~Pn~~<br>~~ID~~<br>~~TD~~<br>~~Rt~~|Non-data<br>~~ID~~|
|S.M.A.R.T. Write Attribute Values<br>~~I~~|B0h<br>~~TD~~<br>~~I~~<br>~~Rt~~<br>~~RI~~|Non-data<br>~~I~~|
|S.M.A.R.T. Write Log<br>~~I~~|B0h<br>~~Rt~~<br>~~I~~<br>~~RI~~|PIO data-out<br>~~I~~|
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|||SWISSbIt|
|---|---|---|
|Command<br>~~Ce~~|Code<br>~~Ce~~|Protocol<br>~~Ce~~|
|Host Protected Area Feature Set<br>~~nn~~<br>~~nD~~<br>~~Cn~~|||
|Read Native Max Address<br>~~I~~<br>~~Cn~~|F8h<br>~~I~~<br>~~nD~~<br>|Non-data<br>~~I~~<br>|
|Set Max Address<br>~~I~~<br>~~Cn~~|F9h<br>~~I~~<br>~~nD~~<br><br>~~ID~~|Non-data<br>~~I~~<br>|
|Set Max Set Password<br>~~CnnD~~<br>~~Cn~~|F9h<br>~~nD~~<br>~~nD~~<br>~~ID~~<br>~~ID~~|PIO data-out<br>~~nD~~|
|Set Max Lock<br>~~I~~<br>~~Cn~~|F9h<br>~~ID~~<br>~~I~~<br>~~ID~~|Non-data<br>~~I~~|
|Set Max Freeze Lock<br>~~I~~<br>~~Cn~~<br>~~Ce~~|F9h<br>~~I~~<br>~~ID~~<br>|Non-data<br>~~I~~<br>|
|Set Max Unlock<br>~~Cn~~<br>~~CeCn~~|F9h<br>~~ID~~<br>|PIO data-out<br>|
|48-Bit Address Feature Set<br>~~CeCn~~|||
|Flush Cache Ext<br>~~Cnee~~|EAh<br>~~ee~~<br>~~ID~~|Non-data<br>~~ee~~|
|Read Sector(s)Ext<br>~~nD~~<br>~~Cn~~|24h<br>~~nD~~<br>~~ID~~<br>~~ID~~<br>|PIO data-in<br>~~nD~~<br>|
|Read DMA Ext<br>~~I~~<br>~~Cn~~|25h<br>~~ID~~<br>~~I~~<br>~~ID~~<br>|DMA<br>~~I~~<br>|
|Read Multiple Ext<br>~~I~~<br>~~Cn~~|29h<br>~~I~~<br>~~ID~~<br><br>~~ID~~|PIO data-in<br>~~I~~<br>|
|Read Native Max Address Ext<br>~~CnnD~~|27h<br>~~ID~~<br>~~nD~~<br>~~ID~~<br>~~ID~~|Non-data<br>~~nD~~|
|Read VerifySector(s)Ext<br>~~I~~|42h<br>~~ID~~<br>~~I~~<br>~~ID~~|Non-data<br>~~I~~|
|Set Max Address Ext<br>~~I~~<br>~~Rn~~|37h<br>~~I~~<br>~~ID~~<br>~~Rn~~|Non-data<br>~~I~~<br>~~Rn~~|
|Write DMA Ext<br>~~Rn~~<br>~~nn~~|35h<br>~~Rn~~<br>~~nn~~<br>~~ID~~|DMA<br>~~Rn~~<br>~~nn~~|
|Write DMA FUA Ext<br>~~nn~~<br>~~I~~|3Dh<br>~~nn~~<br>~~I~~<br>~~ID~~|DMA<br>~~nn~~<br>~~I~~|
|Write Multiple Ext<br>~~Ce~~|39h<br>~~ID~~<br>~~Ce~~|PIO data-out<br>~~Ce~~|
|Write Multiple FUA Ext<br>~~Ce~~<br>~~nn~~|CEh<br>~~Ce~~<br>~~nn~~<br>~~ID~~|PIO data-out<br>~~Ce~~<br>~~nn~~|
|Write Sector(s)Ext<br>~~nn~~<br>~~I~~|34h<br>~~nn~~<br>~~I~~<br>~~ID~~|PIO data-out<br>~~nn~~<br>~~I~~|
|NCQFeature Set<br>~~ID~~<br>~~Ce~~|||
|Read FPDMAQueued<br>~~Ce~~<br>~~Pn~~|60h<br>~~Ce~~<br>~~Pn~~<br>~~ID~~|DMAQueued<br>~~Ce~~<br>~~Pn~~|
|Write FPDMAQueued<br>~~Pn~~<br>~~I~~|61h<br>~~Pn~~<br>~~I~~<br>~~ID~~|DMAQueued<br>~~Pn~~<br>~~I~~|
|Others<br>~~ID~~<br>~~Ce~~|||
|Data Set Management<br>~~Ce~~<br>~~Pn~~|06h<br>~~Ce~~<br>~~Pn~~<br>~~nN~~|DMA<br>~~Ce~~<br>~~Pn~~|
|Seek<br>~~Pn~~<br>~~ID~~|70h<br>~~Pn~~<br>~~ID~~<br>~~nN~~|Non-data<br>~~Pn~~<br>~~ID~~|
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## **8. Identify Device Information**
The following Table 15 describes the 512 bytes of data the drive returns for the Identify Device command (ECh).
Table 15: Identify Device Information
|Word(s)<br>~~a~~<br>~~ee~~|Default<br>Value<br>~~ee~~<br>~~es MD~~|Total<br>Bytes<br>~~ee~~<br>~~MD~~|Data Field Type Information|
|---|---|---|---|
|0<br>~~ee~~<br>~~es~~|0040h*<br>~~es MD~~<br>~~sD~~|2<br>~~MD~~<br>~~sD~~|Standard Configuration Fixed(optional 848Ah for removable)|
|1<br>~~ee~~<br>~~es~~<br>~~es~~|XXXXh<br>~~es MD~~<br>~~sD~~<br>~~es nD~~|2<br>~~MD~~<br>~~sD~~<br>~~nD~~|Default number of cylinders|
|2<br>~~es~~<br>~~es~~<br>~~ee~~|0000h<br>~~sD~~<br>~~es nD~~<br>~~es MD~~|2<br>~~sD~~<br>~~nD~~<br>~~MD~~|Reserved|
|3<br>~~es~~<br>~~ee~~<br>~~es~~|00XXh<br>~~es nD~~<br>~~es MD~~<br>~~sD~~|2<br>~~nD~~<br>~~MD~~<br>~~sD~~|Default number of heads|
|4-5<br>~~ee~~<br>~~es~~<br>~~ee~~|0000h<br>~~es MD~~<br>~~sD~~<br>~~es MD~~|4<br>~~MD~~<br>~~sD~~<br>~~MD~~|Obsolete|
|6<br>~~es~~<br>~~ee~~<br>~~es~~|XXXXh<br>~~sD~~<br>~~es MD~~<br>~~sD~~|2<br>~~sD~~<br>~~MD~~<br>~~sD~~|Default number of sectorsper track|
|7-8<br>~~ee~~<br>~~es~~<br>~~ee~~|XXXXh<br>~~es MD~~<br>~~sD~~<br>~~es MD~~|4<br>~~MD~~<br>~~sD~~<br>~~MD~~|Number of sectorsper drive(Word7= MSW,Word 8 = LSW)|
|9<br>~~es~~<br>~~ee~~<br>~~ey~~|0000h<br>~~sD~~<br>~~es MD~~<br>~~nD~~|2<br>~~sD~~<br>~~MD~~<br>~~nD~~|Obsolete|
|10-19<br>~~ee~~<br>~~ey~~<br>~~es~~|aaaa<br>~~es MD~~<br>~~nD~~<br>~~sD~~|20<br>~~MD~~<br>~~nD~~<br>~~sD~~|Serial number in ASCII(right-justified)|
|20-22<br>~~ey~~<br>~~es~~<br>~~ee~~|0000h<br>~~nD~~<br>~~sD~~<br>~~es MD~~|6<br>~~nD~~<br>~~sD~~<br>~~MD~~|Obsolete|
|23-26<br>~~es~~<br>~~ee~~<br>~~ee~~|XXXX*<br>~~sD~~<br>~~es MD~~<br>~~RD~~|8<br>~~sD~~<br>~~MD~~<br>~~RD~~|Firmware revision in ASCII(big-endian byte order in Word)|
|27-46<br>~~ee~~<br>~~ee~~<br>~~Pe~~|XXXX*<br>~~es MD~~<br>~~RD~~<br>~~ns nN~~|40<br>~~MD~~<br>~~RD~~<br>~~nN~~|Model number in ASCII(right-justified)|
|47<br>~~ee~~<br>~~Pe~~<br>~~ee~~|8002h<br>~~RD~~<br>~~ns nN~~<br>~~nD~~|2<br>~~RD~~<br>~~nN~~<br>~~nD~~|Maximum number of sectors on Read/Write Multiple command|
|48<br>~~Pe~~<br>~~ee~~<br>~~es es~~|4000h<br>~~ns nN~~<br>~~nD~~<br>~~es ny~~|2<br>~~nN~~<br>~~nD~~<br>~~ny~~|Trusted Computingfeature set not supported|
|49<br>~~ee~~<br>~~es es~~<br>~~Pe~~|2F00h*<br>~~nD~~<br>~~es ny~~<br>~~ns nN~~|2<br>~~nD~~<br>~~ny~~<br>~~nN~~|StandbyTimer,DMA,LBA,IORDY supported|
|50<br>~~es es~~<br>~~Pe~~<br>~~ee~~|4000h<br>~~es ny~~<br>~~ns nN~~<br>~~nD~~|2<br>~~ny~~<br>~~nN~~<br>~~nD~~|Capabilities|
|51<br>~~Pe~~<br>~~ee~~<br>~~Pe~~|0000h<br>~~ns nN~~<br>~~nD~~<br>~~ns nN~~|2<br>~~nN~~<br>~~nD~~<br>~~nN~~|PIO data transfer cycle timingmode 0|
|52<br>~~ee~~<br>~~Pe~~<br>~~ee~~|0000h<br>~~nD~~<br>~~ns nN~~<br>~~nD~~|2<br>~~nD~~<br>~~nN~~<br>~~nD~~|Obsolete|
|53<br>~~Pe~~<br>~~ee~~<br>~~Pe~~|0007h*<br>~~ns nN~~<br>~~nD~~<br>~~ns nN~~|2<br>~~nN~~<br>~~nD~~<br>~~nN~~|Words 88 and 64-70 valid|
|54<br>~~ee~~<br>~~Pe~~<br>~~es~~|XXXXh<br>~~nD~~<br>~~ns nN~~<br>~~nn~~|2<br>~~nD~~<br>~~nN~~<br>~~nD~~|Current numbers of cylinders|
|55<br>~~Pe~~<br>~~es~~<br>~~ee~~|XXXXh<br>~~ns nN~~<br>~~nn~~<br>~~nD~~|2<br>~~nN~~<br>~~nD~~<br>~~nD~~|Current numbers of heads|
|56<br>~~es~~<br>~~ee~~<br>~~Pe~~|XXXXh<br>~~nn~~<br>~~nD~~<br>~~ns nN~~|2<br>~~nD~~<br>~~nD~~<br>~~nN~~|Current sectorsper track|
|57-58<br>~~ee~~<br>~~Pe~~<br>~~ee~~|XXXXh<br>~~nD~~<br>~~ns nN~~<br>~~nD~~|4<br>~~nD~~<br>~~nN~~<br>~~nD~~|Current capacityin LBAs(Word57= LSW,Word58 = MSW)|
|59<br>~~Pe~~<br>~~ee~~<br>~~Pe~~|910Xh*<br>~~ns nN~~<br>~~nD~~<br>~~ns nN~~|2<br>~~nN~~<br>~~nD~~<br>~~nN~~|Multiple sector setting (host changeable)|
|60-61<br>~~ee~~<br>~~Pe~~<br>~~ee~~|XXXXh<br>~~nD~~<br>~~ns nN~~<br>~~nD~~|4<br>~~nD~~<br>~~nN~~<br>~~nD~~|Total number of sectors addressable in LBA mode|
|62<br>~~Pe~~<br>~~ee~~<br>~~a~~|0000h<br>~~ns nN~~<br>~~nD~~<br>~~ee~~|2<br>~~nN~~<br>~~nD~~|Obsolete|
|63<br>~~ee~~<br>~~a~~<br>~~es~~|0007h*<br>0000h*<br>~~nD~~<br>~~ee~~<br>~~nD~~|2<br>~~nD~~<br>~~nD~~|Multiword DMA transfer support modes 2, 1, and 0<br>Multiword DMA not supported|
|64<br>~~a~~<br>~~es~~<br>~~Rs~~|0003h<br>~~ee~~<br>~~nD~~<br>~~nn~~|2<br>~~nD~~<br>~~nD~~|Advanced PIO modes supported|
|65<br>~~es~~<br>~~Rs~~<br>~~es~~|0078h*<br>~~nD~~<br>~~nn~~<br>~~nD~~|2<br>~~nD~~<br>~~nD~~<br>~~nD~~|Minimum Multiword DMA transfer cycle timeper Word|
|66<br>~~Rs~~<br>~~es~~<br>~~Rs~~|0078h*<br>~~nn ~~<br>~~nD~~<br>~~nn~~|2<br> ~~nD~~<br>~~nD~~<br>~~nD~~|Recommended Multiword DMA transfer cycle time|
|67<br>~~es~~<br>~~Rs~~<br>~~es~~|0078h*<br>~~nD~~<br>~~nn~~<br>~~RD~~|2<br>~~nD~~<br>~~nD~~<br>~~RD~~|Minimum PIO transfer cycle time without flow control|
|68<br>~~Rs~~<br>~~es~~<br>~~a~~|0078h*<br>~~nn ~~<br>~~RD~~<br>~~ee~~|2<br> ~~nD~~<br>~~RD~~|Minimum PIO transfer cycle time with IORDY flow control|
|69<br>~~es~~<br>~~a~~<br>~~es~~|4D20h<br>~~RD~~<br>~~ee~~<br>~~nD~~|2<br>~~RD~~<br>~~nD~~|Trimmed range returning zeros, 28-bit commands supported, download<br>microcode DMA,write/read Buffer DMA,deterministic read after TRIM|
|70-74<br>~~a~~<br>~~es~~<br>~~Rs~~|0000h<br>~~ee~~<br>~~nD~~<br>~~nn~~|10<br>~~nD~~<br>~~nD~~|Reserved|
|75<br>~~es~~<br>~~Rs~~<br>~~es~~|001Fh<br>~~nD~~<br>~~nn~~<br>~~nD~~|1<br>~~nD~~<br>~~nD~~<br>~~nD~~|Queue Depth|
|76<br>~~Rs~~<br>~~es~~<br>~~Rs~~|830Eh<br>~~nn ~~<br>~~nD~~<br>~~nn~~|2<br> ~~nD~~<br>~~nD~~<br>~~nD~~|SATA Capabilities|
|77<br>~~es~~<br>~~Rs~~<br>~~es~~|0086h<br>~~nD~~<br>~~nn~~<br>~~RD~~|2<br>~~nD~~<br>~~nD~~<br>~~RD~~|Additional SATA Capabilities|
|78<br>~~Rs~~<br>~~es~~<br>~~es~~|014Ch<br>~~nn ~~<br>~~RD~~<br>~~nD~~|2<br> ~~nD~~<br>~~RD~~<br>~~nD~~|SATA feature support|
|79<br>~~es~~<br>~~es~~<br>~~Rs~~|0040h*<br>~~RD~~<br>~~nD~~<br>~~nn~~|2<br>~~RD~~<br>~~nD~~<br>~~nD~~|SATA features enabled(host changeable)|
|80<br>~~es~~<br>~~Rs~~<br>~~ee~~|03F0h<br>~~nD~~<br>~~nn~~<br>~~nD~~|2<br>~~nD~~<br>~~nD~~<br>~~nD~~|Major revision|
|81<br>~~Rs~~<br>~~ee~~|0000h<br>~~nn ~~<br>~~nD~~|2<br> ~~nD~~<br>~~nD~~|Minor revision|
|82 -84<br>~~ee~~<br>~~ee~~<br>~~ee~~|746Bh*<br>7701h*<br>4063h*<br>~~nD~~<br>~~ee~~<br>~~ee~~|6<br>~~nD~~<br>~~ee~~<br>~~ee~~|Features/command sets supported<br>~~ee~~<br>~~ee~~|
|85-87<br>~~ee~~<br>~~ne~~|7469h*<br>7469h*<br>4063h*<br>~~ee~~<br>~~nD~~|6<br>~~ee~~<br>~~nD~~|Features/command sets enabled (may change in operation)<br>~~ee~~|
|88<br>~~ee~~<br>~~ne~~<br>~~es~~|407Fh*<br>~~ee~~<br>~~nD~~<br>~~ns nD~~|2<br>~~ee~~<br>~~nD~~<br>~~nD~~|UDMA mode supported<br>~~ee~~|
|89<br>~~ne~~<br>~~es~~<br>~~ee~~|0002h*<br>~~nD~~<br>~~ns nD~~<br>~~nD~~|2<br>~~nD~~<br>~~nD~~<br>~~nD~~|Time for securityerase unit completion|
|90<br>~~es~~<br>~~ee~~<br>~~a~~|0002h*<br>~~ns nD~~<br>~~nD~~<br>~~nD~~|4<br>~~nD~~<br>~~nD~~<br>~~nD~~|Time for enhanced securityerase completion|
|91<br>~~ee~~<br>~~a~~<br>~~ee~~|0000h<br>~~nD~~<br>~~nD~~<br>~~nD~~|2<br>~~nD~~<br>~~nD~~<br>~~nD~~|Power Management|
|92<br>~~a~~<br>~~ee~~|FFFEh*<br>~~nD~~<br>~~nD~~|2<br>~~nD~~<br>~~nD~~|Masterpassword revision code|
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|~~a~~|~~ee~~||Swissbit|
|---|---|---|---|
|Word(s)<br>~~a~~<br>~~es~~|Default<br>Value<br>~~ee~~|Total<br>Bytes|Data Field Type Information|
|93-99<br>~~a~~<br>~~es~~<br>~~ee~~|0000h*<br>~~ee~~<br>~~es MD~~|14<br>~~MD~~|Reserved|
|100-103<br>~~es~~<br>~~ee~~<br>~~ey~~|XXXXh<br>~~es MD~~<br>~~nD~~|8<br>~~MD~~<br>~~nD~~|Max user LBA48 address feature set|
|104-105<br>~~ee~~<br>~~ey~~<br>~~es~~|0000h<br>~~es MD~~<br>~~nD~~<br>~~sD~~|4<br>~~MD~~<br>~~nD~~<br>~~sD~~|Reserved|
|106<br>~~ey~~<br>~~es~~<br>~~ee~~|4000h<br>~~nD~~<br>~~sD~~<br>~~es MD~~|2<br>~~nD~~<br>~~sD~~<br>~~MD~~|Sector size|
|107-118<br>~~es~~<br>~~ee~~<br>~~a~~|0000h<br>~~sD~~<br>~~es MD~~<br>~~ee~~|24<br>~~sD~~<br>~~MD~~|Reserved|
|119-120<br>~~ee~~<br>~~a~~<br>~~es~~|4018h<br>4018h<br>~~es MD~~<br>~~ee~~<br>~~sD~~|4<br>~~MD~~<br>~~sD~~|Command set supported settings<br>Command set features enabled|
|121-127<br>~~a~~<br>~~es~~<br>~~es~~|0000h<br>~~ee~~<br>~~sD~~<br>~~es nD~~|14<br>~~sD~~<br>~~nD~~|Reserved|
|128<br>~~es~~<br>~~es~~<br>~~ee~~|0021h*<br>~~sD~~<br>~~es nD~~<br>~~es MD~~|2<br>~~sD~~<br>~~nD~~<br>~~MD~~|Securitystatus(maychange in operation)|
|129-159<br>~~es~~<br>~~ee~~<br>~~es~~|XXXXh<br>~~es nD~~<br>~~es MD~~<br>~~sD~~|62<br>~~nD~~<br>~~MD~~<br>~~sD~~|"Swissbit SSD”|
|160<br>~~ee~~<br>~~es~~<br>~~ee~~|0000h*<br>~~es MD~~<br>~~sD~~<br>~~es MD~~|2<br>~~MD~~<br>~~sD~~<br>~~MD~~|Power requirement|
|161<br>~~es~~<br>~~ee~~<br>~~es~~|0000h<br>~~sD~~<br>~~es MD~~<br>~~sD~~|2<br>~~sD~~<br>~~MD~~<br>~~sD~~|Reserved|
|162<br>~~ee~~<br>~~es~~<br>~~ee~~|0000h<br>~~es MD~~<br>~~sD~~<br>~~es MD~~|2<br>~~MD~~<br>~~sD~~<br>~~MD~~|Management schemes|
|163<br>~~es~~<br>~~ee~~<br>~~ey~~|0000h<br>~~sD~~<br>~~es MD~~<br>~~nD~~|2<br>~~sD~~<br>~~MD~~<br>~~nD~~|IDE Timing|
|164<br>~~ee~~<br>~~ey~~<br>~~es~~|0000h<br>~~es MD~~<br>~~nD~~<br>~~ns~~|2<br>~~MD~~<br>~~nD~~<br>~~ny~~|IO Timing|
|165-168<br>~~ey~~<br>~~es~~<br>~~Re~~|0000h<br>~~nD~~<br>~~ns~~<br>~~nn~~|8<br>~~nD~~<br>~~ny~~<br>~~nn~~|Reserved|
|169<br>~~es~~<br>~~Re~~<br>~~ee~~|0001h<br>~~ns~~<br>~~nn~~<br>~~nD~~|2<br>~~ny~~<br>~~nn~~<br>~~nD~~|Data Set Management supported|
|170-208<br>~~Re~~<br>~~ee~~<br>~~Pe~~|XXXXh<br>~~nn~~<br>~~nD~~<br>~~ns nN~~|78<br>~~nn~~<br>~~nD~~<br>~~nN~~|Reserved|
|209<br>~~ee~~<br>~~Pe~~<br>~~ee~~|4000h<br>~~nD~~<br>~~ns nN~~<br>~~nD~~|2<br>~~nD~~<br>~~nN~~<br>~~nD~~|Logical block alignment|
|210-216<br>~~Pe~~<br>~~ee~~<br>~~es es~~|0000h<br>~~ns nN~~<br>~~nD~~<br>~~es ny~~|14<br>~~nN~~<br>~~nD~~<br>~~ny~~|Reserved|
|217<br>~~ee~~<br>~~es es~~<br>~~Pe~~|0001h*<br>~~nD~~<br>~~es ny~~<br>~~ns nN~~|2<br>~~nD~~<br>~~ny~~<br>~~nN~~|Nominal media rotation rate: Solid State Device|
|218-221<br>~~es es~~<br>~~Pe~~<br>~~ee~~|0000h<br>~~es ny~~<br>~~ns nN~~<br>~~nD~~|8<br>~~ny~~<br>~~nN~~<br>~~nD~~|Reserved|
|222<br>~~Pe~~<br>~~ee~~<br>~~Pe~~|107Fh<br>~~ns nN~~<br>~~nD~~<br>~~ns nN~~|2<br>~~nN~~<br>~~nD~~<br>~~nN~~|Transport major revision|
|223-233<br>~~ee~~<br>~~Pe~~<br>~~ee~~|0000h<br>~~nD~~<br>~~ns nN~~<br>~~nD~~|22<br>~~nD~~<br>~~nN~~<br>~~nD~~|Reserved|
|234<br>~~Pe~~<br>~~ee~~<br>~~Pe~~|0001h<br>~~ns nN~~<br>~~nD~~<br>~~ns nN~~|2<br>~~nN~~<br>~~nD~~<br>~~nN~~|Minimum number of512-byte unitsper segmented download|
|235<br>~~ee~~<br>~~Pe~~<br>~~es~~|0200h<br>~~nD~~<br>~~ns nN~~<br>~~nn~~|2<br>~~nD~~<br>~~nN~~<br>~~nD~~|Maximum number of512-byte unitsper segmented download|
|236-254<br>~~Pe~~<br>~~es~~<br>~~ee~~|0000h<br>~~ns nN~~<br>~~nn~~<br>~~ns~~|38<br>~~nN~~<br>~~nD~~<br>~~ns~~|Reserved<br>~~nn~~|
|255<br>~~es~~<br>~~ee~~|XXXXh<br>~~nn~~<br>~~ns~~|2<br>~~nD~~<br>~~ns~~|IntegrityWord<br>~~nn~~|
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## **9. S.M.A.R.T. Functionality**
The F-66 SSD fully supports the ATA Specification for Self-Monitoring, Analysis and Reporting Technology (S.M.A.R.T.).
## _**9.1 S.M.A.R.T. Subcommands**_
The following Table 16 lists the supported S.M.A.R.T. subcommands and the Features register values.
Table 16: S.M.A.R.T. Features Supported
|Features|Operation|
|---|---|
|D0h|S.M.A.R.T. Read Data|
|D1h|S.M.A.R.T. Read Attribute Thresholds|
|D2h|S.M.A.R.T. Enable/Disable Autosave|
|D3h|S.M.A.R.T. Save Attribute Values|
|D4h|S.M.A.R.T. Execute Off-Line Immediate|
|D5h|S.M.A.R.T. Read Log|
|D6h|S.M.A.R.T. Write Log|
|D7h|S.M.A.R.T. Write Attribute Thresholds|
|D8h|S.M.A.R.T. Enable Operations|
|D9h|S.M.A.R.T. Disable Operations|
|DAh|S.M.A.R.T. Return Status|
The device aborts any S.M.A.R.T. subcommands with Features register values not listed in the above table.
## _**9.2 S.M.A.R.T. Read Data**_
When the drive receives the S.M.A.R.T. Read Data subcommand, it returns one sector (512 bytes) of data. See the following Table 17 for the data structure of this sector.
Table 17: S.M.A.R.T. Data Structure
|~~ee~~|||
|---|---|---|
|Byte(s)<br>~~ee~~<br>~~ee~~|Value<br>~~rs~~|Description|
|0-1<br>~~ee~~<br>~~ee~~<br>~~ee~~|0100h<br>~~rs~~|S.M.A.R.T. structure version|
|2-361<br>~~ee~~<br>~~ee~~<br>~~ee~~|XXh<br>~~rs~~|Attribute entries 1 to 30(see Table 19)|
|362<br>~~ee~~<br>~~ee~~<br>~~es~~|00h<br>~~ns~~|Off-line data collection status(no off-line data collection started)|
|363<br>~~ee~~<br>~~es~~<br>~~ee~~|00h<br>~~ns~~|Self-test execution status byte(self-test completed)|
|364-365<br>~~es~~<br>~~ee~~<br>~~ee~~|0000h<br>~~ns~~|Total time,in seconds,to complete off-line data collection|
|366<br>~~ee~~<br>~~ee~~<br>~~es~~|00h<br>~~ns~~|Vendor specific|
|367<br>~~ee~~<br>~~es~~<br>~~ee~~|00h<br>~~ns~~|Off-line data collection capability (no off-line data collection)|
|368-369<br>~~es~~<br>~~ee~~<br>~~ee~~|0002h<br>~~ns~~|S.M.A.R.T. capabilities|
|370<br>~~ee~~<br>~~ee~~<br>~~es~~|01h<br>~~ns~~|Error loggingcapability|
|371<br>~~ee~~<br>~~es~~<br>~~ee~~|00h<br>~~ns~~|Vendor specific|
|372<br>~~es~~<br>~~ee~~<br>~~ee~~|01h<br>~~ns~~|Short self-test routine recommendedpollingtime,in minutes|
|373<br>~~ee~~<br>~~ee~~<br>~~es~~|01h<br>~~ns~~|Extended self-test routine recommendedpollingtime,in minutes|
|374<br>~~ee~~<br>~~es~~<br>~~ee~~|01h<br>~~ns~~|Conveyance self-test routine recommendedpollingtime,in minutes|
|375-385<br>~~es~~<br>~~ee~~<br>~~ee~~|00h<br>~~ns~~|Reserved|
|386-395<br>~~ee~~<br>~~ee~~<br>~~Re~~|XXh<br>~~ny~~|Firmware version in ASCII<br>~~nn~~|
|396-399<br>~~ee~~<br>~~Re~~<br>~~a~~|00h<br>~~ny~~|Reserved<br>~~nn~~<br>~~(~~|
|400-405<br>~~Re~~<br>~~a~~<br>~~ee~~|XXh<br>~~ny~~|Controller model in ASCII("SM2246")<br>~~nn~~<br>~~(~~|
|406-510<br>~~a~~<br>~~ee~~<br>~~ee~~|00h|Reserved<br>~~(~~|
|511<br>~~ee~~<br>~~ee~~|XXh|Data structure checksum|
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## _**9.3 S.M.A.R.T. Attributes**_
The F-66 drives support the S.M.A.R.T. attributes listed in the following Table 18.
Table 18: S.M.A.R.T. Attributes
|ID<br>~~a~~<br>~~a~~|Worst<br>~~re~~<br>~~ee~~|Threshold Attribute<br>~~re~~<br>~~ee~~|Threshold Attribute<br>~~es~~|Description|
|---|---|---|---|---|
|01h<br>~~a ~~<br>~~a~~<br>~~a~~|100<br> ~~re~~<br>~~ee~~|0<br>~~re~~<br>~~ee~~<br>~~es~~|Raw Read Error Rate<br>~~es~~|Total number of Cyclic Redundancy Check (CRC) errors that<br>occurred over the SATA interface|
|05h<br>~~a ~~<br>~~a~~<br>~~a~~|100<br> ~~ee~~<br>~~ee~~|0<br>~~ee~~<br>~~es~~<br>~~ee~~|Reallocated Sector Count Total number of runtime identified<br>~~es~~<br>~~es~~|Reallocated Sector Count Total number of runtime identified(field marked)bad blocks|
|09h<br>~~a~~<br>~~a~~<br>~~a~~|100<br>~~ee~~<br>~~ee~~|0<br>~~es~~<br>~~ee~~<br>~~ee~~|Power-On Hours<br>~~es~~<br>~~es~~|Total hours that the device has been powered on and<br>operational(not in Sleepmode)|
|0Ch<br>~~a ~~<br>~~a~~<br>~~a~~|100<br> ~~ee~~<br>~~ee~~<br>~~ee~~|0<br>~~ee ~~<br>~~ee~~<br>~~ee~~|Power Cycle Count<br> ~~es~~<br>~~es~~<br>~~es~~|Total number of power cycles that have occurred during the life<br>of the drive|
|A0h<br>~~a ~~<br>~~a~~<br>~~a~~|100<br> ~~ee~~<br>~~ee~~|0<br>~~ee ~~<br>~~ee~~<br>~~es~~|Uncorrectable Sector<br>Count<br> ~~es~~<br>~~es~~|Total number of sectors read (active or passive) with UECC errors|
|A1h<br>~~a ~~<br>~~a~~<br>~~a~~|100<br> ~~ee~~<br>~~ee~~|25*<br>~~ee~~<br>~~es~~<br>~~ee~~|Spare Blocks<br>~~es~~<br>~~es~~|Total number of spare blocks currentlyavailable|
|A3h<br>~~a~~<br>~~a~~<br>~~ee~~|100<br>~~ee~~<br>~~ee~~|0<br>~~es~~<br>~~ee~~<br>~~ee~~|Number of Initial<br>Invalid Blocks<br>~~es~~<br>~~eee~~|Total number of initially identified (factory marked and pretest)<br>bad blocks<br>~~ee~~|
|A4h<br>~~a ~~<br>~~ee~~<br>~~ee~~|100<br> ~~ee~~<br>~~ee~~<br>~~ee~~|0<br>~~ee ~~<br>~~ee~~<br>~~ee~~|Total Erase Count<br> ~~es~~<br>~~eee~~<br>~~ee~~|Total number of erase operations that have ever been<br>performed on all currently valid blocks (excluding the system,<br>bad and reserved blocks)<br>~~ee~~<br>~~ee~~|
|A5h<br>~~ee~~<br>~~ee~~|100<br>~~ee~~<br>~~ee~~|0<br>~~ee ~~<br>~~ee~~|Maximum Erase Count<br> ~~eee~~<br>~~ee~~|The maximum number of erase operations that have ever been<br>performed on a single block (excluding the system, bad and<br>reserved blocks)<br>~~ee~~<br>~~ee~~|
|A6h<br>~~ee~~<br>~~re~~<br>~~ee~~|100<br>~~ee~~<br>~~re~~<br>~~ee~~|0<br>~~ee~~<br>~~re~~<br>~~ee~~|Minimum Erase Count<br>~~ee~~<br>~~re~~<br>~~ee~~|The minimum number of erase operations that have ever been<br>performed on a single block (excluding the system, bad and<br>reserved blocks)<br>~~ee~~<br>~~re~~<br>~~ee~~|
|A7h<br>~~ee~~<br>~~ee~~|100<br>~~ee~~<br>~~ee a~~|1*<br>~~ee~~<br>~~a~~|Average Erase Count<br>~~ee~~<br>~~ee~~|The average number of erase operations that have ever been<br>performed on a single block (excluding the system, bad and<br>reserved blocks)<br>~~ee~~<br>~~ee~~|
|A8h<br>~~ee~~<br>~~ee~~|100<br>~~ee~~<br>~~ee a~~|0<br>~~ee~~<br>~~a~~|Maximum Specified<br>Erase Count<br>~~ee~~<br>~~ee~~|The specified maximum erase count; equivalent to number of<br>program/erase(P/E)cycles rated for the device<br>~~ee~~<br>~~ee~~|
|A9h<br>~~ee~~<br>a|100<br>~~ee a~~<br> a|0<br>~~a ~~<br>~~es~~|Power on UECC Count<br> ~~ee~~<br>~~es~~|The number of uncorrectable errors encountered during a power<br>upevent<br>~~ee~~<br>~~es~~|
|C0h<br>~~a~~<br>~~Cee~~|100<br>~~ss~~<br>~~Cee~~|0<br>~~ss~~<br>~~a~~|Initial Spare Block Count Total number of ori<br>~~a~~|are Block Count Total number of original spare blocks|
|C1h<br>~~a ~~<br>~~Cee~~|100<br> ~~ss~~<br>~~Cee~~|0<br>~~ss~~<br>~~a~~|Dynamic Remaps<br>~~a~~|Total number of dynamic remapoperations|
|C2h<br>~~Cee~~|100<br>~~Cee~~|0<br>~~a~~|Temperature<br>~~a~~|Temperature(minimum,maximum,and current)of the device|
|C3h<br>~~Cee~~<br>a|100<br>~~Cee ~~<br> a|0<br> ~~a~~<br>~~es~~|Flash ECC Recovered<br>~~a~~<br>~~es~~|Total number of times the read-retry process was required to<br>recover data<br>~~es~~|
|C4h<br>~~a~~<br>~~ee~~|0<br>~~ee~~<br>~~ee a~~|0<br>~~ee~~<br>~~a~~|Reallocation Event<br>Count<br>~~a~~|Total count of remapping operations<br>~~ee~~|
|C6h<br>~~a ~~<br>~~ee~~<br>~~ee~~|100<br> ~~ee~~<br>~~ee a~~<br>~~ee a~~|0<br>~~ee~~<br>~~a~~<br>~~a~~|Uncorrectable Sector<br>Count Offline<br>~~a~~<br>~~a~~|Total number of sectors read (active only) with UECC errors<br>~~ee~~<br>~~ee~~|
|C7h<br>~~ee~~<br>~~ee~~|100<br>~~ee a~~<br>~~ee a~~|0<br>~~a ~~<br>~~a~~|SATA PHY CRC Error Count Total count of PHY errors (including CRC) that occurred over the<br> ~~a ~~<br>~~a~~|SATA PHY CRC Error Count Total count of PHY errors (including CRC) that occurred over the<br>interface cable<br> ~~ee~~<br>~~ee~~|
|D7h<br>~~ee~~<br>~~a ~~<br>~~ee~~|100<br>~~ee a~~<br> ~~ee~~<br>~~ee~~|0<br>~~a ~~<br>~~ee~~<br>~~ee~~|TRIM Count<br> ~~a ~~<br>~~ee ee~~|Total number of TRIM commands issued bythe host<br> ~~ee~~<br>~~ee~~|
|EBh<br>~~ee~~<br>~~ee~~|100<br>~~ee~~<br>~~ee~~|0<br>~~ee~~<br>~~ee~~|Total Flash LBAs Written<br>~~ee ee~~<br>~~ee ee~~|The lower 7 bytes of the total number of LBAs (in 32 KByte<br>increments) written to the flash; the higher 5 bytes are located<br>in attribute EDh<br>~~ee~~<br>~~ee~~|
|EDh<br>~~ee~~<br>~~ee~~|100<br>~~ee~~<br>~~ee~~|0<br>~~ee ~~<br>~~ee~~|Total Flash LBAs Written<br>Expanded<br> ~~ee ee~~<br>~~ee ee~~|The upper 5 bytes of the total number of LBAs (in 32 KByte<br>increments) written to the flash; the lower 7 bytes are located in<br>attribute EBh<br>~~ee~~<br>~~ee~~|
|F1h<br>~~ee~~<br>~~ee~~<br>~~eee~~|100<br>~~ee~~<br>~~ee~~<br>~~eee~~|0<br>~~ee ~~<br>~~ee~~<br>~~eee~~|Total Host LBAs Written<br> ~~ee ee~~<br>~~ee~~<br>~~eee~~|The lower 7 bytes of the total number of LBAs written to the<br>device by the host; the higher 5 bytes are located in attribute<br>F3h<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|F2h<br>~~eee~~<br>~~ee~~|100<br>~~eee~~<br>~~ee~~|0<br>~~eee~~<br>~~ee~~|Total Host LBAs Read<br>~~eee~~<br>~~es~~|The lower 7 bytes of the total number of LBAs read from the<br>device by the host; the higher 5 bytes are located in attribute<br>F4h<br>~~ee~~|
|F3h<br>~~eee~~<br>~~ee~~|100<br>~~eee~~<br>~~ee~~|0<br>~~eee~~<br>~~ee~~|Total Host LBAs Written<br>Expanded<br>~~eee ~~<br>~~es~~|The upper 5 bytes of the total number of LBAs written to the<br>device bythe host;the lower 7 bytes are located in attribute F1h<br> ~~ee~~|
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|||||SWISSbit|
|---|---|---|---|---|
|ID|Worst|Threshold Attribute|Threshold Attribute|Description|
|F4h|100|0|Total Host LBAs Read<br>Expanded|The upper 5 bytes of the total number of LBAs read from the<br>device bythe host;the lower 7 bytes are located in attribute F2h|
|F8h|100|0|SSD Remaining Life|Percent of SSD life remaining on the SSD (a value from 0 to 64h),<br>normalized to 100; based upon Average Erase Count (A7h) scaled<br>bythe Maximum Specified Erase Count(A8h)|
|F9h|100|0|Spare Block Remaining<br>Life|Percent of spare blocks remaining|
* These threshold values are changeable using the Write Attribute Thresholds command.
## _**9.4 S.M.A.R.T. Attribute Entry Structure**_
Each attribute entry consists of 12 bytes. See the following Table 19 for the data structure of each entry.
Table 19: Attribute Entry
|Byte(s)|Value|Description|
|---|---|---|
|0|XXh|Attribute ID(see Table 18)|
|1-2|XXXXh|Flags(little-endian)|
|3|XXh|Attribute value as apercentage|
|4|XXh|Worst value as apercentage|
|5-8|XXXXh|Raw value(little-endian)|
|9-11|00h|Reserved|
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## **10. Part Number Decoder**
S F CA 120G H 3 A A 2 TO - I - O C - 22P - STD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Manuf. Option Memory Type. Configuration Product Type Manuf. Code: Flash Mode Density Manuf. Code: Flash Package Platform Temp. Option Product Generation Flash Vendor Code Memory Organization Number of Flash Chips ~~ma"~~ Technology _**10.1 Manufacturer**_ Swissbit code S _**10.2 Memory Type**_
Swissbit code S _**10.2 Memory Type**_ Flash F _**10.3 Product Type**_ CFast Interface CA _**10.4 Density**_ 4 GBytes 004G 8 GBytes 008G 16 GBytes 016G 30 GBytes 030G 60 GBytes 060G 120 GBytes 120G _**10.5 Platform**_ CFast SSD H ~~—~~
## _**10.6 Product Generation**_
## _**10.7 Memory Organization**_
## _**10.8 Technology**_
|CFast SSD<br>**_10.7 Memory Organization_**<br>~~—~~|CFast SSD<br>~~—~~|H<br>~~—~~|
|---|---|---|
|x8||A|
||||
|F-66 Series|F-66 Series|A|
## _**10.9 Number of Flash Chips**_
## _**10.10 Flash Code**_
|**_10.9 Number of Flash Chips_**||
|---|---|
|1 Flash|1|
|2 Flash|2|
|||
|Toshiba|TO|
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_**10.11 Temperature Option**_
Commercial Temperature Range: 0 °C to 70 °C C ~~ee~~ Industrial Temperature Range: -40 °C to 85 °C I
## _**10.12 Die Classification**_
|MLC MONO(single diepackage)|G|
|---|---|
|MLC DDP(dual diepackage)|L|
|MLCQDP(quad diepackage)|H|
|MLC ODP (octal diepackage)|O|
## _**10.13 Pin Mode**_
||TSOP|BGA|
|---|---|---|
|Single nCE and Single R/nB|S|A|
|Dual nCE and Dual R/nB|T|B|
|Quad nCE andQuad R/nB|U|C|
|Octal nCE and Octal R/nB|*|V|
|Sexdec nCE & Sexdec R/nB|*|W|
*Not Available
## _**10.14 Drive configuration XYZ**_
X = Type
## _**10.15 Option**_
Drive Mode PIO DMA Support X Fix Yes Yes 2 ~~ee~~ Y = Firmware Revision FW Revision Y ~~ee~~ SBR13037 2 Z = Feature Feature Z ~~ee~~ pSLC P Standard STD ~~PT~~
Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland
Revision: 1.04 Doc-2827 File: F-66_data_sheet_CA-HxAA_Rev104 Page 21 of 23
Confidential www.swissbit.com industrial@swissbit.com
## **11.Marking Specification**
## _**11.1 Top View**_
Figure 4: F-66 top view
## _**11.2 Bottom View**_
Figure 5: F-66 top view
## _**11.3 Label Content**_
- Swissbit Logo
- CFast Logo
- Part Number
- Lot Code information with Bar Code
- CE Logo
- RoHS Logo
- WEEE Logo
- Manufacturing Date
- Country of Origin
Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland
Revision: 1.04 Doc-2827 File: F-66_data_sheet_CA-HxAA_Rev104 Page 22 of 23
Confidential www.swissbit.com
industrial@swissbit.com
## **12. Revision History**
Table 20: Document Revision History
|Date|Revision|Description|Revision Details|
|---|---|---|---|
|9-Jun-2017|01|Initial draft.||
|30-Aug-2017|1.00|Initial release.|Doc. req. no. 1837|
|26-Oct-2018|1.01|Updated endurance values for 4GB and 8GB, Current Consumption<br>data, part number decoder sections and feature icons.|Doc. req. no. 2639|
|16-Apr-2019|1.02|Part number of 4GB density corrected, updated sections<br>to meet standard data sheet review criteria.|Doc. req. no. 2882|
|22-Oct-2019|1.03|Minor information and formatting changes|Doc. req. no. 3230|
|31-Oct-2019|1.04|Fixed typo|Doc. req. no. 3248|
## Disclaimer:
No part of this document may be copied or reproduced in any form or by any means, or transferred to any third party, without the prior written consent of an authorized representative of Swissbit AG (“SWISSBIT”). The information in this document is subject to change without notice. SWISSBIT assumes no responsibility for any errors or omissions that may appear in this document and disclaims responsibility for any consequences resulting from the use of the information set forth herein. SWISSBIT makes no commitments to update or to keep current information contained in this document. The products listed in this document are not suitable for use in applications such as, but not limited to, aircraft control systems, aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. Moreover, SWISSBIT does not recommend or approve the use of any of its products in life support devices or systems or in any application where failure could result in injury or death. If a customer wishes to use SWISSBIT products in applications not intended by SWISSBIT, said customer must contact an authorized SWISSBIT representative to determine SWISSBIT willingness to support a given application. The information set forth in this document does not convey any license under the copyrights, patent rights, trademarks or other intellectual property rights claimed and owned by SWISSBIT. The information set forth in this document is considered to be “Proprietary” and “Confidential” property owned by SWISSBIT.
ALL PRODUCTS SOLD BY SWISSBIT ARE COVERED BY THE PROVISIONS APPEARING IN SWISSBIT’S TERMS AND CONDITIONS OF SALE ONLY, INCLUDING THE LIMITATIONS OF LIABILITY, WARRANTY AND INFRINGEMENT PROVISIONS. SWISSBIT MAKES NO WARRANTIES OF ANY KIND, EXPRESS, STATUTORY, IMPLIED OR OTHERWISE, REGARDING INFORMATION SET FORTH HEREIN OR REGARDING THE FREEDOM OF THE DESCRIBED PRODUCTS FROM INTELLECTUAL PROPERTY INFRINGEMENT AND EXPRESSLY DISCLAIMS ANY SUCH WARRANTIES INCLUDING WITHOUT LIMITATION ANY EXPRESS, STATUTORY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
© 2019 SWISSBIT AG All rights reserved.
Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland
Revision: 1.04 Doc-2827 File: F-66_data_sheet_CA-HxAA_Rev104 Page 23 of 23
Confidential www.swissbit.com industrial@swissbit.com
Updated at June 3, 2026
Swissbit is a premier independent European manufacturer specializing in industrial-grade storage and embedded IoT solutions. Founded in 2001, the company is globally recognized for engineering highly reliable products designed to meet the rigorous demands of the industrial, automotive, telecommunications, and medical sectors. With manufacturing operations rooted in Germany, Swissbit delivers exceptional quality, long-term component availability, and custom optimization for mission-critical applications. The core of the company's offering centers on advanced semiconductor memory solutions, with a strong emphasis on high-performance flash memory cards. These robust storage options, which include industrial SD cards, microSD memory cards, and CompactFlash, are specifically engineered to provide secure, reliable data retention in extreme operating environments. Swissbit's flash memory products integrate sophisticated wear-leveling and error-correction technologies to guarantee maximum endurance and data integrity over extended product lifecycles. Beyond portable flash memory cards, Swissbit's comprehensive storage ecosystem encompasses managed NAND BGAs, USB flash drives, and a wide array of solid-state drives across multiple interfaces. By combining cutting-edge packaging expertise with hardware-based security features, Swissbit empowers design engineers to reliably store and protect sensitive data across the entire spectrum of modern connected devices.
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