RJE0607JSP-00#J0
Dual MOSFET, Dual P Channel, 60 V, 1.5 A
- Manufacturer: RENESAS
- Product type: Dual MOSFETs
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 8Pins
- Channel Type: Dual P Channel
- Product Range: -
- Qualification: -
- Transistor Case Style: SOP
- Operating Temperature Max: 150°C
- Power Dissipation N Channel: -
- Power Dissipation P Channel: 2W
- Drain Source Voltage Vds N Channel: -
- Drain Source Voltage Vds P Channel: 60V
- Continuous Drain Current Id N Channel: -
- Continuous Drain Current Id P Channel: 1.5A
- Drain Source On State Resistance N Channel: -
- Drain Source On State Resistance P Channel: 0.26ohm
| Delivery and price | |
|---|---|
| Units per pack | 2500 |
| Price | 1.39 € |
| Current stock | 10+ |
| Lead time | 30 days |
Preliminary Datasheet ## **RJE0607JSP** Silicon P Channel MOS FET Series Power Switchin g R07DS0123EJ0200 (Previous: REJ03G1876-0100) Rev.2.00 Sep 01, 2010 ## **Description** This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. ## **Features** - High endurance capability against to the short circuit. - Built-in the over temperature shut-down circuit. - Latch type shut down operation (need 0 voltage recovery). - Built-in the current limitation circuit. - Low on-resistance RDS(on) : 140 m Typ, 260 m Max (VGS = –10 V) - High density mounting ## **Outline** **==> picture [440 x 143] intentionally omitted <==** **----- Start of picture text -----**<br> RENESAS Package code: PRSP0008DD-D<br>(Package name: SOP-8 (FP-8DAV))<br>6 5<br>8 7 D D D D<br>7 8 5 6<br>1 [2] [3 4] 1, 3 Source2, 4 Gate<br>2 Current 4 Current 5, 6, 7, 8 Drain<br>G Gate Resistor Limitation G Gate Resistor Limitation<br>Circuit Circuit<br>TemperatureSensiCircuit ng LatchCircuit Gate Shut- Circuitdown TemperatureSensiCircuit ng LatchCircuit Gate Shut- Circuitdown<br>1 3<br>MOS1 S MOS2 S<br>**----- End of picture text -----**<br> ## **Absolute Maximum Ratings** (Ta = 25°C) ||||(Ta = 25°C)| |---|---|---|---| |**Item**|**Symbol**|**Ratings **|**Unit**| |Drain to source voltage|VDSS|–60|V| |Gate to sourcevoltage|VGSS|–16|V| |Gate to source voltage|VGSS|2.5|V| |Drain current|ID<br>Note5|–1.5|A| |Body-draindiodereverse draincurrent|IDR|–1.5|A| |Avalanche current|IAP<br>Note 4|–1.5|A| |Avalanche energy|EAR<br>Note 4|9.6|mJ| |Channeldissipation|Pch<br>Note 2|2|W| |Channel dissipation|Pch<br>Note 3|1.5|W| |Channel temperature|Tch|150|C| |Storage temperature|Tstg|–55 to +150|C| Notes: 1. Value at Tc = 25C 2. 1 Drive operation : When using the glass epoxy board (FR4 40 40 1.6 mm), PW 10 s 3. 2 Drive operation : When using the glass epoxy board (FR4 40 40 1.6 mm), PW 10 s 4. Tch = 25C, Rg 50 5. It provides by the current limitation lower bound value. R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 1 of 7 **RJE0607JSP** **Preliminary** ## **Typical Operation Characteristics** (Ta = 25°C) |||||||(Ta = 25°C)| |---|---|---|---|---|---|---| |**Item**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|**Test Conditions**| |Input voltage|VIH|–3.5|—|—|V|| ||VIL|—|—|–1.2|V|| |Input current<br>(Gate non shut down)|IIH1|—|—|–100|A|Vi = –8 V, VDS= 0| ||IIH2|—|—|–50|A|Vi = –3.5 V, VDS= 0| ||IIL|—|—|–10|A|Vi = –1.2 V, VDS= 0| |Input current<br>(Gate shut down)|IIH(sd)1|—|–0.8|—|mA|Vi = –8 V, VDS= 0| ||IIH(sd)2|—|–0.35|—|mA|Vi = –3.5 V, VDS= 0| |Shut down temperature|Tsd|—|175|—|C|Channel temperature<br>(dv/dt VGS 500 V/ms)| |Gate operation voltage|Vop|–3.5|—|–12|V|| |Drain current<br>(Current limitation value)|ID limt|–1.5|—|—|A|VGS= –12 V, VDS= –10 VNote 4| Notes; 6. Pulse test ## **Electrical Characteristics** (Ta = 25°C) |||||||(Ta = 25°C)| |---|---|---|---|---|---|---| |**Item**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|**Test Conditions**| |Drain current|ID1|—|—|–2|A|VGS= –3.5 V, VDS= –10 V| ||ID2|—|—|–10|mA|VGS= –1.2 V, VDS= –10 V| ||ID3|–1.5|—|—|A|VGS= –12 V, VDS= –10 VNote 7| |Drain to source breakdown<br>voltage|V(BR)DSS|–60|—|—|V|ID= –10 mA, VGS= 0| |Gate to source breakdown<br>voltage|V(BR)GSS|–16|—|—|V|IG= –800A, VDS= 0| ||V(BR)GSS|2.5|—|—|V|IG= 100A, VDS= 0| |Gate to source leak current|IGSS1|—|—|–100|A|VGS= –8 V, VDS= 0| ||IGSS2|—|—|–50|A|VGS= –3.5 V, VDS= 0| ||IGSS3|—|—|–10|A|VGS= –1.2 V, VDS= 0| ||IGSS4|—|—|100|A|VGS= 2.4 V, VDS= 0| |Input current (shut down)|IGS(OP)1|—|–0.8|—|mA|VGS= –8 V, VDS= 0| ||IGS(OP)2|—|–0.35|—|mA|VGS= –3.5 V, VDS= 0| |Zero gate voltage drain current|IDSS1|—|—|–10|A|VDS= –60 V, VGS= 0| ||IDSS2|—|—|–10|A|VDS= –48 V, VGS= 0<br>Ta = 125C| |Gate to source cutoff voltage|VGS(off)|–2.2|—|–3.4|V|VDS= –10 V, ID= –1 mA| |Static drain to source on state<br>resistance|RDS(on)|—|185|380|m|ID= –0.75 A, VGS= –6 VNote 7| ||RDS(on)|—|140|260|m|ID= –0.75 A, VGS= –10 VNote 7| |Output capacitance|Coss|—|194|—|pF|VDS= –10 V, VGS= 0, f =<br>1MHz| |Turn-on delaytime|td(on)|—|1.82|—|s|VGS= –10 V, ID= –0.75 A,<br>RL= 40| |Rise time|tr|—|1.95|—|s|| |Turn-off delaytime|td(off)|—|0.99|—|s|| |Fall time|tf|—|0.84|—|s|| |Body-drain diode forward voltage|VDF|—|0.83|—|V|IF= –1.5 A, VGS= 0| |Body-drain diode reverse<br>recoverytime|trr|—|85|—|ns|IF= –1.5 A, VGS= 0<br>diF/dt = 50 A/s| |Over load shut down<br>operation timeNote 8|tos1|—|18.6|—|ms|VGS= –5 V, VDD= –16 V| Notes: 7. Pulse test 8. Including the junction temperature rise of the over loaded condition. R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 2 of 7 **RJE0607JSP** **Preliminary** ## **Main Characteristics** **==> picture [197 x 646] intentionally omitted <==** **----- Start of picture text -----**<br> Power vs. Temperature Derating<br>4.0<br>Test condition.<br>When using the glass epoxy board.<br>3.0 (FR4 40 x 40 x 1.6 mm), (PW ≤ 10s)<br>2.0<br>1.0<br>0<br>0 50 100 150 200<br>Case Temperature Tc ( ° C)<br>Typical Output Characteristics<br>− 1.5 − 4.5 V Pulse Test<br>− 5 V<br>− 6 V<br>− 8 V − 4 V<br>− 1.0 − 10 V<br>− 0.5<br>− 3.5 V<br>VGS = 0 V<br>0 − 2 − 4 − 6 − 8 − 10<br>Drain to Source Voltage VDS (V)<br>Drain Source Saturation Voltage vs.<br>Gate to Source Voltage<br>− 1000<br>Pulse Test<br>− 800<br>− 600<br>− 400<br>− 200 − 1 A<br>0 ID = − 0.5 A<br>− 2 − 4 − 6 − 8 − 10<br>Gate to Source Voltage VGS (V)<br>2 Driver Operation<br>1 Driver Operation<br>Channel Dissipation Pch (W)<br> (A)<br>D<br>Drain Current I<br> (mV)<br>DS(on)<br>Drain to Source Saturation Voltage<br> V<br>**----- End of picture text -----**<br> **==> picture [230 x 646] intentionally omitted <==** **----- Start of picture text -----**<br> Maximum Safe Operation Area<br>− 10 Ta = 25 ° C Thermal shut down o peration area<br>1 shot Pulse<br>1 Driver Operation<br>− 1<br>− 0.1<br>Operation<br>in this area<br>is limited RDS(on)<br>− 0.01<br>− 0.01 − 0.1 − 1 − 10 − 100<br>Drain to Source Voltage VDS (V)<br>Note 6:<br>When using the glass epoxy board.<br>(FR4 40 x 40 x 1.6 mm)<br>Typical Transfer Characteristics<br>− 2.0<br>V DS = − 10 V<br>Pulse Test<br>− 1.5<br>− 1.0 Tc = 75 ° C<br>25 ° C<br>− 0.5<br>− 40 ° C<br>0<br>0 − 2 − 4 − 6 − 8 − 10<br>Gate to Source Voltage VGS (V)<br>Static Drain to Source On State Resistance<br>vs. Drain Current<br>1000<br>Pulse Test<br>V GS = − 6 V<br>100 − 10 V<br>10<br>− 0.1 − 1 − 10<br>Drain Current ID (A)<br>1 ms<br>DC Operation PW< 10s<br>Note9<br> (A)<br>D<br>Drain Current I<br> (A)<br>D<br>Drain Current I<br>) Ω<br> (m<br>DS(on)<br>Static Drain to Source On State Resistance R<br>**----- End of picture text -----**<br> R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 3 of 7 **RJE0607JSP** **Preliminary** **==> picture [206 x 659] intentionally omitted <==** **----- Start of picture text -----**<br> Static Drain to Source On State Resistance<br>vs. Temperature<br>500<br>Pulse Test<br>400<br>ID = − 1 A<br>− 0.2 A, − 0.5 A<br>300<br>VGS = − 6 V<br>200<br>100 I D = − 0.2 A, − 0.5 A, − 1 A<br>− 10 V<br>0<br>− 50 − 25 0 25 50 75 100 125 150<br>Case Temperature Tc ( ° C)<br>Switching Characteristics<br>10<br>tr<br>td(on)<br>1 td(off)<br>tf<br>VGS = − 10 V, VDD = − 30 V<br>PW = 300 μ s, duty ≤ 1 %<br>0.1<br>− 0.1 − 1 − 10<br>Drain Current ID (A)<br>Reverse Drain Current vs.<br>Source to Drain Voltage<br>–2.0<br>Pulse Test<br>–10 V<br>–1.5<br>–5 V<br>–1.0<br>V GS = 0 V<br>–0.5<br>0 –0.4 –0.8 –1.2 –1.6 –2.0<br>Source to Drain Voltage VSD (V)<br>) Ω<br> (m<br>DS(on)<br>Static Drain to Source On State Resistance R<br>s)<br>μ<br>Switching Time t (<br> (A)<br>DR<br>Reverse Drain Current I<br>**----- End of picture text -----**<br> **==> picture [185 x 432] intentionally omitted <==** **----- Start of picture text -----**<br> Body-Drain Diode Reverse<br>Recovery Time<br>1000<br>100<br>di / dt = 50 A / μ s<br>VGS = 0, Ta = 25 ° C<br>10<br>− 0.1 − 1 − 10<br>Reverse Drain Current IDR (A)<br>Typical Capacitance vs.<br>Drain to Source Voltage<br>1000<br>VGS = 0<br>f = 1 MHz<br>Coss<br>100<br>10<br>− 0 − 10 − 20 − 30 − 40 − 50 − 60<br>Drain to Source Voltage VDS (V)<br>Reverse Recovery Time trr (ns)<br>Capacitance C (pF)<br>**----- End of picture text -----**<br> Gate to Source Voltage vs. Shutdown Time of Load-Short Test **==> picture [198 x 176] intentionally omitted <==** **----- Start of picture text -----**<br> − 16<br>− 14<br>− 12<br>VDD = − 16 V<br>− 10<br>− 8<br>− 6<br>− 4<br>− 2<br>0<br>1 10 100<br>Shutdown Time of Load-Short Test Pw (ms)<br> (V)<br>GS<br>Gate to Source Voltage V<br>**----- End of picture text -----**<br> R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 4 of 7 **RJE0607JSP** **Preliminary** **==> picture [183 x 205] intentionally omitted <==** **----- Start of picture text -----**<br> Shutdown Case Temperature vs.<br>Gate to Source Voltage<br>200<br>180<br>160<br>140<br>120 ID = − 0.2 A<br>dv/dt<br>VGS ≥ 500 V/ms<br>100<br>0 − 2 − 4 − 6 − 8 − 10<br>Gate to Source Voltage VGS (V)<br>C)<br>°<br>Shutdown Case Temperature Tc (<br>**----- End of picture text -----**<br> **==> picture [332 x 448] intentionally omitted <==** **----- Start of picture text -----**<br> Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)<br>10<br>D = 1<br>1<br>0.5<br>0.1<br>θ ch-f(t) = γ s (t) • θ ch - f<br>0.01 θ ch-f = 125 ° C/W, Ta = 25 ° C<br>When using the glass epoxy board<br>(FR4 40 x 40 x 1.6 mm)<br>0.001 PDM D = [PW] T<br>PW<br>T<br>0.0001<br>10 μ 100 μ 1 m 10 m 100 m 1 10 100 1000 10000<br>Pulse Width PW (S)<br>Normalized Transient Thermal Impedance vs. Pulse Width<br>(Operatioon of 2 devices; allowable value per device)<br>10<br>D = 1<br>1<br>0.5<br>0.1<br>θ ch-f(t) = γ s (t) • θ ch - f<br>0.01 θ ch-f = 166 ° C/W, Ta = 25 ° C<br>When using the glass epoxy board<br>(FR4 40 x 40 x 1.6 mm)<br>0.001 PDM D = [PW] T<br>PW<br>T<br>0.0001<br>10 μ 100 μ 1 m 10 m 100 m 1 10 100 1000 10000<br>Pulse Width PW (S)<br>0.1<br>0.1<br>0.2<br>0.2<br>0.02<br>0.02<br>0.05<br>0.05<br>0.01<br>0.01<br>1shot pulse<br>1shot pulse<br>s (t)<br>γ<br>Normalized Transient Thermal Impedance<br>s (t)<br>γ<br>Normalized Transient Thermal Impedance<br>**----- End of picture text -----**<br> R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 5 of 7 **RJE0607JSP** **Preliminary** **==> picture [401 x 156] intentionally omitted <==** **----- Start of picture text -----**<br> Switching Time Test Circuit Waveform<br>Vin Monitor Vout Vin<br>Monitor<br>10%<br>D.U.T.<br>RL<br>90%<br>Vin 50 Ω VDD 90% 90%<br>–10 V = –30 V<br>Vout 10% 10%<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br> R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 6 of 7 **RJE0607JSP** **Preliminary** ## **Package Dimensions** **==> picture [482 x 322] intentionally omitted <==** **----- Start of picture text -----**<br> Package Name JEITA Package Code RENESAS Code Previous Code MASS[Typ.]<br>SOP-8 P-SOP8-3.95 × 4.9-1.27 PRSP0008DD-D FP-8DAV 0.085g<br>* [1] D<br>8 5 bp<br>Index mark<br>1 4 Terminal cross section NOTE)1. DIMENSIONS "*1(Nom)" AND "*2"<br>Z DO NOT INCLUDE MOLD FLASH.<br>* [3] bp x M (Ni/Pd/Au plating) 2. DIMENSION "*3" DOES NOTINCLUDE TRIM OFFSET.<br>e<br>Reference Dimension in Millimeters<br>Symbol Min Nom Max<br>L1 DE 4.3.9095 5.3<br>A2<br>A1 0.10 0.14 0.25<br>A 1.75<br>bp 0.34 0.40 0.46<br>b1<br>c 0.15 0.20 0.25<br>L c1<br>0° 8°<br>y HE 5.80 6.10 6.20<br>Detail F e 1.27<br>x 0.25<br>y 0.1<br>Z 0.75<br>L 0.40 0.60 1.27<br>L1 1.08<br>F<br>E E<br>2* H c<br>A<br>A1<br>**----- End of picture text -----**<br> ## **Ordering Information** |**Part No.**|**Quantity**|**Shipping Container**| |---|---|---| |RJE0607JSP-00-J0|2500pcs/reel|Taping| R07DS0123EJ0200 Rev.2.00 Sep 01, 2010 Page 7 of 7 ## Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 4. 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