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RFD16N05SM9A
Power MOSFET, N Channel, 50 V, 16 A, 0.047 ohm, TO-252AA, Surface Mount
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- Manufacturer: ONSEMI
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:16A; Drain Source Voltage Vds:50V; On Resistance Rds(on):0.047ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Po
- MSL: MSL 1 - Unlimited
- SVHC: Lead (25-Jun-2025)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 72W
- Transistor Mounting: Surface Mount
- Transistor Polarity: N Channel
- Power Dissipation Pd: 72W
- Rds(on) Test Voltage: 10V
- On Resistance Rds(on): 0.047ohm
- Transistor Case Style: TO-252AA
- Drain Source Voltage Vds: 50V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 16A
- Drain Source On State Resistance: 0.047ohm
- Automotive Qualification Standard: -
- Gate Source Threshold Voltage Max: 4V
| Delivery and price | |
|---|---|
| Units per pack | 2500 |
| Price | 0.365 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
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_**RFD16N05SM**_
## _**Data Sheet**_
## _**September 2013**_
## _**N-Channel Power MOSFET 50V, 16A, 47 mΩ**_
The RFD16N05 and RFD16N05SM N-channel power MOSFETs are manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. These transistors can be operated directly from integrated circuits.
Formerly developmental type TA09771.
## _**Ordering Information**_
|**PART NUMBER**|**PACKAGE**|**BRAND**|
|---|---|---|
|RFD16N05SM9A|TO-252AA|D16N05|
## _**Features**_
- 16A, 50V
- rDS(ON) = 0.047Ω
- Temperature Compensating PSPICE[®] Model
- Peak Current vs Pulse Width Curve
- UIS Rating Curve
- 175[o] C Operating Temperature
- Related Literature
- TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”
## _**Symbol**_
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D<br>G<br>S<br>**----- End of picture text -----**<br>
## _**Packaging**_
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JEDEC TO-252AA<br>**----- End of picture text -----**<br>
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DRAIN (FLANGE)<br>GATE sm<br>gy<br>SOURCE<br>**----- End of picture text -----**<br>
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
**Absolute Maximum Ratings** TC = 25[o] C, Unless Otherwise Specified
|**Absolute Maximum Ratings**<br>TC = 25C = 25= 25[o]C, Unless Otherwise Specified|||
|---|---|---|
||**RFD16N05SM9A**|**UNITS**|
|Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS|50|V|
|Drain to Gate Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR|50|V|
|Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID|16|A|
|Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM|Refer to Peak Current Curve||
|Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS|±20|V|
|Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS|Refer to Figure 5||
|Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD|72|W|
|Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .|0.48|W/oC|
|Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,TSTG|-55 to 175|oC|
|Maximum Temperature for Soldering|||
|Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL|300|oC|
|Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg|260|oC|
_CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied._
NOTE:
1. TJ = 25[o] C to 150[o] C.
## **Electrical Specifications** TC = 25[o] C, Unless Otherwise Specified
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**|**TEST CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|
|---|---|---|---|---|---|---|---|
|Drain to Source Breakdown Voltage|BVDSS|ID= 250µA, VGS= 0V (Figure 11)||50|-|-|V|
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250µA||2|-|4|V|
|Zero Gate Voltage Drain Current|IDSS|VDS= Rated BVDSS, VGS= 0V||-|-|1|µA|
|||VDS= 0.8 x Rated BVDSS, VGS= 0V,<br>TC= 150oC||-|-|25|µA|
|Gate to Source Leakage Current|IGSS|VGS=±20V||-|-|±100|nA|
|Drain to Source On Resistance (Note 2)|rDS(ON)|ID= 16A, VGS= 10V (Figure 9)||-|-|0.047|Ω|
|Turn-On Time|t(ON)|VDD= 25V, ID= 8A, RL= 3.125Ω,<br>VGS= 10V, RGS= 25Ω<br>(Figure 13)||-|-|65|ns|
|Turn-On Delay Time|td(ON)|||-|14|-|ns|
|Rise Time|tr|||-|30|-|ns|
|Turn-Off Delay Time|td(OFF)|||-|55|-|ns|
|Fall Time|tf|||-|30|-|ns|
|Turn-Off Time|t(OFF)|||-|-|125|ns|
|Total Gate Charge|Qg(TOT)|VGS= 0V to 20V|VDD= 40V, ID ≈16A,<br>RL= 2.5Ω<br>Ig(REF)= 0.8mA<br>(Figure 13)|-|-|80|nC|
|Gate Charge at 10V|Qg(10)|VGS= 0V to 10V||-|-|45|nC|
|Threshold Gate Charge|Q(TH)|VGS= 0V to 2V||-|-|2.2|nC|
|Input Capacitance<br>~~SSS~~|CISS<br>~~SSS~~|VDS= 25V, VGS= 0V, f = 1MHz<br>(Figure 12)<br>~~SSS~~||-<br>~~SSS~~|900<br>~~SSS~~|-<br>~~SSS~~|pF<br>~~SSS~~|
|Output Capacitance<br>~~SSS~~|COSS<br>~~SSS~~|||-<br>~~SSS~~|325<br>~~SSS~~|-<br>~~SSS~~|pF<br>~~SSS~~|
|Reverse Transfer Capacitance<br>~~SSS~~|CRSS<br>~~SSS~~|||-<br>~~SSS~~|100<br>~~SSS~~|-<br>~~SSS~~|pF<br>~~SSS~~|
|Thermal Resistance Junction to Case<br>~~SSS~~|RθJC<br>~~SSS~~|~~SSS~~||-<br>~~SSS~~|-<br>~~SSS~~|2.083<br>~~SSS~~|oC/W<br>~~SSS~~|
|Thermal Resistance Junction to Ambient<br>~~SSS~~<br>~~—_~~|RθJA<br>~~SSS~~<br>~~—_~~|TO-251 and TO-252<br>~~SSS~~<br>~~—_~~<br>~~ee~~||-<br>~~SSS~~<br>~~ee~~|-<br>~~SSS~~<br>~~ee~~|100<br>~~SSS~~<br>~~ee~~|oC/W<br>~~SSS~~<br>~~ee~~|
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
## _**Typical Performance Curves**_ Unless Otherwise Specified
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1.2 20<br>1.0<br>16<br>0.8<br>12<br>0.6<br>tT [IKE]<br>8<br>0.4 eee IN \<br>0.2 a eeNe 4<br>0 0<br>0 ttt 25 50 75 100 Te 125 150 nN 175 25 PEEL 50 75 100 125 ft 150 | 175<br>TC, CASE TEMPERATURE ( [o] C) TC, CASE TEMPERATURE ( [o] C)<br>FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs<br>TENPERATURE CASE TEMPERATURE<br>2<br>1<br>= oe eee eee eee eee<br>0.5 —aeee tyeer TT eee eee<br>aeeeA BO Oteeee ee<br>0.2<br>PDM<br>eee I<br>0.1<br>0.1 ee —-antl || || |<br>0.050.02 osffa ce% cc 0 Oee ee eee ee t1 t2 LL;<br>0.01<br>ee ee ee eee NOTES: i<br>SINGLE PULSE<br>DUTY FACTOR: D = t1/t2<br>PEAK TJ = PDM x Z θ JA x R θ JA + TA<br>0.01 AC<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0] 10 [1]<br>t, RECTANGULAR PULSE DURATION (s)<br>FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE<br>SINGLE PULSE<br>100 TJ = MAX RATED TC = 25 [o] C 200 VGS = 20VGS = 20V = 20V FOR TEMPERATURES ABOVE 25 [[o]] C DERATE PEAK<br>CURRENT AS FOLLOWS:<br>VGS = 10VGS = 10V = 10V I = I25 = I25I2525 175 - TCC<br>100 150<br>PN | et Ts TU TTT 100 µ s TT in, Oar Oar —=<br>a = Tre |SENGttt NULL aealSENGttt NULL aealttt NULL aeal NULL aeal aealeal TC = 25C = 25 = 25 [[o]] C |||<br>10<br>1ms rT Ba!<br>Zee HENSFOIE NOISEHa NOISEHaHa<br>aS OPERATION IN THIS re [se] eee FOIE NOISEHa NOISEHaHa E<br>AREA MAY BE TT tt NA . Te TFT PT | [[Nail]] AI<br>LIMITED BY r DS(ON) 10ms TRANSCONDUCTANCE<br>ities ha a MAY LIMIT CURRENT BDSUVSUV<br>100ms<br>IN THIS REGION<br>VDSS(MAX) = 50V DC<br>1<br>1 10 100 10<br>tir VDS, DRAIN TO SOURCE VOLTAGE (V) "8 10 [[-5]] 10 [[-4]] 10 [[-3]] 10 CUM [[-2]] 10 [[-1]] 10 [[0]] 10 [[1]]<br>, DRAIN CURRENT (A)<br>ID<br>POWER DISSIPATION MULTIPLIER<br>, NORMALIZED<br>JC<br>θ<br>Z<br>THERMAL IMPEDANCE<br>, DRAIN CURRENT (A) , PEAK CURRENT (A)<br>ID IDMDM<br>**----- End of picture text -----**<br>
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FOR TEMPERATURES<br>200 VGS = 20VGS = 20V = 20V ABOVE 25 [[o]] C DERATE PEAK<br>CURRENT AS FOLLOWS:<br>VGS = 10VGS = 10V = 10V I = I25 = I25I2525 175 - TCC<br>100 150<br>in, Oar Oar —=<br>|SENGttt NULL aealSENGttt NULL aealttt NULL aeal NULL aeal aealeal TC = 25C = 25 = 25 [[o]] C |||<br>Ba!<br>HENSFOIE NOISEHa NOISEHaHa E<br>| [[Nail]] AI<br>TRANSCONDUCTANCE<br>MAY LIMIT CURRENT BDSUVSUV<br>IN THIS REGION<br>10<br>10 [[-5]] 10 [[-4]] 10 [[-3]] 10 CUM [[-2]] 10 [[-1]] 10 [[0]] 10 [[1]]<br>t, PULSE WIDTH (s)<br>, PEAK CURRENT (A)<br>IDMDM<br>**----- End of picture text -----**<br>
**FIGURE 4. FORWARD BIAS SAFE OPERATING AREA**
**FIGURE 5. PEAK CURRENT CAPABILITY**
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
## _**Typical Performance Curves**_ Unless Otherwise Specified **(Continued)**
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100<br>STARTING TJ = 25 [o] C<br>10<br>STARTING TJ = 150 [o] C<br>If R = 0<br>tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)<br>If R ≠ 0<br>tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS-VDD) +1]<br>1 Fo<br>0.01 0.1 1 10<br>tAV, TIME IN AVALANCHE (ms)<br>NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.<br>FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING<br>50<br>VDD = 15V -55 [o] C 175 [o] C<br>PULSE DURATION = 80 µ s<br>40 DUTY CYCLE = 0.5% MAX<br>25 [o] C<br>ee<br>30 ae<br>20 ee[fetAan<br>100 |B| Ae| |<br>0 2 4 6 8 10<br>VGS, GATE TO SOURCE VOLTAGE (V)<br>FIGURE 8. TRANSFER CHARACTERISTICS<br>2.0<br>VGS = VDS, ID = 250 µ A<br>1.5<br>1.0<br>0.5<br>0<br>-80 -40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATURE ( [o] C)<br>, AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN TO SOURCE CURRENT (A)<br>IDS(ON)<br>NORMALIZED GATE<br>THRESHOLD VOLTAGE<br>**----- End of picture text -----**<br>
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
**FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE**
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50<br>VGS = 20V VGS = 10V V GS = 8V<br>VGS = 7V<br>40<br>PULSE DURATION = 80 µ s<br>DUTY CYCLE = 0.5% MAX<br>30 T C = 25 [o] C<br>VGS = 6V<br>20<br>10 VGS = 5V<br>VGS = 4.5V<br>0 |Za<br>0 1 2 3 4<br>VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>
**FIGURE 7. SATURATION CHARACTERISTICS**
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2.5<br>PULSE DURATION = 80 µ s<br>DUTY CYCLE = 0.5% MAX<br>VGS = 10V, ID = 16A<br>2.0<br>1.5<br>1.0<br>0.5<br>0<br>-80 -40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATURE ( [o] C)<br>FIGURE 9. NORMALIZED DRAIN TO SOURCE ON<br>RESISTANCE vs JUNCTION TEMPERATURE<br>2.0<br>ID = 250 µ A<br>1.5<br>1.0<br>0.5<br>0<br>-80 -40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATURE ( [o] C)<br>ON RESISTANCE<br>NORMALIZED DRAIN TO SOURCE<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>**----- End of picture text -----**<br>
**FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE**
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
## _**Typical Performance Curves**_ Unless Otherwise Specified **(Continued)**
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**----- Start of picture text -----**<br>
1600 50 10<br>VGS = 0V, f = 1MHz<br>CISS = CGS + CGD VDD = BVDSS VDD = BVDSS<br>ty CRSS = CGD 37.5 JX 7.5<br>1200 C OSS ≈ C DS + C GS<br>CISS<br>25 5<br>800<br>0.75 BVDSS<br>0.50 BVDSS<br>COSS 0.25 BVDSS<br>12.5 2.5<br>400 ee eee RL = 3.125 Ω<br>CRSS IVG(REF)GS = 10V = 0.8mA<br>0 0<br>0 0 SS 5 10 15 20 25 ea YS 20 ------------------------IG ( REF ) t, TIME (ms) 80 -------------------- IG ( REF - )<br>VDS, DRAIN TO SOURCE VOLTAGE (V) IG ( ACT ) IG ( ACT )<br>NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.<br>FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR<br>CONSTANT GATE CURRENT<br>C, CAPACITANCE (pF)<br>, DRAIN TO SOURCE VOLTAGE (V) , GATE TO SOURCE VOLTAGE (V)<br>VDS VGS<br>**----- End of picture text -----**<br>
## _**Test Circuits and Waveforms**_
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**----- Start of picture text -----**<br>
VDS<br>BVDSS<br>L tP<br>VDS<br>REQUIRED PEAK IVARY tP TO OBTAINAS RG +VDD IAS VDD<br>VGS -<br>DUT<br>tP<br>0V IAS 0<br>0.01 Ω<br>tAV<br>? |<br>**----- End of picture text -----**<br>
**FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT**
**FIGURE 15. UNCLAMPED ENERGY WAVEFORMS**
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VDS<br>VGS RL<br>+<br>VDD<br>-<br>DUT<br>RGS<br>VGS<br>**----- End of picture text -----**<br>
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**----- Start of picture text -----**<br>
tON tOFF<br>td(ON) td(OFF)<br>tr tf<br>VDS<br>90% 90%<br>10% 10%<br>0<br>90%<br>VGS 50% 50%<br>PULSE WIDTH<br>10%<br>0<br>**----- End of picture text -----**<br>
**FIGURE 16. SWITCHING TIME TEST CIRCUIT**
**FIGURE 17. RESISTIVE SWITCHING WAVEFORMS**
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
## _**Test Circuits and Waveforms**_ **(Continued)**
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VDS<br>RL VDD -——|A<_—_ N VDS Qg(TOT) —_______-|<br>N SaoN VGS = 20V<br>N<br>VGS + N Qg(10)<br>—= - VDD VGS | —a -——— N N \ —-| VGS = 10V<br>N<br>DUT VGS = 2V N N<br>IG(REF) 0 meee<br>|. Qg(TH) eee eee<br>IG(REF)<br>0<br>**----- End of picture text -----**<br>
**FIGURE 18. GATE CHARGE TEST CIRCUIT**
**FIGURE 19. GATE CHARGE WAVEFORM**
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
## _**PSPICE Electrical Model**_
.SUBCKT RFD16N05 2 1 3 ; rev 10/31/94
CA 12 8 1.788e-10 CB 15 14 1.875e-10 CIN 6 8 8.33e-10
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DPLCAP 5 DRAIN<br>DBODY 7 5 DBDMOD 10 2<br>LDRAIN<br>DBREAK 5 11 DBKMOD<br>DPLCAP 10 5 DPLCAPMOD<br>RSCL1<br>EBREAK 11 7 17 18 64.89 RSCL2 + 51 DBREAK<br>5<br>EDS 14 8 5 8 1 51 ESCL<br>EGS 13 8 6 8 1ESG 6 10 6 8 1EVTO 20 6 18 8 1 ESG +- 68 VTO 16 50RDRAIN EBREAK11 1718+ DBODY<br>IT 8 17 1 + -<br>MOS2<br>GATE EVTO 21<br>LDRAIN 2 5 1e-9 1 9 20 + 18 - 6 MOS1<br>8<br>LGATE 1 9 4.56e-9 LGATE RGATE<br>LSOURCE 3 7 4.13e-9 RIN CIN<br>RSOURCE LSOURCE<br>8 7<br>MOS1 16 6 8 8 MOSMOD M = 0.99 a 3<br>MOS2 16 21 8 8 MOSMOD M = 0.01 SOURCE<br>S1A S2A<br>RBREAK 17 18 RBKMOD 1RDRAIN 50 16 RDSMOD 0.4e-3 12 13 14 15 17 RBREAK 18<br>RGATE 9 20 3.0 8 13<br>RIN 6 8 1e9 S1B S2B RVTO<br>RSCL1 5 51 RSCLMOD 1e-6RSCL2 5 50 1e3 CA + 13 CB 14 IT 19<br>RSOURCE 8 7 RDSMOD 21.5e-3 6 + 5 VBAT<br>RVTO 18 19 RVTOMOD 1 EGS 8 EDS - 8 +<br>-<br>**----- End of picture text -----**<br>
S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1 VTO 21 6 0.82
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/94,7))}
.MODEL DBDMOD D (IS = 2.5e-13 RS = 7.1e-3 TRS1 = 3.04e-3 TRS2 = -10e-6 CJO = 1.12e-9 TT = 5.6e-8) .MODEL DBKMOD D (RS = 2.51e-1 TRS1 = -6.57e-4 TRS2 = 1.66e-6) .MODEL DPLCAPMOD D (CJO = 6.1e-10 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 3.96 KP = 16.68 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 1.07e-3 TC2 = -7.19e-7) .MODEL RDSMOD RES (TC1 = 5.45e-3 TC2 = 1.66e-5) .MODEL RSCLMOD RES (TC1 = 1.25e-3 TC2 = 17e-6) .MODEL RVTOMOD RES (TC1 = -5.15e-3 TC2 = -4.83e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5.25 VOFF= -3.25) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.25 VOFF= -5.25) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.56 VOFF= 5.56) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 5.56 VOFF= 0.56)
.ENDS
NOTE: For further discussion of the PSPICE model, consult **A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options** ; written by William J. Hepp and C. Frank Wheatley.
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
_**RFD16N05SM**_
## **TRADEMARKS**
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
|AccuPower™<br>AX-CAP®*<br>BitSiC™<br>Build it Now™<br>CorePLUS™<br>CorePOWER™<br>_CROSSVOLT_™<br>CTL™<br>Current Transfer Logic™<br>DEUXPEED®<br>Dual Cool™<br>EcoSPARK®<br>EfficentMax™<br>ESBC™<br>Fairchild®<br>Fairchild Semiconductor®<br>FACT Quiet Series™<br>FACT®<br>FAST®<br>FastvCore™<br>FETBench™<br>FPS™<br>®|F-PFS™<br>FRFET®<br>Global Power ResourceSM<br>GreenBridge™<br>Green FPS™<br>Green FPS™ e-Series™<br>G_max_™<br>GTO™<br>IntelliMAX™<br>ISOPLANAR™<br>Marking Small Speakers Sound Louder<br>and Better™<br>MegaBuck™<br>MICROCOUPLER™<br>MicroFET™<br>MicroPak™<br>MicroPak2™<br>MillerDrive™<br>MotionMax™<br>mWSaver®<br>OptoHiT™<br>OPTOLOGIC®<br>OPTOPLANAR®|PowerTrench®<br>PowerXS™<br>Programmable Active Droop™<br>QFET®<br>QS™<br>Quiet Series™<br>RapidConfigure™<br>Saving our world, 1mW/W/kW at a time™<br>SignalWise™<br>SmartMax™<br>SMART START™<br>Solutions for Your Success™<br>SPM®<br>STEALTH™<br>SuperFET®<br>SuperSOT™-3<br>SuperSOT™-6<br>SuperSOT™-8<br>SupreMOS®<br>SyncFET™<br>™<br>tm®|Sync-Lock™<br>®*<br>TinyBoost®<br>TinyBuck®<br>TinyCalc™<br>TinyLogic®<br>TINYOPTO™<br>TinyPower™<br>TinyPWM™<br>TinyWire™<br>TranSiC™<br>TriFault Detect™<br>TRUECURRENT®*<br>SerDes™<br>UHC®<br>Ultra FRFET™<br>UniFET™<br>VCX™<br>VisualMax™<br>VoltagePlus™<br>XS™<br>E SYSTEM<br>GENERAL<br>WZ...|
|---|---|---|---|
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
## **DISCLAIMER**
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
## **LIFE SUPPORT POLICY**
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are 2. intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
- A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
## **ANTI-COUNTERFEITING POLICY**
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
## **PRODUCT STATUS DEFINITIONS**
## **Definition of Terms**
|**Datasheet Identification**|**Product Status**|**Definition**|
|---|---|---|
|Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications<br>may change in any manner without notice.|
|Preliminary|First Production|Datasheet contains preliminary data; supplementary data will be published at a later<br>date. Fairchild Semiconductor reserves the right to make changes at any time without<br>notice to improve design.|
|No Identification Needed|Full Production|Datasheet contains final specifications. Fairchild Semiconductor reserves the right to<br>make changes at any time without notice to improve the design.|
|Obsolete|Not In Production|Datasheet contains specifications on a product that is discontinued by Fairchild<br>Semiconductor. The datasheet is for reference information only.|
Rev. I66
©2003 Fairchild Semiconductor Corporation
RFD16N05SM Rev. C0
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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Updated at March 10, 2026
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