Image not available
Illustrative purposes only
PSMN8R7-80BS,118
Power MOSFET, N Channel, 80 V, 90 A, 7500 µohm, TO-263 (D2PAK), Surface Mount
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:90A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.0075ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Power
- MSL: MSL 1 - Unlimited
- SVHC: Lead (25-Jun-2025)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 170W
- Transistor Mounting: Surface Mount
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-263 (D2PAK)
- Drain Source Voltage Vds: 80V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 90A
- Drain Source On State Resistance: 7500µohm
- Gate Source Threshold Voltage Max: 3V
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.777 € |
| Current stock | 1000+ |
| Lead time | 30 days |
Datasheet
## **PSMN8R7-80BS** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **Rev. 2 — 2 March 2012** ## **Product data sheet** ## **1. Product profile** ## **1.1 General description** Standard level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. ## **1.2 Features and benefits** - High efficiency due to low switching and conduction losses - Suitable for standard level gate drive ## **1.3 Applications** DC-to-DC converters - Load switching - Motor control - Server power supplies ## **1.4 Quick reference data** ## **Table 1. Quick reference data** |**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---| |VDS|drain-source voltage|Tj≥25 °C; Tj≤175 °C|-|-|80|V| |ID|drain current|Tmb= 25 °C; VGS= 10 V; seeFigure 1|-|-|90|A| |Ptot|total power dissipation|Tmb= 25 °C; seeFigure 2|-|-|170|W| |Tj|junction temperature||-55|-|175|°C| |**Static characteristics**||||||| |RDSon|drain-source on-state|VGS= 10 V; ID= 10 A; Tj= 100 °C;|-|-|14|mΩ| ||resistance|seeFigure 12||||| |||||||| |||VGS= 10 V; ID= 10 A; Tj= 25 °C;|-|7.5|8.7|mΩ| |||seeFigure 13||||| |||||||| |**Dynamic characteristics**||||||| |QGD<br>QG(tot)|gate-drain charge<br>total gate charge|VGS= 10 V; ID= 25 A; VDS= 40 V;<br>seeFigure 14<br>;see Figure 15|-<br>-|11<br>52|-<br>-|nC<br>nC| |**Avalanche ruggedness**|**Avalanche ruggedness**|||||| |EDS(AL)S|non-repetitive|VGS= 10 V; Tj(init)= 25 °C; ID= 90 A;|-|-|120|mJ| ||drain-source|Vsup≤80 V; RGS= 50 Ω; unclamped||||| ||avalanche energy|||||| **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** ## **2. Pinning information** ## **Table 2. Pinning information** |**Pin**|**Symbol**|**Description**|**Simplified outline**|**Simplified outline**|**Simplified outline**|**Simplified outline**|**Simplified outline**|**Simplified outline**||**Graphic symbol**||||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |1<br>2|G<br>D|gate<br>drain[1]|||mb|||||||D||| |||||||||||||||| |3|S|source||||||||||||| |||||||||||G||||| |mb|D|mounting base; connected to||||||||||||| |||drain||1|2|||3||_mbb076_||S||| ||||**SOT404**|||**(D2PAK)**||||||||| [1] It is not possible to make connection to pin 2. ## **3. Ordering information** ## **Table 3. Ordering information** |**Type number**|**Package**| |---|---| ||**Name**<br>**Description**<br>**Version**| |PSMN8R7-80BS|D2PAK<br>plastic single-ended surface-mounted package (D2PAK); 3 leads<br>(one lead cropped)<br>SOT404| ## **4. Limiting values** ## **Table 4. Limiting values** _In accordance with the Absolute Maximum Rating System (IEC 60134)._ |**Symbol**|**Parameter**|**Conditions**|**Min**|**Max**|**Unit**| |---|---|---|---|---|---| |VDS|drain-source voltage|Tj≥25 °C; Tj≤175 °C|-|80|V| |VDGR|drain-gate voltage|Tj≥25 °C; Tj≤175 °C; RGS= 20 kΩ|-|80|V| |VGS|gate-source voltage||-20|20|V| |ID|drain current|VGS= 10 V; Tmb= 100 °C; seeFigure 1|-|64|A| |||VGS= 10 V; Tmb= 25 °C; seeFigure 1|-|90|A| |IDM|peak drain current|pulsed; tp≤10 µs; Tmb= 25 °C;|-|361|A| |||seeFigure 3|||| |Ptot|total power dissipation|Tmb= 25 °C; seeFigure 2|-|170|W| ||||||| |Tstg|storage temperature||-55|175|°C| |Tj|junction temperature||-55|175|°C| |Tsld(M)|peak soldering temperature||-|260|°C| |**Source-drain**|**diode**||||| |IS|source current|Tmb= 25 °C|-|90|A| |ISM|peak source current|pulsed; tp≤10 µs; Tmb= 25 °C|-|361|A| |**Avalanche ruggedness**|||||| |EDS(AL)S|non-repetitive drain-source|VGS= 10 V; Tj(init)= 25 °C; ID= 90 A;|-|120|mJ| ||avalanche energy|Vsup≤80 V; RGS= 50 Ω; unclamped|||| All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS **Product data sheet** **Rev. 2 — 2 March 2012** **2 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **==> picture [455 x 253] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad363 03aa16<br>100 120<br>ID<br>(A) Sos) Pder «6g<br>80 PIN| PE (%)<br>80<br>CIS PINE TT<br>60<br>SEEPS TINE<br>P| | | IN | \<br>40<br>PEEPS 40 NS<br>ptt tT tT | NT ~<br>20<br>See BERERNEE<br>0 CEREEEHE [tt] [ey] 0 PTE\<br>0 pt 50 [it] 100 150Tmb ( ° C)200 0 50 TT 100 IN 150Tmb ( ° C)200<br>Ves =10V Picy =pt 100 %<br>Fig 1. Continuous drain current as a function of Fig 2. Normalized total power dissipation as a<br>mounting base temperature function of mounting base temperature<br>**----- End of picture text -----**<br> **==> picture [432 x 182] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad387<br> 10 [3]<br>ID Limit R DSon = V DS / I D 10 μ s<br>(A)<br> 10 [2] eee<br>ee LeSS err<br>100 μ s<br>as SS<br> 10<br>i SS NNNeee<br>PE NRE<br>DC<br> 1<br>— EESSE 1 ms rr<br>10 ms<br>100 ms<br>10 [-1] ——-—F-+-Fa FFF SSH FEPT<br> 1 10 10 [2] 10 [3]<br>VDS (V)<br>**----- End of picture text -----**<br> **Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage** © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Product data sheet** **Rev. 2 — 2 March 2012** **3 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** ## **5. Thermal characteristics** **Table 5. Thermal characteristics** **==> picture [497 x 316] intentionally omitted <==** **----- Start of picture text -----**<br> Symbol Parameter Conditions Min Typ Max Unit<br>Rth(j-mb) thermal resistance from junction to see Figure 4 - 0.54 0.88 K/W<br>mounting base<br>Rth(j-a) thermal resistance from junction to Minimum footprint; mounted on a - 50 - K/W<br>ambient printed circuit board<br>003aad355<br> 1<br>Zth(j-mb) δ = 0.5<br>(K/W)<br>0.2<br>10 [-1]<br>0.1<br>0.05<br>0.02<br>10 [-2]<br>P δ = t p<br>T<br>10 [-3]<br>single shot<br>t p t<br>T<br>10 [-4]<br>10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s) 1<br>Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical<br>values<br>**----- End of picture text -----**<br> © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Product data sheet** **Rev. 2 — 2 March 2012** **4 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** ## **6. Characteristics** **Table 6. Characteristics** _Tested to JEDEC standards where applicable._ |**Symbol**<br>**Parameter**|**Conditions**|**Min**<br>**Typ**<br>**Max**<br>**Unit**| |---|---|---| |**Static characteristics**||| |V(BR)DSS<br>drain-source<br>breakdown voltage|ID= 250 µA; VGS= 0 V; Tj= -55 °C|73<br>-<br>-<br>V| ||ID= 250 µA; VGS= 0 V; Tj= 25 °C|80<br>-<br>-<br>V| |VGS(th)<br>gate-source threshold<br>voltage|ID= 1 mA; VDS= VGS; Tj= 175 °C;<br>seeFigure 10|1<br>-<br>-<br>V| ||ID= 1 mA; VDS= VGS; Tj= -55 °C;<br>seeFigure 10|-<br>-<br>4.6<br>V| ||ID= 1 mA; VDS= VGS; Tj= 25 °C;<br>seeFigure 11<br>;see Figure 10|2.3<br>3<br>4<br>V| |IDSS<br>drain leakage current|VDS= 80 V; VGS= 0 V; Tj= 25 °C|-<br>0.3<br>5<br>µA| ||VDS= 80 V; VGS= 0 V; Tj= 125 °C|-<br>-<br>100<br>µA| |IGSS<br>gate leakage current|VGS= -20 V; VDS= 0 V; Tj= 25 °C|-<br>10<br>100<br>nA| ||VGS= 20 V; VDS= 0 V; Tj= 25 °C|-<br>10<br>100<br>nA| |RDSon<br>drain-source on-state<br>resistance|VGS= 10 V; ID= 10 A; Tj= 175 °C;<br>seeFigure 12|-<br>-<br>20.88<br>mΩ| |||| ||VGS= 10 V; ID= 10 A; Tj= 100 °C;<br>seeFigure 12|-<br>-<br>14<br>mΩ| |||| ||VGS= 10 V; ID= 10 A; Tj= 25 °C;<br>seeFigure 13|-<br>7.5<br>8.7<br>mΩ| |||| |RG<br>internal gate resistance<br>(AC)|f = 1 MHz|-<br>1<br>-<br>Ω| |**Dynamic characteristics**||| |QG(tot)<br>total gate charge|ID= 0 A; VDS= 0 V; VGS= 10 V|-<br>44<br>-<br>nC| ||ID= 25 A; VDS= 40 V; VGS= 10 V;<br>seeFigure 14<br>;see Figure 15|-<br>52<br>-<br>nC| |QGS<br>gate-source charge||-<br>15<br>-<br>nC| |QGS(th)<br>pre-threshold<br>gate-source charge|ID= 25 A; VDS= 40 V; VGS= 10 V;<br>seeFigure 14|-<br>9.2<br>-<br>nC| |QGS(th-pl)<br>post-threshold<br>gate-source charge||-<br>5.8<br>-<br>nC| |QGD<br>gate-drain charge|ID= 25 A; VDS= 40 V; VGS= 10 V;<br>seeFigure 14<br>;see Figure 15|-<br>11<br>-<br>nC| |VGS(pl)<br>gate-source plateau<br>voltage|ID= 25 A; VDS= 40 V; seeFigure 15|-<br>4.6<br>-<br>V| |Ciss<br>input capacitance|VDS= 40 V; VGS= 0 V; f = 1 MHz;<br>Tj= 25 °C; seeFigure 16|-<br>3346<br>-<br>pF| |Coss<br>output capacitance||-<br>296<br>-<br>pF| |Crss<br>reverse transfer<br>capacitance||-<br>158<br>-<br>pF| |td(on)<br>turn-on delay time|VDS= 40 V; RL= 1.6 Ω; VGS= 10 V;<br>RG(ext)= 4.7 Ω|-<br>21<br>-<br>ns| |tr<br>rise time||-<br>26<br>-<br>ns| |td(off)<br>turn-off delay time||-<br>46<br>-<br>ns| |tf<br>fall time||-<br>20<br>-<br>ns| PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. **Product data sheet** **Rev. 2 — 2 March 2012** **5 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **Table 6. Characteristics** _…continued Tested to JEDEC standards where applicable._ |**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---| |**Source-drain diode**|**Source-drain diode**|||||| |VSD|source-drain voltage|IS= 10 A; VGS= 0 V; Tj= 25 °C;|-|0.79|1.2|V| |||seeFigure 17||||| |trr|reverse recovery time|IS= 25 A; dIS/dt = 100 A/µs; VGS= 0 V;|-|42|-|ns| |Qr|recovered charge|VDS= 40 V|-|66|-|nC| **==> picture [430 x 185] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad449 003aad451<br>100 100<br>20 5.5<br>ID ID<br>(A) ty 8 | 5 (A) ee<br>80 aRfee 6 80 PFeee| fT | rT ee<br>60 60<br>We ee<br>2 Aree |<br>40 4.5 40 Tj = 175 ° C<br>POLE e/a<br>20 20<br>Po ee ee Tj = 25 ° C<br>V GS (V) = 4<br>fp ee)<br>0 a 0 | | YA<br>0 1 2 3 4 0 2 4 6<br>VDS (V) VGS (V)<br>**----- End of picture text -----**<br> **Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values** **==> picture [187 x 183] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad455<br>5000<br>C<br>Ciss<br>(pF)<br>4000 reiap+TtT || dT| TT| dt ll<br>3000 Crss<br>SSS<br>||pPrrre |<br>2000 Pi7A | | | | |<br>px] | | Tl<br>1000 fi | | | ft |<br>fi | | | td<br>0 Pt} | ttt<br>0 3 6 9 12<br>VGS (V)<br>**----- End of picture text -----**<br> **Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values** **==> picture [182 x 185] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad456<br>100<br>gfs<br>(S)<br>80 Pliy7pittPt |pee fdtet yeTy<br>60<br>Pi[7T TTT |<br>Pi7E | | tT | ty<br>40 PF] Te yy tt<br>PAT TE | | |<br>20 fi | tt yy tt<br>yi [ity]<br>0 PL iT eT?eytT |yy<br>0 20 40 60 80 100<br>ID (A)<br>**----- End of picture text -----**<br> **Fig 7. Input and reverse transfer capacitances as a function of gate-source voltage; typical values** **Fig 8. Forward transconductance as a function of drain current; typical values** All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS **Product data sheet** **Rev. 2 — 2 March 2012** **6 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **==> picture [436 x 187] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad457 003aae992<br>25 5<br>RDSon VGS(th)(V)<br>(m Ω ) Pt tt | tT fit ttt<br>4<br>20 LOO Pee max<br>aco Se SN<br>3<br>typ<br>15 Ht aee<br>min<br>Ht | | 2 a i<br>| ty yt —|<br>10 EEC Seefat<br>poop 1 |] | | | | dt dt<br>5 See 0 ETE<br>4 8 12 16 20 − 60 0 60 120 180<br>VGS (V) Tj ( ° C)<br>**----- End of picture text -----**<br> **Fig 9. Drain-source on-state resistance as a function of gate-source voltage; typical values** **Fig 10. Gate-source threshold voltage as a function of junction temperature** **==> picture [183 x 186] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa35<br>10 [−] [1]<br>ID ee A CO (|<br>(A) SS<br>min typ max<br>10 [−] [2]<br>SSpe-=<br>———<br>10 [−] [3]<br>10 [−] [4]<br>— ff<br>10 [−] [5] pp<br>==<br>a YA===A |<br>10 [−] [6] a<br>0 2 4 6<br>VGS (V)<br>**----- End of picture text -----**<br> **==> picture [182 x 185] intentionally omitted <==** **----- Start of picture text -----**<br> 003aae090<br>3<br>a<br>P| | | |tt<br>2.4<br>J<br>1.8<br>1.2 pitt<br>0.6 L+-Tft tt<br>| | | | dt<br>pt it i ft tt<br>0<br>pt tT | | Tt<br>-60 0 60 120 180<br>Tj ( ° C)<br>**----- End of picture text -----**<br> **Fig 11. Sub-threshold drain current as a function of gate-source voltage** **Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature** © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Product data sheet** **Rev. 2 — 2 March 2012** **7 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **==> picture [434 x 444] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad450<br>20<br>RDSon TLL 4.5 VGS (V) = 5 oo<br>(m Ω )<br>17 SECCVEC CE Ea VDS ee ID j<br>14<br>=F FT LILLE an<br>5.5 VGS(pl)<br>ann 4nne FN<br>11 Seer TT Te 6 VGS(th) i \<br>Saeee2>e 8 VGS a, \<br>8 = | QGS1 QGS2<br>20<br>10 QGS QGD<br>5 eePPL EE QG(tot)<br>0 20 40 60 80 100 003aaa508<br>ID (A)<br>T,;=25°C<br>Drain-source on-state resistance as a function Fig 14. Gate charge waveform definitions<br>of drain current; typical values<br>003aad453 003aad454<br>10 10 [4]<br>VGS<br>(V) 16 V C<br>8 (pF)<br>64 V Ciss<br>Pf fo HT il<br>6<br>VDS = 40 V<br> 10 [3]<br>4 a7) MST [I]<br>2 C oss<br>A | | ff QE ON<br>An LTT Se Crss<br>0 a 10 [2] LUTE LINE TT<br>0 20 40 60 10 [-1] 1 10 10 [2]<br>QG (nC) VDS (V)<br>**----- End of picture text -----**<br> **Fig 13. Drain-source on-state resistance as a function of drain current; typical values** **Fig 15. Gate-source voltage as a function of gate charge; typical values** **Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values** All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. **Rev. 2 — 2 March 2012 8 of 14** PSMN8R7-80BS **Product data sheet** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **==> picture [183 x 185] intentionally omitted <==** **----- Start of picture text -----**<br> 003aad452<br>100<br>IS<br>(A) P| | | |fe<br>80<br>P| | | tT Ay<br>P| tt |<br>60<br>P| | | ty<br>pt} | Ey<br>40<br>pt} |] | eg fe<br>Tj = 175 ° C<br>20 |<br>| | fife<br>Tj = 25 ° C<br>0 —ff |<br>0 0.3 0.6 0.9 1.2<br>VSD (V)<br>**----- End of picture text -----**<br> **Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values** © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Product data sheet** **Rev. 2 — 2 March 2012** **9 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **SOT404** ## **7. Package outline** **Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)** **==> picture [479 x 560] intentionally omitted <==** **----- Start of picture text -----**<br> A<br>E A1<br>D1 mounting<br>base<br>D<br>HD<br>2<br>Lp<br>1 3<br>b c<br>e e Q<br>0 2.5 5 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>D<br>UNIT A A1 b c max. D1 E e Lp HD Q<br>mm 4.50 1.40 0.85 0.64 11 1.60 10.30 2.54 2.90 15.80 2.60<br>4.10 1.27 0.60 0.46 1.20 9.70 2.10 14.80 2.20<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC JEITA PROJECTION<br>05-02-11<br> SOT404<br>06-03-16<br>**----- End of picture text -----**<br> **Fig 18. Package outline SOT404 (D2PAK)** All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS **Product data sheet** **Rev. 2 — 2 March 2012** **10 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** ## **8. Revision history** ## **Table 7. Revision history** |**Document ID**|**Release date**<br>**Data sheet status**|**Change notice**|**Supersedes**| |---|---|---|---| |PSMN8R7-80BS v.2|20120302<br>Product data sheet|-|PSMN8R7-80BS v.1| |Modifications:|**•** Status changed from objective to product.||| ||**•** Various changes to content.||| |PSMN8R7-80BS v.1|20111024<br>Objective data sheet|-|-| © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Rev. 2 — 2 March 2012** **Product data sheet** **11 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** ## **9. Legal information** ## **9.1 Data sheet status** |**Document statu**~~**s**~~**[1]**<br>**[2]**|**Product status[3]**|**Definition**| |---|---|---| |Objective [short] data sheet|Development|This document contains data from the objective specification for product development.| |Preliminary [short] data sheet|Qualification|This document contains data from the preliminary specification.| |Product [short] data sheet|Production|This document contains the product specification.| [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com. ## **9.2 Definitions** **Right to make changes** — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. **Preview** — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. **Suitability for use** — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. **Draft** — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. **Short data sheet** — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. **Quick reference data** — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. **Applications** — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. **Product specification** — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. ## **9.3 Disclaimers** **Limited warranty and liability** — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. **Limiting values** — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of NXP Semiconductors. © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Product data sheet** **Rev. 2 — 2 March 2012** **12 of 14** **PSMN8R7-80BS** ## **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** **Terms and conditions of commercial sale** — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. **No offer to sell or license** — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. **Export control** — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. **Non-automotive qualified products** — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. **Translations** — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. ## **9.4 Trademarks** Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. **Adelante** , **Bitport** , **Bitsound** , **CoolFlux** , **CoReUse** , **DESFire** , **EZ-HV** , **FabKey** , **G reenChip** , **HiPerSmart** , **HITAG** , **I²C-bus** logo, **ICODE** , **I-CODE** , **ITEC** , **Labelution** , **MIFARE** , **MIFARE Plus** , **MIFARE Ultralight** , **MoReUse** , **QLPAK** , **Silicon Tuner** , **SiliconMAX** , **SmartXA** , **STARplug** , **TOPFET** , **TrenchMOS** , **TriMedia** and **UCODE** — are trademarks of NXP B.V. **HD Radio** and **HD Radio** logo — are trademarks of iBiquity Digital Corporation. ## **10. Contact information** For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com © NXP B.V. 2012. All rights reserved. PSMN8R7-80BS All information provided in this document is subject to legal disclaimers. **Product data sheet** **Rev. 2 — 2 March 2012** **13 of 14** **PSMN8R7-80BS** **NXP Semiconductors** **N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK** ## **11. Contents** |**11. **|**Contents**| |---|---| |**1**|**Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1**| |1.1|General description . . . . . . . . . . . . . . . . . . . . . .1| |1.2|Features and benefits. . . . . . . . . . . . . . . . . . . . .1| |1.3|Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1| |1.4|Quick reference data . . . . . . . . . . . . . . . . . . . . .1| |**2**|**Pinning information. . . . . . . . . . . . . . . . . . . . . . .2**| |**3**|**Ordering information. . . . . . . . . . . . . . . . . . . . . .2**| |**4**|**Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2**| |**5**|**Thermal characteristics . . . . . . . . . . . . . . . . . . .4**| |**6**|**Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5**| |**7**|**Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10**| |**8**|**Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11**| |**9**|**Legal information. . . . . . . . . . . . . . . . . . . . . . . .12**| |9.1|Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12| |9.2|Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12| |9.3|Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12| |9.4|Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13| |**10**|**Contact information. . . . . . . . . . . . . . . . . . . . . .13**| Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. **© NXP B.V. 2012.** **All rights reserved.** For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com **Date of release: 2 March 2012 Document identifier: PSMN8R7-80BS**
Updated at April 29, 2026
Nexperia is a dedicated global leader in discretes, logic, and MOSFET devices. Built on over half a century of semiconductor expertise and operating independently since 2017, the company produces consistently reliable components at an exceptional volume of 85 billion units annually. With its own manufacturing facilities, Nexperia delivers industry-leading small packages that combine power and thermal efficiency with best-in-class quality, meeting the rigorous standards of the automotive sector. Our extensive Nexperia portfolio is heavily focused on discrete semiconductors, providing engineers with a robust selection of core building blocks. This includes a comprehensive range of diodes and rectifiers, featuring a vast selection of Zener single diodes and Schottky diodes designed for precise voltage regulation and efficient power routing. Additionally, we offer an expansive array of bipolar transistors and single MOSFETs tailored for reliable switching and amplification in demanding applications. Beyond these primary offerings, the lineup extends into specialized circuit protection and passive components. This includes transient voltage suppressor (TVS) diodes, Zener array diodes, and small signal diodes, alongside dual MOSFETs and fast recovery rectifiers. For comprehensive design needs, the selection also encompasses integrated passive filters, common mode chokes, and precision timers and oscillators, ensuring a complete solution for high-performance electronic systems.
About Novapart
Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →