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PSMN6R0-30YLDX
Power MOSFET, N Channel, 30 V, 66 A, 5000 µohm, SOT-669, Surface Mount
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:66A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.005ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1.83V;
- MSL: MSL 1 - Unlimited
- SVHC: Lead (25-Jun-2025)
- No. of Pins: 4Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 47W
- Transistor Mounting: Surface Mount
- Rds(on) Test Voltage: 10V
- Transistor Case Style: SOT-669
- Drain Source Voltage Vds: 30V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 66A
- Drain Source On State Resistance: 5000µohm
- Gate Source Threshold Voltage Max: 1.83V
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.223 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
## **PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology 10 February 2014**
**Product data sheet**
## **1. General description**
Logic level gate drive N-channel enhancement mode MOSFET in LFPAK56 package. NextPowerS3 portfolio utilising Nexperia’s unique “SchottkyPlus” technology delivers high efficiency, low spiking performance usually associated with MOSFETs with an integrated Schottky or Schottky-like diode but without problematic high leakage current. NextPowerS3 is particularly suited to high efficiency applications at high switching frequencies.
## **2. Features and benefits**
- Ultra low QG, QGD and QOSS for high system efficiency, especially at higher switching frequencies
- Superfast switching with soft-recovery; s-factor > 1
- Low spiking and ringing for low EMI designs
- Unique “SchottkyPlus” technology; Schottky-like performance with < 1 µA leakage at 25 °C
- Optimised for 4.5 V gate drive
- Low parasitic inductance and resistance
- High reliability clip bonded and solder die attach Power SO8 package; no glue, no wire bonds, qualified to 175 °C
- Wave solderable; exposed leads for optimal visual solder inspection
## **3. Applications**
- On-board DC-to-DC solutions for server and telecommunications
- Secondary-side synchronous rectification in telecommunication applications
- Voltage regulator modules (VRM)
- Point-of-Load (POL) modules
- Power delivery for V-core, ASIC, DDR, GPU, VGA and system components
- Brushed and brushless motor control
## **4. Quick reference data**
|**Symbol**<br>~~a~~|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|VDS<br>~~a~~<br>~~es~~|drain-source voltage<br>~~es~~|25 °C ≤ Tj≤ 175 °C||-|-|30|V|
|ID<br>~~es~~<br>~~es~~|drain current<br>~~es~~|Tmb= 25 °C; VGS= 10 V; Fig. 2||-|-|66|A|
|Ptot<br>~~es ~~<br>~~es~~|total power dissipation<br> ~~es~~|Tmb= 25 °C;Fig. 1||-|-|47|W|
**Nexperia**
**PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|Tj|junction temperature|||-55|-|175|°C|
|**Static characteristics**||||||||
|RDSon|drain-source on-state<br>resistance|VGS= 4.5 V; ID= 15 A; Tj= 25 °C;<br>Fig. 10||-|6.7|8.35|mΩ|
|||VGS= 10 V; ID= 15 A; Tj= 25 °C;<br>Fig. 10||-|5|6|mΩ|
|**Dynamic characteristics**||||||||
|QGD|gate-drain charge|VGS= 4.5 V; ID= 15 A; VDS= 15 V;<br>Fig. 12<br>; Fig. 13||-|1.8|-|nC|
|QG(tot)|total gate charge|VGS= 4.5 V; ID= 15 A; VDS= 15 V;<br>Fig. 12<br>; Fig. 13||-|6.5|-|nC|
|**Source-drain diode**||||||||
|S|softness factor|IS= 15 A; VGS= 0 V; dIS/dt = -100 A/µs;<br>VDS= 15 V;Fig. 16||-|1.2|-||
## **5. Pinning information**
## **Table 2. Pinning information**
|**Pin**|**Symbol**|**Description**|**Simplified outline**|**Graphic symbol**|
|---|---|---|---|---|
|1|S|source|mb<br>1<br>2<br>3<br>4<br>**LFPAK56; Power-**<br>**SO8 (SOT669)**|S<br>D<br>G<br>_mbb076_|
|2|S|source|||
|3|S|source|||
|4|G|gate|||
|mb|D|mounting base; connected to<br>drain|||
## **6. Ordering information**
## **Table 3. Ordering information**
|**Type number**|**Package**|**Package**|**Package**|
|---|---|---|---|
||**Name**|**Description**|**Version**|
|PSMN6R0-30YLD|LFPAK56;<br>Power-SO8|Plastic single-ended surface-mounted package (LFPAK56;<br>Power-SO8); 4 leads|SOT669|
## **7. Marking**
**Table 4. Marking codes**
|**Type number**|**Marking code**|
|---|---|
|PSMN6R0-30YLD|6D030L|
|©Nexperia B.V. 2017. All rights reserved<br>PSMN6R0-30YLD<br>All informationprovided in this document is subject to legal disclaimers.||
|<br>**Product data sheet**<br>**10 February 2014**<br>**2 / 13**||
**10 February 2014**
**Nexperia**
**PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
## **8. Limiting values**
**Table 5. Limiting values**
_In accordance with the Absolute Maximum Rating System (IEC 60134)._
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|VDS|drain-source voltage|25 °C ≤ Tj≤ 175 °C||-|30|V|
|VDGR|drain-gate voltage|25 °C ≤ Tj≤ 175 °C; RGS= 20 kΩ||-|30|V|
|VGS|gate-source voltage|||-20|20|V|
|Ptot|total power dissipation|Tmb= 25 °C; Fig. 1||-|47|W|
|ID|drain current|VGS= 10 V; Tmb= 25 °C; Fig. 2||-|66|A|
|||VGS= 10 V; Tmb= 100 °C; Fig. 2||-|46|A|
|IDM|peak drain current|pulsed; tp≤ 10 µs; Tmb= 25 °C; Fig. 3||-|263|A|
|Tstg|storage temperature|||-55|175|°C|
|Tj|junction temperature|||-55|175|°C|
|Tsld(M)|peak soldering temperature|||-|260|°C|
|VESD|electrostatic discharge voltage|HBM||250|-|V|
|**Source-drain diode**|||||||
|IS|source current|Tmb= 25 °C||-|39|A|
|ISM|peak source current|pulsed; tp≤ 10 µs; Tmb= 25 °C||-|263|A|
|**Avalanche ruggedness**|||||||
|EDS(AL)S|non-repetitive drain-source<br>avalanche energy|VGS= 10 V; Tj(init)= 25 °C; ID= 15 A;<br>Vsup≤ 30 V; RGS= 50 Ω; unclamped;<br>tp= 158 µs|[1]|-|46|mJ|
[1] Protected by 100% test
PSMN6R0-30YLD
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**Product data sheet**
**3 / 13**
**Nexperia**
**PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
**==> picture [462 x 218] intentionally omitted <==**
**----- Start of picture text -----**<br>
03na19 003aal095<br>120 80<br>ID<br>(A)<br>Pder<br>(%)<br>60<br>80 C N} ESE<br>><br>40<br>TING TNE<br>\ ERAN<br>40 SEEANEEE SEEERNEE<br>20<br>TTT INET | ty te KR<br>0 0<br>0 50 100 150 200 0 25 50 75 100 125 150 175 200<br>Tmb (°C) Tj (°C)<br>Fig. 1. Normalized total power dissipation as a Fig. 2. Continuous drain current as a function of<br>function of mounting base temperature mounting base temperature<br>**----- End of picture text -----**<br>
**==> picture [440 x 185] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aal097<br>10 [3]<br>ID<br>(A) ee eee<br>es a a Limit RDSon = VDS / ID<br>10 [2]<br>fe oe ces ss<br>tp = 10 us<br>10 Seei 100 us<br>DC<br>a a<br>1 ms<br>1 SSSR 10 ms<br>aaaaa Cn 100 ms<br>10 [-1] eeeeeeee<br>10 [-1] 1 10 10 [2]<br>VDS (V)<br>**----- End of picture text -----**<br>
**Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage**
## **9. Thermal characteristics**
## **Table 6. Thermal characteristics**
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|Rth(j-mb)|thermal resistance<br>from junction to<br>mounting base|Fig. 4|-|-|3|3.22|K/W|
PSMN6R0-30YLD
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved
**Product data sheet**
**10 February 2014**
**4 / 13**
**Nexperia**
**PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
**==> picture [497 x 476] intentionally omitted <==**
**----- Start of picture text -----**<br>
Symbol Parameter Conditions Min Typ Max Unit<br>Rth(j-a) thermal resistance Fig. 5 - 50 - K/W<br>from junction to Fig. 6 - 125 - K/W<br>ambient<br>003aal098<br>10<br>Zth(j-mb)<br>(K/W)<br>δ = 0.5<br>1<br>0.2<br>0.1<br>0.05<br>10 [-1] 0.02 single shot P δ = t T p<br>tp t<br>T<br>10 [-2]<br>10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1<br>tp (s)<br>Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration<br>aaa-005750 aaa-005751<br>Fig. 5. PCB layout for thermal resistance junction to Fig. 6. PCB layout for thermal resistance junction to<br>ambient 1” square pad; FR4 Board; 2oz copper ambient minimum footprint; FR4 Board; 2oz<br>copper<br>**----- End of picture text -----**<br>
## **10. Characteristics**
## **Table 7. Characteristics**
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**Static characteristics**||||||||
|V(BR)DSS|drain-source<br>breakdown voltage|ID= 250 µA; VGS= 0 V; Tj= 25 °C||30|-|-|V|
|||ID= 250 µA; VGS= 0 V; Tj= -55 °C||27|-|-|V|
|VGS(th)|gate-source threshold<br>voltage|ID= 1 mA; VDS= VGS; Tj= 25 °C||1.2|1.83|2.2|V|
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PSMN6R0-30YLD
© Nexperia B.V. 2017. All rights reserved **5 / 13**
**Product data sheet**
**10 February 2014**
**Nexperia**
**PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|ΔVGS(th)/ΔT|gate-source threshold<br>voltage variation with<br>temperature|25 °C ≤ Tj≤ 150 °C||-|-4|-|mV/K|
|IDSS|drain leakage current|VDS= 24 V; VGS= 0 V; Tj= 25 °C||-|-|1|µA|
|||VDS= 24 V; VGS= 0 V; Tj= 150 °C||-|-|100|µA|
|IGSS|gate leakage current|VGS= 16 V; VDS= 0 V; Tj= 25 °C||-|-|100|nA|
|||VGS= -16 V; VDS= 0 V; Tj= 25 °C||-|-|100|nA|
|RDSon|drain-source on-state<br>resistance|VGS= 4.5 V; ID= 15 A; Tj= 25 °C;<br>Fig. 10||-|6.7|8.35|mΩ|
|||VGS= 4.5 V; ID= 15 A; Tj= 150 °C;<br>Fig. 11<br>; Fig. 10||-|-|13.8|mΩ|
|||VGS= 10 V; ID= 15 A; Tj= 25 °C;<br>Fig. 10||-|5|6|mΩ|
|||VGS= 10 V; ID= 15 A; Tj= 150 °C;<br>Fig. 11<br>; Fig. 10||-|-|9.9|mΩ|
|RG|gate resistance|f = 1 MHz||-|2.36|-|Ω|
|**Dynamic characteristics**||||||||
|QG(tot)|total gate charge|ID= 15 A; VDS= 15 V; VGS= 10 V;<br>Fig. 12<br>; Fig. 13||-|13.7|-|nC|
|||ID= 15 A; VDS= 15 V; VGS= 4.5 V;<br>Fig. 12<br>; Fig. 13||-|6.5|-|nC|
|||ID= 0 A; VDS= 0 V; VGS= 10 V||-|12.2|-|nC|
|QGS|gate-source charge|ID= 15 A; VDS= 15 V; VGS= 4.5 V;<br>Fig. 12<br>; Fig. 13||-|1.7|-|nC|
|QGS(th)|pre-threshold gate-<br>source charge|||-|1.2|-|nC|
|QGS(th-pl)|post-threshold gate-<br>source charge|||-|0.5|-|nC|
|QGD|gate-drain charge|||-|1.8|-|nC|
|VGS(pl)|gate-source plateau<br>voltage|ID= 15 A; VDS= 15 V; Fig. 12<br>;Fig. 13||-|2.2|-|V|
|Ciss|input capacitance|VDS= 15 V; VGS= 0 V; f = 1 MHz;<br>Tj= 25 °C; Fig. 14||-|832|-|pF|
|Coss|output capacitance|||-|587|-|pF|
|Crss|reverse transfer<br>capacitance|||-|64|-|pF|
|td(on)|turn-on delay time|VDS= 15 V; RL= 1 Ω; VGS= 4.5 V;<br>RG(ext)= 5 Ω||-|9|-|ns|
|tr|rise time|||-|16.2|-|ns|
|td(off)|turn-off delay time|||-|10.5|-|ns|
|tf|fall time|||-|10.9|-|ns|
All information provided in this document is subject to legal disclaimers.
PSMN6R0-30YLD
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**Product data sheet**
**10 February 2014**
**6 / 13**
**Nexperia**
**PSMN6R0-30YLD**
**NextPowerS3 Technology**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using**
|**Symbol**<br>~~a~~|**Parameter**<br>~~a~~|**Conditions**<br>~~a~~|~~a~~|**Min**<br>~~a~~|**Typ**<br>~~a~~|**Max**<br>~~a~~|**Unit**<br>~~a~~|
|---|---|---|---|---|---|---|---|
|Qoss<br>~~a~~|output charge<br>~~a~~|VGS= 0 V; VDS= 15 V; f = 1 MHz;<br>Tj= 25 °C<br>~~a~~|~~a~~|-<br>~~a~~|11.5<br>~~a~~|-<br>~~a~~|nC<br>~~a~~|
|**Source-drain diode**<br>~~a~~<br>~~Ee~~||||||||
|VSD<br>~~Ee~~<br>~~a~~<br>~~ee~~|source-drain voltage<br>~~Ee~~|IS= 10 A; VGS= 0 V; Tj= 25 °C; Fig. 15<br>~~Ee~~<br>~~|~~|~~Ee~~<br>~~||~~|-<br>~~Ee~~<br>~~|~~|0.81<br>~~Ee~~<br>~~|~~|1.2<br>~~Ee~~<br>~~|~~|V<br>~~Ee~~|
|trr<br>~~a~~<br>~~ee~~|reverse recovery time|IS= 15 A; dIS/dt = -100 A/µs; VGS= 0 V;<br>VDS= 15 V;Fig. 16<br>~~|~~|~~||~~|-<br>~~|~~|23.4<br>~~|~~|-<br>~~|~~|ns|
|Qr<br>~~ee~~<br>~~|~~|recovered charge<br>~~|~~||[1]<br>~~| |~~<br>~~ooo~~|-<br>~~|~~<br>~~ooo~~|12.6<br>~~|~~<br>~~ooo~~|-<br>~~|~~<br>~~ooo~~|nC<br>~~ooo~~|
|ta<br>~~|~~|reverse recovery rise<br>time<br>~~|~~||~~ooo~~|-<br>~~ooo~~|10.6<br>~~ooo~~|-<br>~~ooo~~|ns<br>~~ooo~~|
|tb<br>~~|~~<br>~~ee~~|reverse recovery fall<br>time<br>~~|~~<br>~~eee~~||~~ooo~~<br>~~|~~|-<br>~~ooo~~<br>~~|~~|12.8<br>~~ooo~~<br>~~|~~|-<br>~~ooo~~|ns<br>~~ooo~~|
|S<br>~~ee~~|softness factor<br>~~eee~~||~~|~~|-<br>~~|~~|1.2<br>~~|~~|-||
[1] includes capacitive recovery
**==> picture [483 x 217] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aal099 003aal100<br>60 30<br>10 V 4.5 V<br>ID RDSon<br>(A) 3.5 V<br>25<br>48<br>—f ft eo<br>20<br>36 a<br>15<br>24 A EER<br>VGS = 3 V 10<br>12<br>2.8 V 5<br>foe pot | Et<br>2.6 V<br>0 — 0 REESerre<br>0 0.25 0.5 0.75 1 0 2 4 6 8 10 12 14 16<br>VDS (V) VGS (V)<br>Fig. 7. Output characteristics; drain current as a Fig. 8. Drain-source on-state resistance as a function<br>function of drain-source voltage; typical values of gate-source voltage; typical values<br>**----- End of picture text -----**<br>
PSMN6R0-30YLD
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**Product data sheet**
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**PSMN6R0-30YLD**
## **N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
**==> picture [439 x 435] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aal102 003aal105<br>60 50<br>ID RDSon 3 V<br>P| | | ft |<br>(A)<br>50<br>SSfp 40 EEEPOPE ELL<br>40 ee) 3.5 V<br>30<br>a Fi [Viti}]<br>30<br>EEE RRS 20 Sediy<br>20 yt ATT TT<br>{1 [tt] |<br>10 4.5 V<br>10<br>°<br>SEPP 150 C et<br>T j = 25°C 10 V<br>0 SE A/| = 0 PPPSS|<br>0 0.5 1 1.5 2 2.5 3 3.5 4 0 12 24 36 48 60<br>VGS (V) ID (A)<br>Transfer characteristics; drain current as a Fig. 10. Drain-source on-state resistance as a function<br>function of gate-source voltage; typical values of drain current; typical values<br>003aal037<br>2<br>a VDS<br>TTTTITTIyy —<br>1.6 10 V ID<br>oe i\<br>PPP Pre VGS(pl) San<br>1.2<br>ee a tee<br>VGS(th)<br>er<br>VGS = 4.5 V<br>0.8 Pert yy VGS<br>QGS1 QGS2<br>FT TTT J<br>0.4 PPT frrerry yy QGS QG D<br>QG(tot)<br>ne<br>0 PPrrtrrrey 003aaa508<br>-60 -30 0 30 60 90 120 150 180 Fig. 12. Gate charge waveform definitions<br>Tj (°C)<br>**----- End of picture text -----**<br>
**Fig. 9. Transfer characteristics; drain current as a function of gate-source voltage; typical values**
**Fig. 10. Drain-source on-state resistance as a function of drain current; typical values**
**Fig. 11. Normalized drain-source on-state resistance factor as a function of junction temperature**
PSMN6R0-30YLD **Product data sheet**
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**8 / 13**
**Nexperia**
**PSMN6R0-30YLD**
## **N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
**==> picture [466 x 478] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aal107 003aal108<br>10 10 [4]<br>VGS C<br>(V) (pF)<br>8 WY, SS<br>10 [3]<br>Ciss<br>6<br>Coss<br>24 V<br>15 V<br>4 aA, | EEE<br>V DS = 6 V 10 [2]<br>Crss<br>2 AT‘7 | | | | | ISTreciteETT<br>0 10 CI CEE CUT<br>0 2.5 5 7.5 10 12.5 15 10 [-1] 1 10 10 [2]<br>QG (nC) VDS (V)<br>Fig. 13. Gate-source voltage as a function of gate Fig. 14. Input, output and reverse transfer capacitances<br>charge; typical values as a function of drain-source voltage; typical<br>values<br>T; =25°C, Ip=154<br>Veg=0V; f =1MHA=<br>003aal109 003aal160<br>10 [2]<br>IS ID<br>(A) (A)<br>ee ee ee ee A ee<br>10 trr<br>ta tb<br>ffop fe 0 A —p—— _—],<br>ee ee ee ee ee ee<br>1<br>0.25 IRM<br>ee 150°C ee) ee ee IRM<br>Tj = 25°C<br>10 [-1] opa a e ava<br>0 0.2 0.4 0.6 0.8 1 1.2 t (s)<br>VSD (V)<br>Fig. 16. Reverse recovery timing definition<br>Fig. 15. Source current as a function of source-drain<br>voltage; typical values<br>**----- End of picture text -----**<br>
**Fig. 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values**
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**Product data sheet**
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**PSMN6R0-30YLD**
## **N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
## **11. Package outline**
**Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads**
**==> picture [31 x 7] intentionally omitted <==**
**----- Start of picture text -----**<br>
SOT669<br>**----- End of picture text -----**<br>
**==> picture [481 x 565] intentionally omitted <==**
**----- Start of picture text -----**<br>
E A A2 C<br>b2 c2 E1<br>L1 b3<br>mountingbase b4<br>D1<br>H D<br>L2<br>1 2 3 4<br>X<br>e b w A c<br>1/2 e<br>A (A3)<br>A1 C<br>q<br>L<br>detail X<br>y C<br>0 5 mm θ<br>scale 8 [°]<br>0 [°]<br>Dimensions (mm are the original dimensions)<br>Unit [(1)] A A1 A2 A3 b b2 b3 b4 c c2 D [(1)] D1 [(1)] E [(1)] E1 [(1)] e H L L1 L2 w y<br>max 1.20 0.15 1.10 0.50 4.41 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3 6.2 0.85 1.3 1.3<br>mm nom 0.25 1.27 0.25 0.1<br>min 1.01 0.00 0.95 0.35 3.62 2.0 0.7 0.19 0.24 3.80 4.8 3.1 5.8 0.40 0.8 0.8<br>Note<br>1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. sot669_po<br>Outline References European Issue date<br>version IEC JEDEC JEITA projection<br>11-03-25<br>SOT669 MO-235<br>13-02-27<br>**----- End of picture text -----**<br>
## **Fig. 17. Package outline LFPAK56; Power-SO8 (SOT669)**
PSMN6R0-30YLD All information provided in this document is subject to legal disclaimers. **Product data sheet**
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**10 February 2014**
**10 / 13**
**Nexperia**
**PSMN6R0-30YLD**
## **N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
## **12. Legal information**
## **12.1 Data sheet status**
|**Document**<br>**status [1]**<br>**[2]**|**Product**<br>**status[3]**|**Definition**|
|---|---|---|
|Objective<br>[short] data<br>sheet|Development|This document contains data from<br>the objective specification for product<br>development.|
|Preliminary<br>[short] data<br>sheet|Qualification|This document contains data from the<br>preliminary specification.|
|Product<br>[short] data<br>sheet|Production|This document contains the product<br>specification.|
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
## **12.2 Definitions**
**Preview** — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Draft** — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Short data sheet** — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
**Product specification** — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet.
## **12.3 Disclaimers**
**Limited warranty and liability** — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of Nexperia.
**Right to make changes** — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
**Suitability for use** — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
**Quick reference data** — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
**Applications** — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect.
**Limiting values** — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
**Terms and conditions of commercial sale** — Nexperia
products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer.
**No offer to sell or license** — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the
PSMN6R0-30YLD All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved
**Product data sheet**
**10 February 2014**
**11 / 13**
**Nexperia**
**PSMN6R0-30YLD**
## **N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
**Export control** — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
**Non-automotive qualified products** — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of nonautomotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications.
**Translations** — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
## **12.4 Trademarks**
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
PSMN6R0-30YLD
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved
**Product data sheet**
**10 February 2014**
**12 / 13**
**Nexperia**
**PSMN6R0-30YLD**
**N-channel 30 V, 6.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology**
## **13. Contents**
|**13. **|**Contents**|
|---|---|
|**1**|**General description ............................................... 1**|
|**2**|**Features and benefits ............................................1**|
|**3**|**Applications ........................................................... 1**|
|**4**|**Quick reference data ............................................. 1**|
|**5**|**Pinning information ...............................................2**|
|**6**|**Ordering information .............................................2**|
|**7**|**Marking ...................................................................2**|
|**8**|**Limiting values .......................................................3**|
|**9**|**Thermal characteristics .........................................4**|
|**10**|**Characteristics .......................................................5**|
|**11**|**Package outline ................................................... 10**|
|**12**|**Legal information .................................................11**|
|12.1|Data sheet status ............................................... 11|
|12.2|Definitions ...........................................................11|
|12.3|Disclaimers .........................................................11|
|12.4|Trademarks ........................................................ 12|
## © **Nexperia B.V. 2017. All rights reserved**
For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com **Date of release: 10 February 2014**
PSMN6R0-30YLD
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved
**Product data sheet**
**10 February 2014**
**13 / 13**
Updated at April 24, 2026
Nexperia is a dedicated global leader in discretes, logic, and MOSFET devices. Built on over half a century of semiconductor expertise and operating independently since 2017, the company produces consistently reliable components at an exceptional volume of 85 billion units annually. With its own manufacturing facilities, Nexperia delivers industry-leading small packages that combine power and thermal efficiency with best-in-class quality, meeting the rigorous standards of the automotive sector. Our extensive Nexperia portfolio is heavily focused on discrete semiconductors, providing engineers with a robust selection of core building blocks. This includes a comprehensive range of diodes and rectifiers, featuring a vast selection of Zener single diodes and Schottky diodes designed for precise voltage regulation and efficient power routing. Additionally, we offer an expansive array of bipolar transistors and single MOSFETs tailored for reliable switching and amplification in demanding applications. Beyond these primary offerings, the lineup extends into specialized circuit protection and passive components. This includes transient voltage suppressor (TVS) diodes, Zener array diodes, and small signal diodes, alongside dual MOSFETs and fast recovery rectifiers. For comprehensive design needs, the selection also encompasses integrated passive filters, common mode chokes, and precision timers and oscillators, ensuring a complete solution for high-performance electronic systems.
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