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PSMN2R8-40PS,127
Power MOSFET, N Channel, 40 V, 100 A, 2800 µohm, TO-220, Through Hole
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- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:100A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0028ohm; Rds(on) ; Available until stocks are exhausted Alternative available
- MSL: -
- SVHC: No SVHC (23-Jan-2024)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 211W
- Transistor Mounting: Through Hole
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-220
- Drain Source Voltage Vds: 40V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 100A
- Drain Source On State Resistance: 2800µohm
- Gate Source Threshold Voltage Max: 3V
| Delivery and price | |
|---|---|
| Units per pack | 10 |
| Price | 4.86 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
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TO-220AB<br>**----- End of picture text -----**<br>
## **PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET 11 February 2013**
**Product data sheet**
## **1. General description**
Standard level N-channel MOSFET in TO220 package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.
## **2. Features and benefits**
- High efficiency due to low switching and conduction losses
- Suitable for standard level gate drive sources
## **3. Applications**
- DC-to-DC converters
- Load switching
- Motor control
- Server power supplies
## **4. Quick reference data**
|**Symbol**<br>**Parameter**<br>~~es es~~<br>~~a~~|**Parameter**<br>~~es~~<br>~~es~~|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|VDS<br>drain-source voltage<br>~~es es~~<br>~~a~~<br>~~es~~|drain-source voltage<br>~~es~~<br>~~es~~<br>~~es e~~|Tj≥ 25 °C; Tj≤ 175 °C<br>~~ee~~||-<br>~~ee~~|-<br>~~ee~~|40|V|
|ID<br>drain current<br>~~a~~<br>~~es~~<br>~~es~~|drain current<br>~~es~~<br>~~es e~~<br>~~es~~|Tmb= 25 °C; VGS= 10 V;Fig. 1<br>~~ee~~<br>~~rs~~|[1]|-<br>~~ee~~|-<br>~~ee~~|100|A|
|Ptot<br>total power dissipation<br>~~es ~~<br>~~es~~|total power dissipation<br> ~~es e~~<br>~~es~~|Tmb= 25 °C;Fig. 2<br>~~ee~~<br>~~rs~~||-<br>~~ee~~|-<br>~~ee~~|211|W|
|Tj<br>junction temperature<br>~~es~~<br>~~es~~|junction temperature<br>~~es~~<br>~~es~~|~~rs~~<br>~~es~~|~~es~~|-55<br>~~es~~|-<br>~~es~~|175<br>~~es~~|°C<br>~~es~~|
|**Static characteristics**<br>~~|~~<br>~~pe~~<br>~~—~~||||||||
|RDSon<br>drain-source on-state<br>resistance<br>~~|~~<br>~~pe~~<br>~~Re~~|drain-source on-state<br>resistance<br>~~|~~<br>~~—~~<br>|VGS= 10 V; ID= 10 A; Tj= 100 °C;<br>Fig. 12<br>; Fig. 13<br>~~|~~<br>~~—~~|~~|~~<br>|-<br>~~|~~<br>|-<br>~~|~~<br>|4.5<br>~~|~~<br>|mΩ<br>~~|~~<br>|
|||VGS= 10 V; ID= 10 A; Tj= 25 °C;<br>Fig. 13<br>~~—FE~~|[2]<br>~~FE~~|-<br>~~FE~~|2.3<br>~~FE~~|2.8<br>~~FE~~|mΩ<br>~~FE~~|
|**Dynamic characteristics**<br>~~pe~~<br>~~—FE~~<br>~~Re~~~~**e**e~~||||||||
|QGD<br>gate-drain charge<br>~~Re~~~~**e**e~~|gate-drain charge<br><br>|VGS= 10 V; ID= 25 A; VDS= 20 V;<br>Fig. 14<br>; Fig. 15<br>~~FE~~|~~FE~~|-<br>~~FE~~|17<br>~~FE~~|-<br>~~FE~~|nC<br>~~FE~~|
|QG(tot)<br>total gate charge<br>~~**e**e ~~|total gate charge<br> ~~f~~||~~ee~~|-<br>~~ee~~|71<br>~~ee~~|-<br>~~ee~~|nC<br>~~ee~~|
Scan or click this QR code to view the latest information for this product
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**Avalanche ruggedness**||||||||
|EDS(AL)S|non-repetitive drain-<br>source avalanche<br>energy|VGS= 10 V; Tj(init)= 25 °C; ID= 100 A;<br>Vsup≤ 40 V; unclamped; RGS= 50 Ω||-|-|407|mJ|
[1] Continuous current rating is limited by package. [2] Measured 3 mm from package.
## **5. Pinning information**
**Table 2. Pinning information**
|**Pin**|**Symbol**|**Description**|**Simplified outline**|**Graphic symbol**|
|---|---|---|---|---|
|1|G|gate|1<br>2<br>mb<br>3<br>**TO-220AB (SOT78)**|S<br>D<br>G<br>_mbb076_|
|2|D|drain|||
|3|S|source|||
|mb|D|mounting base; connected to<br>drain|||
## **6. Ordering information**
## **Table 3. Ordering information**
|**Type number**|**Package**|||
|---|---|---|---|
||**Name**|**Description**|**Version**|
|PSMN2R8-40PS|TO-220AB|plastic single-ended package; heatsink mounted; 1 mounting<br>hole; 3-lead TO-220AB|SOT78|
## **7. Marking**
**Table 4. Marking codes**
|**Type number**<br>|**Marking code**|
|---|---|
|PSMN2R8-40PS|PSMN2R8-40PS|
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**2 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
## **8. Limiting values**
**Table 5. Limiting values**
_In accordance with the Absolute Maximum Rating System (IEC 60134)._
|**Symbol**<br>~~ee~~<br>~~ee~~|**Parameter**<br>~~rn ee~~<br>~~ey~~|**Conditions**<br>~~ee~~<br>~~er~~|~~Ot~~|**Min**<br>~~ts~~|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|VDS<br>~~ee~~<br>~~ee~~<br>~~ee~~|drain-source voltage<br>~~rn ee~~<br>~~ey~~<br>~~es~~|Tj≥ 25 °C; Tj≤ 175 °C<br>~~ee~~<br>~~er~~<br>~~er~~|~~Ot~~<br>~~Ot~~|-<br>~~ts~~|40|V|
|VDGR<br>~~ee~~<br>~~ee~~<br>~~ee~~|drain-gate voltage<br>~~ey~~<br>~~es~~<br>~~es~~|Tj≥ 25 °C; Tj≤ 175 °C; RGS= 20 kΩ<br>~~er~~<br>~~er~~<br>~~ee e~~|~~Ot ~~<br>~~Ot~~<br>~~e~~|-<br> ~~ts~~<br>~~eee~~|40<br>~~ee~~|V<br>~~ee~~|
|VGS<br>~~ee~~<br>~~ee~~|gate-source voltage<br>~~es~~<br>~~es~~|~~er~~<br>~~ee e~~|~~Ot~~<br>~~e~~|-20<br>~~eee~~|20<br>~~ee~~|V<br>~~ee~~|
|ID<br>~~ee~~<br>~~es~~|drain current<br>~~es~~<br>|VGS= 10 V; Tmb= 100 °C;Fig. 1<br>~~ee e~~<br>~~ee~~<br>|[1]<br>~~e~~<br>|-<br>~~eee~~<br>~~eee~~<br>|100<br>~~ee~~<br>~~eee~~<br>|A<br>~~ee~~<br>~~eee~~<br>|
|||VGS= 10 V; Tmb= 25 °C; Fig. 1<br>~~ee e~~<br>~~ee~~<br>|[1]<br>~~e~~<br>|-<br>~~eee~~<br>~~eee~~<br>|100<br>~~ee~~<br>~~eee~~<br>|A<br>~~ee~~<br>~~eee~~<br>|
|IDM<br>~~es~~<br>~~ee~~<br>~~ee~~|peak drain current<br>~~nn~~<br>~~re~~|pulsed; tp≤ 10 µs; Tmb= 25 °C; Fig. 3<br>~~ee~~<br>~~nn~~<br>~~rs~~|~~nn~~<br>~~ee~~|-<br>~~eee~~<br>~~nn~~<br>~~ee~~|797<br>~~eee~~<br>~~nn~~|A<br>~~eee~~<br>~~nn~~|
|Ptot<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|total power dissipation<br>~~nn~~<br>~~re~~<br>~~es~~<br>|Tmb= 25 °C; Fig. 2<br>~~ee~~<br>~~nn~~<br>~~rs~~<br>~~ts~~|~~nn~~<br>~~ee~~<br>~~ts~~|-<br>~~eee~~<br>~~nn~~<br>~~ee~~|211<br>~~eee~~<br>~~nn~~|W<br>~~eee~~<br>~~nn~~|
|Tstg<br><br>~~ee~~<br>~~ee~~<br>~~ee es~~<br>~~RC~~|storage temperature<br>~~nn~~<br>~~re~~<br>~~es~~<br>~~es~~|~~nn~~<br>~~rs~~<br>~~ts~~|~~nn~~<br>~~ee~~<br>~~ts~~|-55<br>~~nn~~<br>~~ee~~|175<br>~~nn~~|°C<br>~~nn~~|
|Tj<br>~~ee~~<br>~~ee es~~<br>~~RC~~|junction temperature<br>~~re ~~<br>~~es~~<br>~~es~~|~~rs ~~<br>~~ts~~|~~ee~~<br>~~ts~~|-55<br>~~ee~~|175|°C|
|**Source-drain diode**<br>~~es~~<br>~~ts~~<br>~~ee es~~<br>~~RCee~~<br>~~es~~<br>~~erttts~~|||||||
|IS<br>~~es~~<br>~~RCee~~<br>~~ee~~|source current<br>~~es~~<br>~~es~~<br>~~rs~~|Tmb= 25 °C<br>~~er~~|~~tt~~|-<br>~~ts~~|100|A|
|ISM<br>~~ee~~<br>~~ee~~|peak source current<br>~~es~~<br>~~rs~~|pulsed; tp≤ 10 µs; Tmb= 25 °C<br>~~er ~~|~~tt ~~|-<br> ~~ts~~|797|A|
|**Avalanche ruggedness**<br>~~ee~~<br>~~rs~~<br>~~Rs~~|||||||
|EDS(AL)S<br>~~Rs~~|non-repetitive drain-source<br>avalanche energy<br>~~Rs~~|VGS= 10 V; Tj(init)= 25 °C; ID= 100 A;<br>Vsup≤ 40 V; unclamped; RGS= 50 Ω<br>~~Rs~~|~~Rs~~|-<br>~~Rs~~|407<br>~~Rs~~|mJ<br>~~Rs~~|
[1] Continuous current rating is limited by package.
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003aad361 03aa16<br>200 120<br>ID<br>PINE EEL Pder SER<br>(A)<br>(%)<br>150 Pt > IN XE LL |<br>. 80 C NET<br>aaeaNeee<br>(1)<br>100 CEES EI LINE EEL<br>Pt Tt L_IN | 40 YELN Ey]<br>50 FEE, \<br>Pt >t tt TAL ECCS\<br>0 CECE 0 EL EELEN_<br>0 50 100 150 200 0 50 100 150 200<br>Tmb (°C) Tmb (°C)<br>Fig. 1. Continuous drain current as a function of Fig. 2. Normalized total power dissipation as a<br>mounting base temperature function of mounting base temperature<br>**----- End of picture text -----**<br>
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© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
**Product data sheet**
**11 February 2013**
**3 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
## **N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
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**----- Start of picture text -----**<br>
003aad385<br>10 [3]<br>ID<br>(A) Limit R DSon = V DS / I D t p = 10 µs<br>ee es oS ee<br>10 [2] a<br>SSS ee SS (1) a Se 100 µs<br>aa a oe<br>NNEPNNIRO Rr<br>DC<br>10 SSS<br>SSEEF 1 ms<br>aSSSS<br>10 ms<br>1 SST 100 ms<br>—<br>a a CG<br>10 [-1] a ee 0 ee ee ee GO<br>10 [-1] 1 10 10 [2]<br>VDS (V)<br>Safe operating area; continuous and peak drain currents as a function of drain-source voltage<br>Tyg =25 °C; Ipy is a single pulse; (1) Capped at 100 A due to package<br>Thermal characteristics<br>Thermal characteristics<br>Parameter Conditions Min Typ Max<br>th(j-mb) thermal resistance Fig. 4 - 0.4 0.7<br>from junction to<br>mounting base<br>003aad247<br>1<br>Zth (j-mb)<br>(K/W) δ = 0.5<br>SO mee ea<br>10 [-1] 0.2<br>ON Tre TT<br>0.1<br>0.05 i ee mo2<br>10 [-2] 0.02<br>er<br>P δ = tp<br>a a | —| T<br>10 [-3] eT |<br>poPe single shot ITLL t p t [| LL<br>a “Led T I<br>10 [-4] ee ee |<br>10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10<br>tp (s)<br>**----- End of picture text -----**<br>
**Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage**
## **9. Thermal characteristics**
## **Table 6. Thermal characteristics**
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|Rth(j-mb)|thermal resistance<br>from junction to<br>mounting base|Fig. 4||-|0.4|0.7|K/W|
**Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration**
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**4 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
## **10. Characteristics**
**Table 7. Characteristics** _Tested to JEDEC standards where applicable._
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**Static characteristics**||||||||
|V(BR)DSS|drain-source<br>breakdown voltage|ID= 250 µA; VGS= 0 V; Tj= -55 °C||36|-|-|V|
|||ID= 250 µA; VGS= 0 V; Tj= 25 °C||40|-|-|V|
|VGS(th)|gate-source threshold<br>voltage|ID= 1 mA; VDS= VGS; Tj= -55 °C;<br>Fig. 10<br>; Fig. 11||-|-|4.6|V|
|||ID= 1 mA; VDS= VGS; Tj= 175 °C;<br>Fig. 10<br>; Fig. 11||1|-|-|V|
|||ID= 1 mA; VDS= VGS; Tj= 25 °C;<br>Fig. 10<br>; Fig. 11||2.3|3|4|V|
|IDSS|drain leakage current|VDS= 40 V; VGS= 0 V; Tj= 25 °C||-|0.3|10|µA|
|||VDS= 40 V; VGS= 0 V; Tj= 125 °C||-|-|150|µA|
|IGSS|gate leakage current|VGS= 20 V; VDS= 0 V; Tj= 25 °C||-|10|100|nA|
|||VGS= -20 V; VDS= 0 V; Tj= 25 °C||-|10|100|nA|
|RDSon|drain-source on-state<br>resistance|VGS= 10 V; ID= 10 A; Tj= 100 °C;<br>Fig. 12<br>; Fig. 13||-|-|4.5|mΩ|
|||VGS= 10 V; ID= 10 A; Tj= 175 °C;<br>Fig. 12<br>; Fig. 13||-|-|5.6|mΩ|
|||VGS= 10 V; ID= 10 A; Tj= 25 °C;<br>Fig. 13|[1]|-|2.3|2.8|mΩ|
|RG|internal gate<br>resistance (AC)|f = 1 MHz||-|0.7|-|Ω|
|**Dynamic characteristics**||||||||
|QG(tot)|total gate charge|ID= 0 A; VDS= 0 V; VGS= 10 V||-|61|-|nC|
|||ID= 25 A; VDS= 20 V; VGS= 10 V;<br>Fig. 14<br>; Fig. 15||-|71|-|nC|
|QGS|gate-source charge|||-|21|-|nC|
|QGS(th)|pre-threshold gate-<br>source charge|||-|13|-|nC|
|QGS(th-pl)|post-threshold gate-<br>source charge|||-|8.5|-|nC|
|QGD|gate-drain charge|||-|17|-|nC|
|VGS(pl)|gate-source plateau<br>voltage|ID= 25 A; VDS= 20 V;Fig. 14<br>; Fig. 15||-|4.7|-|V|
|Ciss|input capacitance|VDS= 20 V; VGS= 0 V; f = 1 MHz;<br>Tj= 25 °C; Fig. 16||-|4491|-|pF|
|Coss|output capacitance|||-|937|-|pF|
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS **Product data sheet**
**11 February 2013**
**5 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
**Symbol Parameter Conditions Min Typ Max Unit** Crss reverse transfer - 464 - pF capacitance ~~a~~ td(on) turn-on delay time VDS = 20 V; RL = 0.8 Ω; VGS = 10 V; - 28 - ns ~~PF Ff~~ tr rise time RG(ext) = 4.7 Ω - 29 - ns ~~ee fl fT~~ td(off) turn-off delay time - 52 - ns ~~ee~~ ~~**eee P** Fo~~ ~~**|** ||ft| ft~~ tf fall time - 23 - ns ~~PF Fffl fT~~ **Source-drain diode** ~~Re~~ VSD source-drain voltage IS = 10 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.85 1.2 V trr reverse recovery time IS = 40 A; dIS/dt = -100 A/µs; VGS = 0 V; - 47 - ns VDS = 20 V Qr recovered charge IS = 40 A; dIS/dt = -100 A/µs; VGS = 0 V; - 61 - nC VDS = 20 V; Tj = 25 °C
[1] Measured 3 mm from package.
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003aad431 003aad433<br>120 100<br>ID | | [| | | [| [| |] ID /<br>(A) 20<br>6.5 (A)<br>100 10 6 5.5 80<br>Hye 8 Ee<br>80 A AR ee<br>WAZ 60 eeee<br>60<br>Ws | | | tt F | | | | fd<br>5 40<br>40 7, eee a<br>eS | | T j = 175 °C Tite<br>20 [= 20 ei<br>VGS (V) = 4.5 T j = 25 °C<br>0 rPecesFFSOttTCSdrTCsdTSCid| AP 0 APP|| Ty<br>0 0.3 0.6 0.9 1.2 0 2 4 6<br>VDS (V) VGS (V)<br>Fig. 5. Output characteristics: drain current as a Fig. 6. Transfer characteristics: drain current as a<br>function of drain-source voltage; typical values function of gate-source voltage; typical values<br>**----- End of picture text -----**<br>
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**6 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
**==> picture [182 x 184] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aad437<br>7000<br>C C iss<br>(pF)<br>6000 |||EET<br>| [at | ft tt<br>5000 PtP| | | | tt fl<br>4000 Pt tf | tt Crss ff<br>P| |tke| EttLT<br>3000 tT<br>P {*{yi]| | |tttfft<br>2000 Ft | tt tt ft<br>0 3 6 9 12<br>VGS (V)<br>**----- End of picture text -----**<br>
**Fig. 7. Input and reverse transfer capacitances as a function of gate-source voltage; typical values**
**==> picture [184 x 184] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aad438<br>125<br>gfs<br>(S)<br>100 || || ||PrFTT| | Te<br>P| tt | ft fl<br>75 [A| | |] |<br>50 | i7i | | | tt<br>|PAL]f | | ft ft ft<br>25 | [| tt<br>‘/7 i [tt| [| ft [| ft |<br>0 Pit| tfi f tt |tf<br>0 25 50 75 100<br>ID (A)<br>**----- End of picture text -----**<br>
**Fig. 8. Forward transconductance as a function of drain current; typical values**
**==> picture [440 x 187] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aad439 003aae992<br>12 5<br>RDSon TLoLLLLLIL VGS(th)<br>(mΩ) (V)<br>10 TELE LEL LL 4 eee<br>max<br>8 TELE LL ——<br>3<br>TEE EEL ee typ<br>6<br>EEE min ee<br>2<br>4 ARE BBRE RRS<br>PSE SS<br>2 PSETor fh4 1 oasesP| ft | i tt fe~<br>0 se ee 0 PEELE ELL.<br>4 8 12 16 20 - 60 0 60 120 180<br>VGS (V) Tj (°C)<br>**----- End of picture text -----**<br>
**Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values**
**Fig. 10. Gate-source threshold voltage as a function of junction temperature**
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**7 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
**==> picture [189 x 444] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aak869<br>10 [- 1]<br>ID<br>(A)<br>min typ max<br>10 [- 2]<br>|<br>10 [- 3]<br>a a 1 ae|<br>10 [- 4]<br>—<br>10 [- 5]<br>nese<br>10 [- 6] — ff<br>0 2 4 6<br>VGS (V)<br>Sub-threshold drain current as a function of<br>gate-source voltage<br>Tj =25°C:V pp =5V<br>003aad432<br>10<br>RDSon VGS (V) = 5<br>PELE EL<br>(mΩ)<br>8<br>P| | Plt tt ft<br>Pi tA; TTT yt<br>5.5<br>6<br>fyi ttt tt te<br>p/Seeeeera<br>4 6.5 6<br>Seer<br>2 ===<br>20<br>Se 8 10<br>0 Pt |EttEL tt<br>0 20 40 60 80 100<br>ID (A)<br>**----- End of picture text -----**<br>
**Fig. 11. Sub-threshold drain current as a function of gate-source voltage**
**==> picture [184 x 185] intentionally omitted <==**
**----- Start of picture text -----**<br>
03aa27<br>2<br>a<br>1.5<br>1 TreZ|<br>p= Aan<br>0.5<br>0 CLE<br>- 60 0 60 120 180<br>Tj (°C)<br>**----- End of picture text -----**<br>
**Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature**
**==> picture [161 x 147] intentionally omitted <==**
**----- Start of picture text -----**<br>
VDS<br>ID<br>i!<br>VGS(pl) NY \<br>——fa *<br>VGS(th)<br>VGS<br>QGS1 QGS2 :<br>_ QGS QG D<br>QG(tot)<br>003aaa508<br>**----- End of picture text -----**<br>
**Fig. 14. Gate charge waveform definitions**
**Fig. 13. Drain-source on-state resistance as a function of drain current; typical values**
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**8 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
## **N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
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**----- Start of picture text -----**<br>
003aad435<br>10<br>VGS<br>(V) 8 V<br>8<br>32 V<br>6 hk<br>VDS = 20 V<br>4 aany/44nm<br>2 SAE<br>D4<br>0 ZOO<br>0 20 40 60 80<br>QG (nC)<br>**----- End of picture text -----**<br>
**Fig. 15. Gate-source voltage as a function of gate charge; typical values**
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**----- Start of picture text -----**<br>
003aad436<br>10 [4]<br>C<br>(pF) Ciss<br>CANIS<br>10 [3] ae Oa Coss<br>SCAN FETT<br>Crss<br>=<br>a<br>Ht<br>10 [2] TTT<br>10 [-1] 1 AT 10 TT 10 [2]<br>VDS (V)<br>**----- End of picture text -----**<br>
**Fig. 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values**
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**----- Start of picture text -----**<br>
003aad434<br>100<br>IS<br>(A) pt it | ty<br>80<br>pt ft | | fF<br>pi i | te fy<br>60<br>pt tt tt<br>pi i | TA at<br>40 See eine<br>20 Pp T j = 175 °C T j = 25 °C<br>0 oonpttaa<br>0 0.3 iA 0.6 0.9 | 1.2<br>VSD (V)<br>**----- End of picture text -----**<br>
**Fig. 17. Source current as a function of source-drain voltage; typical values**
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**9 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
## **11. Package outline**
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**----- Start of picture text -----**<br>
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78<br>E A<br>p A1<br>q mounting<br>D1 base<br>D<br>L1 [(1)] L2 [(1)]<br>Q<br>b1 [(2)]<br>L (3×)<br>b2 [(2)]<br>(2×)<br>1 2 3<br>b(3×) c<br>e e<br>0 5 10 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>UNIT A A1 b b1 [(2)] b2 [(2)] c D D1 E e L L1 [(1)] L2 [(1)] p q Q<br>max.<br>4.7 1.40 0.9 1.6 1.3 0.7 16.0 6.6 10.3 15.0 3.30 3.8 3.0 2.6<br>mm 2.54 3.0<br>4.1 1.25 0.6 1.0 1.0 0.4 15.2 5.9 9.7 12.8 2.79 3.5 2.7 2.2<br>Notes<br>1. Lead shoulder designs may vary.<br>2. Dimension includes excess dambar.<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC JEITA PROJECTION<br>08-04-23<br>SOT78 3-lead TO-220AB SC-46<br>08-06-13<br>**----- End of picture text -----**<br>
**Fig. 18. Package outline TO-220AB (SOT78)** PSMN2R8-40PS All information provided in this document is subject to legal disclaimers.
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**----- Start of picture text -----**<br>
© NXP B.V. 2013. All rights reserved<br>**----- End of picture text -----**<br>
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10 / 13<br>**----- End of picture text -----**<br>
**Product data sheet**
**11 February 2013**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
## **12. Legal information**
## **12.1 Data sheet status**
|**Document**<br>**status [1]**<br>**[2]**|**Product**<br>**status [3]**|**Definition**|
|---|---|---|
|Objective<br>[short] data<br>sheet|Development|This document contains data from<br>the objective specification for product<br>development.|
|Preliminary<br>[short] data<br>sheet|Qualification|This document contains data from the<br>preliminary specification.|
|Product<br>[short] data<br>sheet|Production|This document contains the product<br>specification.|
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
## **12.2 Definitions**
**Preview** — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Draft** — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Short data sheet** — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
**Product specification** — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
## **12.3 Disclaimers**
**Limited warranty and liability** — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of NXP Semiconductors.
**Right to make changes** — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
**Suitability for use** — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
**Quick reference data** — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
**Applications** — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
**Limiting values** — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
**Terms and conditions of commercial sale** — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
**No offer to sell or license** — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
**Product data sheet**
**11 February 2013**
**11 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
**Export control** — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
**Non-automotive qualified products** — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of nonautomotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
**Translations** — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
## **12.4 Trademarks**
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
**Adelante** , **Bitport** , **Bitsound** , **CoolFlux** , **CoReUse** , **DESFire** , **EZ-HV** , **FabKey** , **GreenChip** , **HiPerSmart** , **HITAG** , **I²C-bus** logo, **ICODE** , **I-CODE** , **ITEC** , **Labelution** , **MIFARE** , **MIFARE Plus** , **MIFARE Ultralight** , **MoReUse** , **QLPAK** , **Silicon Tuner** , **SiliconMAX** , **SmartXA** , **STARplug** , **TOPFET** , **TrenchMOS** , **TriMedia** and **UCODE** — are trademarks of NXP B.V.
**HD Radio** and **HD Radio** logo — are trademarks of iBiquity Digital Corporation.
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**12 / 13**
**NXP Semiconductors**
**PSMN2R8-40PS**
**N-channel TO220 40 V 2.8 mΩ standard level MOSFET**
## **13. Contents**
|**13. **|**Contents**|
|---|---|
|**1**|**General description ............................................... 1**|
|**2**|**Features and benefits ............................................1**|
|**3**|**Applications ........................................................... 1**|
|**4**|**Quick reference data ............................................. 1**|
|**5**|**Pinning information ...............................................2**|
|**6**|**Ordering information .............................................2**|
|**7**|**Marking ...................................................................2**|
|**8**|**Limiting values .......................................................3**|
|**9**|**Thermal characteristics .........................................4**|
|**10**|**Characteristics .......................................................5**|
|**11**|**Package outline ................................................... 10**|
|**12**|**Legal information .................................................11**|
|12.1|Data sheet status ............................................... 11|
|12.2|Definitions ...........................................................11|
|12.3|Disclaimers .........................................................11|
|12.4|Trademarks ........................................................ 12|
## **© NXP B.V. 2013. All rights reserved**
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com **Date of release: 11 February 2013**
© NXP B.V. 2013. All rights reserved
PSMN2R8-40PS
All information provided in this document is subject to legal disclaimers.
**Product data sheet**
**11 February 2013**
**13 / 13**
Updated at April 24, 2026
Nexperia is a dedicated global leader in discretes, logic, and MOSFET devices. Built on over half a century of semiconductor expertise and operating independently since 2017, the company produces consistently reliable components at an exceptional volume of 85 billion units annually. With its own manufacturing facilities, Nexperia delivers industry-leading small packages that combine power and thermal efficiency with best-in-class quality, meeting the rigorous standards of the automotive sector. Our extensive Nexperia portfolio is heavily focused on discrete semiconductors, providing engineers with a robust selection of core building blocks. This includes a comprehensive range of diodes and rectifiers, featuring a vast selection of Zener single diodes and Schottky diodes designed for precise voltage regulation and efficient power routing. Additionally, we offer an expansive array of bipolar transistors and single MOSFETs tailored for reliable switching and amplification in demanding applications. Beyond these primary offerings, the lineup extends into specialized circuit protection and passive components. This includes transient voltage suppressor (TVS) diodes, Zener array diodes, and small signal diodes, alongside dual MOSFETs and fast recovery rectifiers. For comprehensive design needs, the selection also encompasses integrated passive filters, common mode chokes, and precision timers and oscillators, ensuring a complete solution for high-performance electronic systems.
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