Image not available
Illustrative purposes only
PHT8N06LT
Power MOSFET, N Channel, 55 V, 7.5 A, 0.08 ohm, SOT-223, Surface Mount
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- No. of Pins: 3Pins
- Channel Type: N Channel
- Power Dissipation: 8.3W
- Transistor Mounting: Surface Mount
- Transistor Polarity: N Channel
- Power Dissipation Pd: 8.3W
- Rds(on) Test Voltage: 5V
- On Resistance Rds(on): 0.08ohm
- Transistor Case Style: SOT-223
- Drain Source Voltage Vds: 55V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 7.5A
- Drain Source On State Resistance: 0.08ohm
- Gate Source Threshold Voltage Max: 1.5V
| Delivery and price | |
|---|---|
| Units per pack | 20000 |
| Price | 0.151 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
**Philips Semiconductors** **Product specification** ## **TrenchMOS** **transistor Logic level FET** ## **PHT8N06LT** ## **GENERAL DESCRIPTION** ## **QUICK REFERENCE DATA** |N-channel enhancement mode logic<br>level field-effect power transistor in a<br>plastic envelope suitable for surface<br>mounting. The device features very<br>low on-state resistance and has<br>integral zener diodes giving ESD<br>protection. It is intended for use in<br>DC-DC<br>converters<br>and<br>general<br>purpose switching applications.<br>**PINNING - SOT223**<br>**PIN**<br>**DESCRIPTION**<br>1<br>gate<br>2<br>drain<br>3<br>source<br>4<br>drain (tab)|N-channel enhancement mode logic<br>level field-effect power transistor in a<br>plastic envelope suitable for surface<br>mounting. The device features very<br>low on-state resistance and has<br>integral zener diodes giving ESD<br>protection. It is intended for use in<br>DC-DC<br>converters<br>and<br>general<br>purpose switching applications.<br>**PINNING - SOT223**<br>**PIN**<br>**DESCRIPTION**<br>1<br>gate<br>2<br>drain<br>3<br>source<br>4<br>drain (tab)|**SYMBOL**|**SYMBOL**|**SYMBOL**|**SYMBOL**|**SYMBOL**|**PARAMETER**|**PARAMETER**|**PARAMETER**|**PARAMETER**|**MAX.**|**MAX.**| |---|---|---|---|---|---|---|---|---|---|---|---|---| |||VDS<br>ID<br>Ptot<br>Tj<br>RDS(ON)|||||Drain-source voltage<br>Drain current<br>Total power dissipation<br>Junction temperature<br>Drain-source on-state<br>resistance<br>VGS= 5 V||||55<br>7.5<br>1.8<br>150<br>80|V<br>A<br>W<br>˚C<br>mΩ| |||**PIN CONFIGURATION**||||||||**SYMBOL**||| |**PIN**<br>1<br>2<br>3<br>4||||||||||d||| ||gate<br>drain<br>source<br>drain (tab)|||||||||g<br>s||| |||||||||||||| |||||||||||||| |||||||**1**||||||| ## **LIMITING VALUES** Limiting values in accordance with the Absolute Maximum System (IEC 134) |||**SYMBOL**|**PARAMETER**|**PARAMETER**|**PARAMETER**|||**CONDITIONS**|**CONDITIONS**|**CONDITIONS**||||**MIN.**|**MIN.**||**MAX.**|**MAX.**|**MAX.**||**UNIT**|**UNIT**||||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |||VDS|Drain-source voltage|||||-||||||-|||55||||V|||||| |||VDGR|Drain-gate voltage|||||RGS= 20 kΩ||||||-|||55||||V|||||| |||±VGS|Gate-source voltage|||||-||||||-|||13||||V|||||| |||ID|Drain current (DC)|||||Tsp= 25 ˚C||||||-|||7.5||||A|||||| |||ID|Drain current (DC)|||||On PCB in Fig.2||||||-|||3.5||||A|||||| |||||||||Tamb= 25 ˚C||||||||||||||||||| |||ID|Drain current (DC)|||||On PCB in Fig.2||||||-|||2.2||||A|||||| |||||||||Tamb= 100 ˚C||||||||||||||||||| |||IDM|Drain current (pulse||||peak value)|Tsp= 25 ˚C||||||-|||40||||A|||||| |||Ptot|Total||power dissipation|||Tsp= 25 ˚C||||||-|||8.3||||W|||||| |||Ptot|Total||power dissipation|||On PCB in Fig.2||||||-|||1.8||||W|||||| |||||||||Tamb= 25 ˚C||||||||||||||||||| |||Tstg, Tj|Storage & operatingtemperature|||||-||||||- 55|||150||||˚C|||||| ## **ESD LIMITING VALUE** ||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**MIN.**<br>**MAX.**<br>**UNIT**<br>VC<br>Electrostatic discharge capacitor<br>Human body model<br>-<br>2<br>kV<br>voltage<br>(100pF, 1.5 kΩ)| |---|---| January 1998 Rev 1.100 1 Philips Semiconductors Product specification TrenchMOS transistor Logic level FET PHT8N06LT ## **THERMAL RESISTANCES** ||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>Rth j-sp<br>From junction to solder point<br>Mounted on any PCB<br>12<br>15<br>K/W<br>Rthj-amb<br>Fromjunction to ambient<br>Mounted on PCB of Fig.17<br>-<br>70<br>K/W| |---|---| ## **STATIC CHARACTERISTICS** Tj= 25˚C unless otherwise specified |||**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|||**CONDITIONS**|**CONDITIONS**||||||**MIN.**|**MIN.**|**MIN.**|**TYP.**|**TYP.**|**TYP.**||**MAX.**|**MAX.**|**MAX.**|**UNIT**|**UNIT**|**UNIT**|||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |||V(BR)DSS|Drain-source breakdown|||||VGS= 0 V; ID= 0.25 mA||||||||55|||-||||-|||V||||| ||||voltage|||||||||Tj= -55˚C||||50|||-||||-|||V||||| |||VGS(TO)|Gate threshold|||voltage||VDS= VGS; ID= 1 mA||||||||1.0|||1.5||||2.0|||V||||| |||||||||||||Tj= 150˚C||||0.6|||-||||-|||V||||| |||||||||||||Tj= -55˚C||||-|||-||||2.3|||V||||| |||IDSS|Zero||gate voltage drain current<br>VDS= 55 V; VGS= 0 V;|||||||||||-||0.05|||||10|||µA||||| |||||||||||||Tj= 150˚C||||-|||-||||100|||µA||||| |||IGSS|Gate source leakage current|||||VGS=±5 V||||||||-||0.02|||||1|||µA||||| |||||||||||||Tj= 150˚C||||-|||-||||5|||µA||||| |||±V(BR)GSS|Gate source breakdown voltage IG=±1 mA|||||||||||||10|||-||||-|||V||||| |||RDS(ON)|Drain-source on-state|||||VGS= 5 V; ID= 5 A||||||||-|||65||||80|||mΩ||||| ||||resistance|||||||||Tj= 150˚C||||-|||-||||148|||mΩ||||| ## **DYNAMIC CHARACTERISTICS** Tmb = 25˚C unless otherwise specified ||Tmb= 25˚C unless otherwise specified|Tmb= 25˚C unless otherwise specified|Tmb= 25˚C unless otherwise specified|Tmb= 25˚C unless otherwise specified|Tmb= 25˚C unless otherwise specified||||||||||||||||||||||||||||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| ||**SYMBOL**<br>**PARAMETER**|||||||**CONDITIONS**||||||**MIN.**<br>**TYP.**<br>**MAX.**<br>**UNIT**|||||||||||||||||||| ||gfs|||Forward transconductance||||VDS||= 25 V; ID= 5 A; Tj= 25˚C||||||4||||-|||||-||||S||||| ||Qg(tot)|||Total|gate charge|||ID=||7 A; VDD= 44 V; VGS= 5 V||||||-||11.2|||||||-|||nC|||||| ||Qgs|||Gate-source charge||||||||||||-||||2.2|||||-|||nC|||||| ||Qgd|||Gate-drain (Miller) charge||||||||||||-||||5|||||-|||nC|||||| ||Ciss|||Input|capacitance|||VGS||= 0 V; VDS= 25 V; f = 1 MHz||||||-|||500|||||650||||pF|||||| ||Coss|||Output capacitance||||||||||||-|||110|||||135||||pF|||||| ||Crss|||Feedback capacitance||||||||||||-||||60|||||85|||pF|||||| ||td on|||Turn-on delay time||||VDD||= 30 V; ID= 7 A;||||||-||||10|||||15||||ns||||| ||tr|||Turn-on rise time||||VGS||= 5 V; RG= 10Ω;||||||-||||30|||||50||||ns||||| ||td off|||Turn-off delay time||||||||||||-||||30|||||45||||ns||||| ||tf|||Turn-off fall time||||Tj=||25˚C||||||-||||30|||||40||||ns||||| ## **REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS** Tj = -55 to 175˚C unless otherwise specified ||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**MIN.**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>IDR<br>Continuous reverse drain<br>Tsp= 25˚C<br>-<br>-<br>7.5<br>A<br>current<br>IDRM<br>Pulsed reverse drain current<br>Tsp= 25˚C<br>-<br>-<br>40<br>A<br>VSD<br>Diode forward voltage<br>IF= 5 A; VGS= 0 V<br>-<br>0.85<br>1.1<br>V<br>trr<br>Reverse recovery time<br>IF= 5 A; -dIF/dt = 100 A/µs;<br>-<br>38<br>-<br>ns<br>Qrr<br>Reverse recoverycharge<br>VGS= -10 V; VR= 30 V<br>-<br>0.2<br>-<br>µC| |---|---| January 1998 Rev 1.100 2 Philips Semiconductors Product specification TrenchMOS transistor Logic level FET PHT8N06LT ## **AVALANCHE LIMITING VALUE** ||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**MIN.**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>WDSS<br>Drain-source non-repetitive<br>ID= 2.5 A; VDD ≤25 V;<br>-<br>-<br>30<br>mJ<br>unclamped inductive turn-off<br>VGS= 5 V; RGS= 50Ω; Tsp= 25 ˚C<br>energy| |---|---| January 1998 Rev 1.100 3 Philips Semiconductors Product specification ## TrenchMOS transistor Logic level FET ## PHT8N06LT **==> picture [463 x 152] intentionally omitted <==** **----- Start of picture text -----**<br> 120 PD% Normalised Power Derating 100 Zth/ (K/W)<br>110<br>100<br>90 10<br>0.5<br>80<br>70 0.2<br>60 0.1<br>1<br>0.05<br>50<br>40 0.02 PD tp D = Ttp<br>30<br>0.1<br>20 T t<br>10<br>0<br>0 20 40 60 80 100 120 140 0.01<br>Tmb / C 1.0E-06 0.0001 t/s 0.01 1 100<br>**----- End of picture text -----**<br> Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tsp) Fig.4. Transient thermal impedance. Zth j-sp = f(t); parameter D = tp/T **==> picture [459 x 153] intentionally omitted <==** **----- Start of picture text -----**<br> ID% Normalised Current Derating Drain current, ID (A)<br>120 40<br>10<br>110 VGS = 5.0 V<br>7<br>100 6 4.6<br>90 30<br>80<br>70 4.0<br>60<br>20<br>50 3.6<br>40<br>30 3.2<br>10<br>20 3.0<br>10 2.4 2.6<br>0<br>0 20 40 60 80 100 120 140 0<br>0 2 4 6 8 10<br>Tmb / C Drain-source voltage, VDS (V)<br>**----- End of picture text -----**<br> Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tsp); conditions: VGS ≥ 5 V Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS **==> picture [217 x 151] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>ID/A<br>RDS(ON) = VDS/ID tp =<br>1 us<br>10 10us<br>100 us<br>1 ms<br>DC<br>1<br>10ms<br>100ms<br>0.1<br>1 10 VDS/V 100<br>**----- End of picture text -----**<br> Fig.3. Safe operating area. Tsp = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp **==> picture [204 x 152] intentionally omitted <==** **----- Start of picture text -----**<br> 115 RDS(ON)/mOhm<br>110<br>4.2<br>105<br>4<br>4.4<br>100<br>4.6 5<br>95 4.8<br>90<br>85<br>80<br>75<br>70<br>5 10 15 20 25<br>ID/A<br>**----- End of picture text -----**<br> Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS January 1998 Rev 1.100 4 Philips Semiconductors Product specification ## TrenchMOS transistor Logic level FET ## PHT8N06LT **==> picture [700 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> 20 VGS(TO) / V BUK98xx-55<br>2.5<br>ID/A<br>max.<br>2<br>15<br>typ.<br>1.5<br>10<br>min.<br>1<br>5<br>0.5<br>Tj/C = 150 25<br>0<br>0 -100 -50 0 50 100 150 200<br>0 1 2 VGS/V 3 4 5 Tj / C<br>Fig.7. Typical transfer characteristics. Fig.10. Gate threshold voltage.<br>ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS<br>**----- End of picture text -----**<br> **==> picture [317 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> Transconductance, gfs (S)<br>15<br>14<br>13<br>12<br>11<br>10<br>9<br>8<br>7<br>6<br>5<br>0 5 10 15 20<br>Drain current, ID (A)<br>Fig.8. Typical transconductance, Tj = 25 ˚C.<br>gfs = f(ID); conditions: VDS = 25 V<br>**----- End of picture text -----**<br> **==> picture [340 x 189] intentionally omitted <==** **----- Start of picture text -----**<br> Sub-Threshold Conduction<br>1E-01<br>1E-02<br>1E-03 2% typ 98%<br>1E-04<br>1E-05<br>1E-05<br>0 0.5 1 1.5 2 2.5 3<br>Fig.11. Sub-threshold drain current.<br>ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS<br>**----- End of picture text -----**<br> **==> picture [700 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> 2.5 a BUK98XX-55 Rds(on) normalised to 25degC 1<br>.9<br>.8<br>2<br>.7<br>.6<br>1.5 .5<br>Ciss<br>.4<br>.3<br>1<br>.2<br>.1 Coss<br>0.5 Crss<br>-100 -50 0 50 100 150 200 0<br>Tmb / degC 0.01 0.1 1 VDS/V 10 100<br>Fig.9. Normalised drain-source on-state resistance. Fig.12. Typical capacitances, Ciss, Coss, Crss.<br>a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 5 A; VGS = 5 V C = f(VDS); conditions: VGS = 0 V; f = 1 MHz<br>Thousands pF<br>**----- End of picture text -----**<br> January 1998 Rev 1.100 5 Philips Semiconductors Product specification ## TrenchMOS transistor Logic level FET **==> picture [332 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> 6<br>VDS/V<br>5<br>VDS = 14V<br>4<br>VDS = 44V<br>3<br>2<br>1<br>0<br>0 2 4 6 8 10 12<br>QG/nC<br>Fig.13. Typical turn-on gate-charge characteristics.<br>VGS = f(QG); conditions: ID = 7 A; parameter VDS<br>**----- End of picture text -----**<br> **==> picture [216 x 152] intentionally omitted <==** **----- Start of picture text -----**<br> 40<br>IF/A<br>30<br>Tj/V = 150 25<br>20<br>10<br>0<br>0 0.5 1 VSDS/V 1.5 2<br>**----- End of picture text -----**<br> Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj ## PHT8N06LT **==> picture [340 x 189] intentionally omitted <==** **----- Start of picture text -----**<br> WDSS%<br>120<br>110<br>100<br>90<br>80<br>70<br>60<br>50<br>40<br>30<br>20<br>10<br>0<br>20 40 60 80 100 120 140<br>Tmb / C<br>Fig.15. Normalised avalanche energy rating.<br>WDSS% = f(Tsp); conditions: ID = 2.5 A<br>**----- End of picture text -----**<br> **==> picture [219 x 144] intentionally omitted <==** **----- Start of picture text -----**<br> VDD<br>+<br>L<br>VDS<br>-<br>VGS<br>-ID/100<br>0 T.U.T.<br>R 01<br>RGS<br>shunt<br>**----- End of picture text -----**<br> Fig.16. Avalanche energy test circuit. 2 _WDSS_ = 0.5 ⋅ _LID_ ⋅ _BVDSS_ /( _BVDSS_ − _VDD_ ) January 1998 Rev 1.100 6 Philips Semiconductors Product specification TrenchMOS transistor Logic level FET PHT8N06LT ## **PRINTED CIRCUIT BOARD** **==> picture [792 x 282] intentionally omitted <==** **----- Start of picture text -----**<br> Dimensions in mm.<br>36<br>18<br>60<br>4.6 4.5<br>9<br>10<br>7<br>15<br>50<br>Fig.17. PCB for thermal resistance and power rating for SOT223.<br>PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 µm thick).<br>**----- End of picture text -----**<br> January 1998 Rev 1.100 7 Philips Semiconductors Product specification TrenchMOS transistor Logic level FET ## PHT8N06LT ## **MECHANICAL DATA** **==> picture [637 x 267] intentionally omitted <==** **----- Start of picture text -----**<br> Dimensions in mm 6.7<br>6.3<br>Net Mass: 0.11 g 0.32 3.1 B<br>0.2 M A<br>0.24 2.9<br>4 A<br>0.10<br>0.02 3.7 7.3<br>3.3 6.7<br>16 13<br>max<br>1 2 3<br>10<br>max<br>1.8 1.05 2.3 0.80<br>0.1 M B<br>max 0.85 0.60<br>(4x)<br>4.6<br>Fig.18. SOT223 surface mounting package.<br>**----- End of picture text -----**<br> ## **Notes** 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL94 V0 at 1/8". January 1998 Rev 1.100 8 |Philips Semiconductors|Product specification| |---|---| |TrenchMOStransistor|PHT8N06LT| |Logic level FET|| ## **DEFINITIONS** |**DEFINITIONS**||||| |---|---|---|---|---| |**Data sheet status**||||| |Objective specification|This data sheet contains target orgoal specifications forproduct development.|||| |Preliminaryspecification This data sheet containspreliminarydata; supplementarydata maybepublished later.||||| |Product specification|This data sheet contains final product specifications.|||| ## **Limiting values** Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. ## **Application information** Where application information is given, it is advisory and does not form part of the specification. ## **Philips Electronics N.V. 1998** All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. ## **LIFE SUPPORT APPLICATIONS** These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1998 Rev 1.100 9
Updated at February 9, 2023
Nexperia is a dedicated global leader in discretes, logic, and MOSFET devices. Built on over half a century of semiconductor expertise and operating independently since 2017, the company produces consistently reliable components at an exceptional volume of 85 billion units annually. With its own manufacturing facilities, Nexperia delivers industry-leading small packages that combine power and thermal efficiency with best-in-class quality, meeting the rigorous standards of the automotive sector. Our extensive Nexperia portfolio is heavily focused on discrete semiconductors, providing engineers with a robust selection of core building blocks. This includes a comprehensive range of diodes and rectifiers, featuring a vast selection of Zener single diodes and Schottky diodes designed for precise voltage regulation and efficient power routing. Additionally, we offer an expansive array of bipolar transistors and single MOSFETs tailored for reliable switching and amplification in demanding applications. Beyond these primary offerings, the lineup extends into specialized circuit protection and passive components. This includes transient voltage suppressor (TVS) diodes, Zener array diodes, and small signal diodes, alongside dual MOSFETs and fast recovery rectifiers. For comprehensive design needs, the selection also encompasses integrated passive filters, common mode chokes, and precision timers and oscillators, ensuring a complete solution for high-performance electronic systems.
About Novapart
Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →