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PHT4NQ10T,135
Power MOSFET, N Channel, 100 V, 3.5 A, 0.2 ohm, SOT-223, Surface Mount
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- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- No. of Pins: 4Pins
- Channel Type: N Channel
- Power Dissipation: 6.9W
- Transistor Mounting: Surface Mount
- Transistor Polarity: N Channel
- Power Dissipation Pd: 6.9W
- Rds(on) Test Voltage: 10V
- On Resistance Rds(on): 0.2ohm
- Transistor Case Style: SOT-223
- Drain Source Voltage Vds: 100V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 3.5A
- Drain Source On State Resistance: 0.2ohm
- Gate Source Threshold Voltage Max: 3V
| Delivery and price | |
|---|---|
| Units per pack | 1000 |
| Price | 0.167 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
**==> picture [69 x 50] intentionally omitted <==** **==> picture [12 x 3] intentionally omitted <==** **----- Start of picture text -----**<br> M3D087<br>**----- End of picture text -----**<br> ## **PHT4NQ10T** TrenchMOS™ standard level FET **Rev. 02 — 2 May 2002** **Product data** ## **1. Description** TrenchMOS™ technology. Product availability: PHT4NQ10T in SOT223. ## **2. Features** I TrenchMOS™ technology - I Very fast switching - I Surface mount package. ## **3. Applications** I Primary side switch in DC to DC converters - I High speed line driver - I Fast general purpose switch. ## **4. Pinning information** **Table 1:** |**Pin**|**Description**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|||**Symbol**|**Symbol**| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |1|gate (g)|||||||||||||||| |||||||||||**4**||||||d| |2|drain (d)|||||||||||||||| |3|source (g)||||||||||||||g|| |4|drain (d)|||||||||||||||| |||||||**1**|||**2**|||**3**|||MBB076|s| ||||Top view|||||||MSB002 - 1||||||| |||||||**SOT223**||||||||||| **==> picture [229 x 70] intentionally omitted <==** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **5. Quick reference data** ## **Table 2: Quick reference data** |**Symbol**<br>**Parameter**|**Conditions**<br>**Typ**<br>**Max**<br>**Unit**| |---|---| |VDS<br>drain-source voltage (DC)|25°C≤Tj≤150°C<br>-<br>100<br>V| |ID<br>drain current (DC)|Tsp= 25°C; VGS= 10 V<br>-<br>3.5<br>A| |Ptot<br>total power dissipation|Tsp= 25°C<br>-<br>6.9<br>W| |Tj<br>junction temperature|-<br>150<br>°C| |RDSon<br>drain-source on-state resistance|VGS= 10 V; ID= 1.75 A| ||Tj= 25°C<br>200<br>250<br>mΩ| ||Tj= 150°C<br>-<br>575<br>mΩ| ## **6. Limiting values** ## **Table 3: Limiting values** In accordance with the Absolute Maximum Rating System (IEC 60134). |**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Max**<br>**Unit**| |---|---| |VDS<br>drain-source voltage (DC)|25°C≤Tj≤150°C<br>-<br>100<br>V| |VDGR<br>drain-gate voltage (DC)|25°C≤Tj≤150°C; RGS= 20 kΩ<br>-<br>100<br>V| |VGS<br>gate-source voltage (DC)|-<br>±20<br>V| |ID<br>drain current (DC)|Tsp= 25°C; VGS= 10 V;<br>Figure 2and3<br>-<br>3.5<br>A| ||Tsp= 100°C; VGS= 10 V;Figure 2<br>-<br>2.2<br>A| |IDM<br>peak drain current|Tsp= 25°C; pulsed; tp≤10µs;<br>Figure 3<br>-<br>14<br>A| |Ptot<br>total power dissipation|Tsp= 25°C;Figure 1<br>-<br>6.9<br>W| |Tstg<br>storage temperature|−65<br>+150<br>°C| |Tj<br>junction temperature|−65<br>+150<br>°C| |**Source-drain diode**|| |IS<br>source (diode forward) current (DC)|Tsp= 25°C<br>-<br>3.5<br>A| |ISM<br>peak source (diode forward) current|Tsp= 25°C; pulsed; tp≤10µs<br>-<br>14<br>A| |**Avalanche ruggedness**|| |EDS(AL)S<br>non-repetitive drain-source avalanche<br>energy|unclamped inductive load; ID= 3.5 A;<br>tp= 0.2 ms; VDD≤15 V; RGS= 50Ω;<br>VGS= 10 V; starting Tj= 25°C;<br>Figure 4<br>-<br>45<br>mJ<br>-<br>3.5<br>A| |IDS(AL)SM<br>peak non-repetitive drain-source<br>avalanche current|| © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **2 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** **==> picture [212 x 250] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa17<br>120<br>Pder<br> (%)<br>80<br>40<br>0<br>0 50 100 150 200<br>Tsp (°C)<br>Pder = ---------------------- PtotP ( tot25 ° C ) × 100 %<br>**----- End of picture text -----**<br> **Fig 1. Normalized total power dissipation as a function of solder point temperature.** **==> picture [212 x 211] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa25<br>120<br>Ider<br>(%)<br>80<br>40<br>0<br>0 50 100 150 200<br>Tsp (°C)<br>**----- End of picture text -----**<br> **==> picture [40 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> VGS ≥ 10 V<br>**----- End of picture text -----**<br> _I der_ = ----------------- _I D_ ( _I25D_ ° _C_ **-** ) × _100_ % **Fig 2. Normalized continuous drain current as a function of solder point temperature.** **==> picture [185 x 180] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa88<br>10 [2]<br>ID Limit RDSon = VDS/ID<br>(A)<br>10 tp = 10 µs<br>100 µs<br>1<br>1 ms<br>DC<br>10 ms<br>100 ms<br>10 [-1]<br>10 [-2]<br>1 10 10 [2] 10 [3]<br>VDS (V)<br>**----- End of picture text -----**<br> **==> picture [178 x 184] intentionally omitted <==** **----- Start of picture text -----**<br> 10 03aa97<br>IAS<br>(A)<br>25 °C<br>1<br>Tj prior to avalanche = 125 °C<br>10 [-1]<br>10 [-2] 10 [-1] 1 10<br>tp (ms)<br>**----- End of picture text -----**<br> Tsp = 25 °C; IDM is single pulse.sp = 25 °C; IDM is single pulse. = 25 °C; IDM is single pulse. °C; IDM is single pulse.C; IDM is single pulse.DM is single pulse. is single pulse. Tsp = 25 °C; IDM is single pulse.sp = 25 °C; IDM is single pulse. = 25 °C; IDM is single pulse. °C; IDM is single pulse.C; IDM is single pulse.DM is single pulse. is single pulse. Unclamped inductive load; VDD ≤ 15 V; RGS = 50 Ω; VGS = 10 V; starting Tj = 25 °C and 125 °C. **Fig 3. Safe operating area; continuous and peak drain Fig 4. Non-repetitive avalanche ruggedness current currents as a function of drain-source voltage. as a function of pulse duration.** © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **3 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **7. Thermal characteristics** ## **Table 4: Thermal characteristics** |**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---| |Rth(j-sp)|thermal resistance from junction to solder|mounted on a metal clad substrate;|-|-|18|K/W| ||point|Figure 5||||| |Rth(j-a)|thermal resistance from junction to ambient|mounted on a printed circuit board;|-|150|-|K/W| |||minimum footprint||||| ## **7.1 Transient thermal impedance** **==> picture [397 x 207] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa87<br>10 [2]<br>Zth(j-sp)<br>(K/W)<br>δ = 0.5<br>10<br>0.2<br>0.1<br>0.05<br>1<br>0.02<br>t<br>P δ = p<br>T<br>10 [-1]<br>single pulse<br>tp t<br>T<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10<br>tp (s)<br>Mounted on a metal clad substrate.<br>**----- End of picture text -----**<br> **Fig 5. Transient thermal impedance from junction to solder point as a function of pulse duration.** © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **4 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **8. Characteristics** ## **Table 5: Characteristics** Tj = 25 ° |**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**| |---|---| |**Static characteristics**|| |V(BR)DSS<br>drain-source breakdown<br>voltage|ID= 250µA; VGS= 0 V| ||Tj= 25°C<br>100<br>130<br>-<br>V| ||Tj=−55°C<br>89<br>-<br>-<br>V| |VGS(th)<br>gate-source threshold voltage|ID= 1 mA; VDS= VGS| ||Tj= 25°C;Figure 10<br>2<br>3<br>4<br>V| ||Tj= 150°C;Figure 10<br>1.2<br>-<br>-<br>V| ||Tj=−55°C;Figure 10<br>-<br>-<br>6<br>V| |IDSS<br>drain-source leakage current|VDS= 100 V; VGS= 0 V| ||Tj= 25°C<br>-<br>1<br>25<br>µA| ||Tj= 150°C<br>-<br>4<br>250<br>µA| ||VDS= 60 V; VGS= 0 V| ||Tj= 85°C<br>-<br>-<br>1<br>µA| |IGSS<br>gate-source leakage current|VGS=±20 V; VDS= 0 V<br>-<br>10<br>100<br>nA| |RDSon<br>drain-source on-state<br>resistance|VGS= 10 V; ID= 1.75 A| ||Tj= 25°C;Figure 8and9<br>-<br>200<br>250<br>mΩ| ||Tj= 150°C;Figure 9<br>-<br>-<br>575<br>mΩ| |**Dynamic characteristics**|| |gfs<br>forward transconductance|VDS= 5 V; ID= 3.5 A;<br>Figure 12<br>-<br>4.2<br>S| |Qg(tot)<br>total gate charge|ID= 3.5 A; VDS= 80 V;<br>VGS= 10 V;Figure 15<br>-<br>7.4<br>-<br>nC<br>-<br>1.5<br>-<br>nC<br>-<br>3.3<br>-<br>nC| |Qgs<br>gate-source charge|| |Qgd<br>gate-drain (Miller) charge|| |Ciss<br>input capacitance|VGS= 0 V; VDS= 25 V;<br>f = 1 MHz;Figure 13<br>-<br>300<br>-<br>pF<br>-<br>44<br>-<br>pF<br>-<br>21<br>-<br>pF| |Coss<br>output capacitance|| |Crss<br>reverse transfer capacitance|| |td(on)<br>turn-on delay time|VDD= 50 V; RD= 15Ω;<br>VGS= 10 V; RG= 6Ω<br>-<br>8<br>-<br>ns<br>-<br>13<br>-<br>ns<br>-<br>20<br>-<br>ns<br>-<br>11<br>-<br>ns| |tr<br>rise time|| |td(off)<br>turn-off delay time|| |tf<br>fall time|| |**Source-drain diode**|| |VSD<br>source-drain (diode forward)<br>voltage|IS= 3.5 A; VGS= 0 V;<br>Figure 14<br>-<br>0.87<br>1.5<br>V| |trr<br>reverse recovery time|IS= 3.5 A;<br>dIS/dt =−100 A/µs;<br>VGS= 0 V; VDS= 30 V<br>-<br>50<br>-<br>ns<br>-<br>100<br>-<br>nC| |Qr<br>recovered charge|| © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **5 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** **==> picture [188 x 212] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa90<br>10<br>ID Tj = 25 °C<br>(A) VGS = 10 V<br>8<br>6 V<br>6<br>5.5 V<br>4<br>5 V<br>4.8 V<br>2<br>4.6 V<br>4.2 V<br>0<br>0 0.4 0.8 1.2 1.6 2<br>VDS (V)<br>Tj = 25 °C<br>**----- End of picture text -----**<br> **Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values.** **==> picture [185 x 211] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa91<br>1<br>RDSon 4.4 V 4.8 V<br>(Ω)<br>0.8<br>5 V<br>0.6<br>0.4 5.5 V<br>6V<br>VGS = 10 V<br>0.2<br>Tj = 25 °C<br>0<br>0 2 4 6 8 10<br>ID (A)<br>Tj = 25 °C<br>**----- End of picture text -----**<br> **Fig 8. Drain-source on-state resistance as a function of drain current; typical values.** **==> picture [179 x 181] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa92<br>10<br>ID VDS > ID X RDSon<br>(A)<br>8<br>6<br>Tj = 25 °C<br>4<br>150 °C<br>2<br>0<br>0 2 4 6 8<br>VGS (V)<br>**----- End of picture text -----**<br> Tj = 25 °C and 150 °C; VDS > ID × RDSon **Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values.** **==> picture [223 x 253] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa29<br>3<br>a<br>2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>-60 0 60 120 180<br>Tj (oC)<br>a = -------------------------- RDSon -<br>RDSon ( 25 ° C )<br>Fig 9. Normalized drain-source on-state resistance<br>factor as a function of junction temperature.<br>**----- End of picture text -----**<br> © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **6 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** **==> picture [224 x 211] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa32<br>5<br>VGS(th)<br>(V)<br>4 max<br>3 typ<br>2 min<br>1<br>0<br>-60 0 60 120 Tj (oC) 180<br>**----- End of picture text -----**<br> ID = 1 mA; VDS = VGS **Fig 10. Gate-source threshold voltage as a function of junction temperature.** **==> picture [178 x 181] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa93<br>5<br>gfs VDS > ID X RDSon Tj = 25 °C<br>(S)<br>4<br>150 °C<br>3<br>2<br>1<br>0<br>0 2 4 6 8 10<br>ID (A)<br>**----- End of picture text -----**<br> Tj = 25 °C and 150 °C; VDS > ID × RDSon **Fig 12. Forward transconductance as a function of drain current; typical values.** **==> picture [223 x 211] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa35<br> 10 [-1]<br>ID<br>(A)<br> 10 [-2]<br> 10 [-3] min typ max<br> 10 [-4]<br> 10 [-5]<br> 10 [-6]<br>0 2 4 6<br>VGS (V)<br>**----- End of picture text -----**<br> Tj = 25 °C; VDS = 5 V **Fig 11. Sub-threshold drain current as a function of gate-source voltage.** **==> picture [180 x 182] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa95<br>10 [3]<br>C<br>(pF)<br>Ciss<br>10 [2]<br>Coss<br>Crss<br>10<br>10 [-1] 1 10 10 [2]<br>VDS (V)<br>**----- End of picture text -----**<br> VGS = 0 V; f = 1 MHz **Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.** © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **7 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** **==> picture [428 x 183] intentionally omitted <==** **----- Start of picture text -----**<br> 03aa94 03aa96<br>10 15<br>IS VGS ID = 3.5 A VDS = 20 V<br>(A) 8 (V) Tj = 25 °C<br>10<br>6 VDS = 80 V<br>Tj = 150 °C<br>4<br>25 °C 5<br>2<br>0 0<br>0 0.2 0.4 0.6 0.8 1 1.2 0 4 8 12<br>QG (nC)<br>VSD (V)<br>**----- End of picture text -----**<br> Tj = 25 °C and 150 °C; VGS = 0 V ID = 3.5 A; VDS = 80 V **Fig 14. Source (diode forward) current as a function of Fig 15. Gate-source voltage as a function of gate source-drain (diode forward) voltage; typical charge; typical values. values.** © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **8 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **9. Package outline** **Plastic surface mounted package; collector pad for good heat transfer; 4 leads** ## **SOT223** **==> picture [482 x 574] intentionally omitted <==** **----- Start of picture text -----**<br> D B E A X<br>c<br>y<br>HE v M A<br>b1<br>4<br>Q<br>A<br>A1<br>1 2 3 Lp<br>e1 bp w M B detail X<br>e<br>0 2 4 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y<br>1.8 0.10 0.80 3.1 0.32 6.7 3.7 7.3 1.1 0.95<br>mm 4.6 2.3 0.2 0.1 0.1<br>1.5 0.01 0.60 2.9 0.22 6.3 3.3 6.7 0.7 0.85<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC EIAJ PROJECTION<br>97-02-28<br> SOT223 SC-73<br>99-09-13<br>**----- End of picture text -----**<br> ## **Fig 16. SOT223.** © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **9 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **10. Revision history** ## **Table 6: Revision history** |**Rev**|**Date**|**CPCN**|**Description**| |---|---|---|---| |**02**|**20020502**|**-**|**Product data (9397 750 09581)**| ||||Modifcations:| ||||**•** Additional IDSSdata added.| |**01**|**20000731**|**-**|**Product specifcation; initial version.**| © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09581 **Product data** **Rev. 02 — 2 May 2002** **10 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **11. Data sheet status** |**Data sheet status**[1]|**Product status**[2]|**Defnition**| |---|---|---| |Objective data|Development|This data sheet contains data from the objective specifcation for product development. Philips Semiconductors<br>reserves the right to change the specifcation in any manner without notice.| |Preliminary data|Qualifcation|This data sheet contains data from the preliminary specifcation. Supplementary data will be published at a<br>later date. Philips Semiconductors reserves the right to change the specifcation without notice, in order to| |||improve the design and supply the best possible product.| |Product data|Production|This data sheet contains data from the product specifcation. Philips Semiconductors reserves the right to| |||make changes at any time in order to improve the design, manufacturing and supply. Changes will be<br>communicated according to the Customer Product/Process Change Notifcation (CPCN) procedure| |||SNW-SQ-650A.| [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. ## **12.** ## **13. Disclaimers** The data in a short-form is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. **Application information —** Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. **Life support —** These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. **Right to make changes —** Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. ## **14. Trademarks** **TrenchMOS —** is a trademark of Koninklijke Philips Electronics N.V. ## **Contact information** For additional information, please visit **http://www.semiconductors.philips.com** . For sales office addresses, send e-mail to: **sales.addresses@www.semiconductors.philips.com** . **Fax: +31 40 27 24825** **© Koninklijke Philips Electronics N.V. 2002. All rights reserved.** **9397 750 09581** **Product data** **Rev. 02 — 2 May 2002** **11 of 12** **PHT4NQ10T** **Philips Semiconductors** **TrenchMOS™ standard level FET** ## **Contents** |**1**|**Description**. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1| |---|---| |**2**|**Features**. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1| |**3**|**Applications**. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1| |**4**|**Pinning information**. . . . . . . . . . . . . . . . . . . . . . 1| |**5**|**Quick reference data**. . . . . . . . . . . . . . . . . . . . . 2| |**6**|**Limiting values**. . . . . . . . . . . . . . . . . . . . . . . . . . 2| |**7**|**Thermal characteristics**. . . . . . . . . . . . . . . . . . . 4| |7.1|Transient thermal impedance . . . . . . . . . . . . . . 4| |**8**|**Characteristics**. . . . . . . . . . . . . . . . . . . . . . . . . . 5| |**9**|**Package outline**. . . . . . . . . . . . . . . . . . . . . . . . . 9| |**10**|**Revision history**. . . . . . . . . . . . . . . . . . . . . . . . 10| |**11**|**Data sheet status**. . . . . . . . . . . . . . . . . . . . . . . 11| |**12**|**Definitions**. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11| |**13**|**Disclaimers**. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11| |**14**|**Trademarks**. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11| ## **© Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands** All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. **==> picture [229 x 117] intentionally omitted <==** **Date of release: 2 May 2002** **Document order number: 9397 750 09581**
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Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →