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PHPT610030NKX
Bipolar Transistor Array, Dual NPN, 100 V, 3 A, 1.25 W
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: NEXPERIA
- Product type: Bipolar Junction Transistor Arrays - BJT
- Transistor Polarity:Dual NPN; Collector Emitter Voltage V(br)ceo:100V; Power Dissipation Pd:1.25W; DC Collector Current:3A; DC Current Gain hFE:10hFE; Transistor Case Style:SOT-1205; No. o
- MSL: MSL 1 - Unlimited
- SVHC: Lead (25-Jun-2025)
- No. of Pins: 8Pins
- Product Range: -
- Qualification: AEC-Q101
- Transistor Mounting: Surface Mount
- Transistor Polarity: Dual NPN
- Power Dissipation NPN: 1.25W
- Power Dissipation PNP: -
- Transistor Case Style: SOT-1205
- Transition Frequency NPN: 140MHz
- Transition Frequency PNP: -
- Operating Temperature Max: 175°C
- DC Current Gain hFE Min NPN: 10hFE
- DC Current Gain hFE Min PNP: -
- Continuous Collector Current NPN: 3A
- Continuous Collector Current PNP: -
- Collector Emitter Voltage Max NPN: 100V
- Collector Emitter Voltage Max PNP: -
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.294 € |
| Current stock | 500+ |
| Lead time | 30 days |
Datasheet
## **PHPT610030NK** **NPN/NPN high power double bipolar transistor 20 October 2014** **Product data sheet** ## **1. General description** NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) SurfaceMounted Device (SMD) power plastic package. PNP/PNP complement: PHPT610030PK. NPN/PNP complement: PHPT610030NPK. ## **2. Features and benefits** - High thermal power dissipation capability - Suitable for high temperature applications up to 175 °C - Reduced Printed-Circuit Board (PCB) requirements comparing to transistors in DPAK - High energy efficiency due to less heat generation - AEC-Q101 qualified ## **3. Applications** - Motor control - Power management - Load switch - Linear mode voltage regulator - Backlighting applications - Relay replacement ## **4. Quick reference data** |**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---|---| |**Per transistor**|||||||| |VCEO|collector-emitter<br>voltage|open base||-|-|100|V| |IC|collector current|||-|-|3|A| |**Per transistor**|||||||| |RCEsat|collector-emitter<br>saturation resistance|IC= 3 A; IB= 0.3 A; pulsed; tp≤ 300 µs;<br>δ ≤ 0.02; Tamb= 25 °C||-|75|110|mΩ| **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** ## **5. Pinning information** ## **Table 2. Pinning information** |**Pin**|**Symbol**|**Description**|**Simplified outline**|**Graphic symbol**| |---|---|---|---|---| |1|E1|emitter TR1|3<br>2<br>1<br>4<br>6<br>7<br>8<br>5<br>**LFPAK56D (SOT1205)**|_sym140_<br>B1<br>E1<br>C2<br>B2<br>C1<br>TR1<br>TR2<br>E2| |2|B1|base TR1||| |3|E2|emitter TR2||| |4|B2|base TR2||| |5|C2|collector TR2||| |6|C2|collector TR2||| |7|C1|collector TR1||| |8|C1|collector TR1||| ## **6. Ordering information** ## **Table 3. Ordering information** |**Type number**|**Package**||| |---|---|---|---| ||**Name**|**Description**|**Version**| |PHPT610030NK|LFPAK56D|Plastic single ended surface mounted package (LFPAK56D); 8<br>leads|SOT1205| ## **7. Marking** ## **Table 4. Marking codes** |**Type number**|**Marking code**| |---|---| |PHPT610030NK|10030NK| ## **8. Limiting values** ## **Table 5. Limiting values** _In accordance with the Absolute Maximum Rating System (IEC 60134)._ |**Symbol**|**Parameter**|**Conditions**||**Min**|**Max**|**Unit**| |---|---|---|---|---|---|---| |**Per transistor**||||||| |VCBO|collector-base voltage|open emitter||-|100|V| |VCEO|collector-emitter voltage|open base||-|100|V| |VEBO|emitter-base voltage|open collector||-|7|V| |IC|collector current|||-|3|A| |ICM|peak collector current|single pulse; tp≤ 1 ms||-|8|A| |IB|base current|||-|0.5|A| PHPT610030NK All information provided in this document is subject to legal disclaimers. **Product data sheet** rovided in this document is subject to legal disclaimers.ject to legal disclaimers.ect to legal disclaimers.gal disclaimers.al disclaimers. © Nexperia B.V. 2017. All rights reserved **20 October 2014 2 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** |**Symbol**|**Parameter**|**Conditions**||**Min**|**Max**|**Unit**| |---|---|---|---|---|---|---| |Ptot|total power dissipation|Tamb≤ 25 °C|[1]|-|1|W| ||||[2]|-|2.4|W| ||||[3]|-|25|W| |**Per device**||||||| |Ptot|total power dissipation|Tamb≤ 25 °C|[1]|-|1.25|W| ||||[4]|-|5|W| ||||[2]|-|3|W| |Tj|junction temperature|||-|175|°C| |Tstg|storage temperature|||-65|175|°C| |Tamb|ambient temperature|||-55|175|°C| - [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm[2] . [3] Power dissipation from junction to mounting base. [4] Device mounted on a ceramic PCB, Al2O3, standard footprint. **==> picture [326 x 218] intentionally omitted <==** **----- Start of picture text -----**<br> aaa-014341<br>4<br>Ptot<br>(W)<br>3<br>(1)<br>2<br>1<br>(2)<br>0<br>-75 0 75 150 225<br>Tamb (°C)<br>(1) FR4 PCB, mounting pad for collector 6 cm [2]<br>(2) FR4 PCB, standard footprint<br>**----- End of picture text -----**<br> **Fig. 1. Per transistor: power derating curves** All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **3 / 15** **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** ## **9. Thermal characteristics** ## **Table 6. Thermal characteristics** |**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---|---| |**Per transistor**|||||||| |Rth(j-a)|thermal resistance<br>from junction to<br>ambient|in free air|[1]|-|-|150|K/W| ||||[2]|-|-|62.5|K/W| |Rth(j-sp)|thermal resistance<br>from junction to solder<br>point|||-|-|6|K/W| |**Per device**|||||||| |Rth(j-a)|thermal resistance<br>from junction to<br>ambient|in free air|[1]|-|-|120|K/W| ||||[2]|-|-|50|K/W| ||||[3]|-|-|30|K/W| [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm[2] . [3] Device mounted on a ceramic PCB, Al2O3, standard footprint. |||||||||||||||||||||||||||||||||||||||||||||||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |~~07~~|d|uty||cy|cl|e = 1||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |~~.~~||||||~~0.5~~||||||||||||||||||||||||||||||||||||||||| |~~03~~||||||||||||||||||||||||||||||||||||||||||||||| |~~.~~||||||~~025~~||||||||||||||||||||||||||||||||||||||||| |~~02~~||||||~~.~~||||||||||||||||||||||||||||||||||||||||| |~~.~~||||||0.1||||||||||||||||||||||||||||||||||||||||| |~~0.05~~||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||~~0.02~~||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |~~0.0~~||||||0||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||| FR4 PCB, standard footprint **Fig. 2. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values** All information provided in this document is subject to legal disclaimers. **20 October 2014** PHPT610030NK © Nexperia B.V. 2017. All rights reserved **Product data sheet** **4 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** **==> picture [481 x 189] intentionally omitted <==** **----- Start of picture text -----**<br> aaa-014343<br>10 [2]<br>duty cycle = 1<br>Zth(j-a) 0.75<br>(K/W) 0.5<br>0.33<br>0.25<br>10 0.2<br>0.1<br>0.05<br>0.02<br>0<br>1 0.01<br>10 [-1]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 1 10 10 [2] 10 [3]<br>tp (s)<br>**----- End of picture text -----**<br> FR4 PCB, mounting pad for collector 6 cm[2] **Fig. 3. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values** ## **10. Characteristics** ## **Table 7. Characteristics** |**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---|---| |**Per transistor**|||||||| |ICBO|collector-base cut-off<br>current|VCB= 80 V; IE= 0 A; Tamb= 25 °C||-|-|100|nA| |||VCB= 80 V; IE= 0 A; Tj= 150 °C||-|-|50|µA| |ICES|collector-emitter cut-off<br>current|VCE= 80 V; VBE= 0 V; Tamb= 25 °C||-|-|100|nA| |IEBO|emitter-base cut-off<br>current|VEB= 7 V; IC= 0 A; Tamb= 25 °C||-|-|100|nA| |hFE|DC current gain|VCE= 10 V; IC= 500 mA; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||150|250|-|| |||VCE= 10 V; IC= 1 A; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||80|250|-|| |||VCE= 10 V; IC= 2 A; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||20|100|-|| |||VCE= 10 V; IC= 3 A; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||10|40|-|| |VCEsat|collector-emitter<br>saturation voltage|IC= 1 A; IB= 50 mA; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||-|90|150|mV| |||IC= 3 A; IB= 300 mA; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||-|225|330|mV| All information provided in this document is subject to legal disclaimers. PHPT610030NK **Product data sheet** © Nexperia B.V. 2017. All rights reserved **20 October 2014** **5 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** |**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---|---| |RCEsat|collector-emitter<br>saturation resistance|IC= 3 A; IB= 0.3 A; pulsed; tp≤ 300 µs;<br>δ ≤ 0.02; Tamb= 25 °C||-|75|110|mΩ| |VBEsat|base-emitter saturation<br>voltage|IC= 1 A; IB= 50 mA; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||-|0.86|1|V| |||IC= 2 A; IB= 200 mA; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||-|1|1.2|V| |VBEon|base-emitter turn-on<br>voltage|VCE= 2 V; IC= 0.1 A; pulsed;<br>tp≤ 300 µs; δ ≤ 0.02; Tamb= 25 °C||-|0.67|0.85|V| |td|delay time|VCC= 12.5 V; IC= 1 A; IBon= 50 mA;<br>IBoff= -50 mA; Tamb= 25 °C||-|20|-|ns| |tr|rise time|||-|300|-|ns| |ton|turn-on time|||-|320|-|ns| |ts|storage time|||-|830|-|ns| |tf|fall time|||-|470|-|ns| |toff|turn-off time|||-|1300|-|ns| |fT|transition frequency|VCE= 10 V; IC= 100 mA; f = 100 MHz;<br>Tamb= 25 °C||-|140|-|MHz| |Cc|collector capacitance|VCB= 10 V; IE= 0 A; ie= 0 A;<br>f = 1 MHz; Tamb= 25 °C||-|11|-|pF| **==> picture [238 x 275] intentionally omitted <==** **----- Start of picture text -----**<br> aaa-010261<br>400<br>hFE (1)<br>300<br>(2)<br>200<br>(3)<br>100<br>0<br>10 [-1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA)<br>VCE = 10 V<br>(1) Tamb = 100 °C<br>(2) Tamb = 25 °C<br>(3) Tamb = −55 °C<br>Fig. 4. DC current gain as a function of collector<br>current; typical values<br>**----- End of picture text -----**<br> **==> picture [239 x 234] intentionally omitted <==** **----- Start of picture text -----**<br> aaa-010267<br>3<br>IB = 50 mA<br>45<br>IC<br>(A) 40<br>35<br>2 30<br>25<br>20<br>15<br>10<br>1<br>5<br>0<br>0 1 2 3 4 5<br>VCE (V)<br>Tamb = 25 °C<br>Fig. 5. Collector current as a function of collector-<br>emitter voltage; typical values<br>**----- End of picture text -----**<br> All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **6 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** **==> picture [497 x 565] intentionally omitted <==** **----- Start of picture text -----**<br> aaa-010262 aaa-010265<br>1.2 1.4<br>VBE VBEsat<br>(V) (V)<br>0.8 (1) 1.0<br>(2)<br>(1)<br>(3)<br>0.4 0.6 (2)<br>(3)<br>0 0.2<br>10 [-1] 1 10 10 [2] 10 [3] 10 [4] 10 [5] 10 [-1] 1 10 10 [2] 10 [3] 10 [4] 10 [5]<br>IC (mA) IC (mA)<br>VCE = 2 V IC/IB = 20<br>(1) Tamb = −55 °C (1) Tamb = −55 °C<br>(2) Tamb = 25 °C (2) Tamb = 25 °C<br>(3) Tamb = 100 °C (3) Tamb = 100 °C<br>Fig. 6. Base-emitter voltage as a function of collector Fig. 7. Base-emitter saturation voltage as a function of<br>current; typical values collector current; typical values<br>aaa-010263 aaa-010264<br>1 10<br>VCEsat<br>VCEsat (V)<br>(V)<br>1<br>10 [-1]<br>(2) (1) (1)<br>(2)<br>(3) 10 [-1] (3)<br>10 [-2]<br>10 [-2]<br>10 [-3] 10 [-3]<br>10 [-1] 1 10 10 [2] 10 [3] 10 [4] 10 [-1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA) IC (mA)<br>IC/IB = 20 Tamb = 25 °C<br>(1) Tamb = 100 °C (1) IC/IB = 50<br>(2) Tamb = 25 °C (2) IC/IB = 20<br>(3) Tamb = −55 °C (3) IC/IB = 10<br>Fig. 8. Collector-emitter saturation voltage as a Fig. 9. Collector-emitter saturation voltage as a<br>function of collector current; typical values function of collector current; typical values<br>**----- End of picture text -----**<br> All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **7 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** **==> picture [497 x 283] intentionally omitted <==** **----- Start of picture text -----**<br> aaa-010266 aaa-010268<br>10 [3] 10 [3]<br>RCEsat RCEsat<br>(Ω) (Ω)<br>10 [2] 10 [2]<br>10 10<br>1 (1) 1<br>(2) (1)<br>(3) (2)<br>10 [-1] 10 [-1]<br>(3)<br>10 [-2] 10 [-2]<br>10 [-1] 1 10 10 [2] 10 [3] 10 [4] 10 [-1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA) IC (mA)<br>IC/IB = 20 Tamb = 25 °C<br>(1) Tamb = 100 °C (1) IC/IB = 50<br>(2) Tamb = 25 °C (2) IC/IB = 20<br>(3) Tamb = −55 °C (3) IC/IB = 10<br>Fig. 10. Collector-emitter saturation resistance as a Fig. 11. Collector-emitter saturation resistance as a<br>function of collector current; typical values function of collector current; typical values<br>**----- End of picture text -----**<br> All information provided in this document is subject to legal disclaimers. **20 October 2014** PHPT610030NK © Nexperia B.V. 2017. All rights reserved **Product data sheet** **8 / 15** **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** ## **11. Test information** **==> picture [497 x 485] intentionally omitted <==** **----- Start of picture text -----**<br> IB<br>90 % input pulse<br>(idealized waveform)<br>IBon (100 %)<br>10 %<br>IBoff<br>output pulse<br>IC (idealized waveform)<br>90 %<br>IC (100 %)<br>10 %<br>t<br>td tr ts tf<br>ton toff 006aaa003<br>Fig. 12. BISS transistor switching time definition<br>VBB VCC<br>RB RC<br>(probe) Vo (probe)<br>oscilloscope oscilloscope<br>450 Ω 450 Ω<br>R2<br>VI DUT<br>R1<br>mlb826<br>Fig. 13. Test circuit for switching times<br>**----- End of picture text -----**<br> ## **11.1 Quality information** This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard _Q101 - Stress test qualification for discrete semiconductors_ , and is suitable for use in automotive applications. All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **9 / 15** **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** ## **12. Package outline** **==> picture [481 x 575] intentionally omitted <==** **----- Start of picture text -----**<br> Plastic single ended surface mounted package LFPAK56D; 8 leads SOT1205<br>E A A<br>b1 c1<br>L1<br>mountingbase D1<br>D D2<br>H<br>L<br>1 2 3 4<br>b X<br>e (8x) w A c E1<br>E2<br>A1 C<br>θ<br>detail X Lp y C<br>0 2.5 5 mm<br>scale<br>Dimensions<br>Unit A A1 b b1 c c1 D [(1)] D1 [(1)] (ref)D2 E [(1)] E1 [(1)] E2 e H L L1 Lp w y θ<br>max 1.05 0.1 0.50 4.4 0.25 0.30 4.70 4.8 5.30 1.8 0.85 6.2 1.3 0.55 0.85 8 [°]<br>mm nom 3.5 1.27 0.25 0.1<br>min 0.0 0.35 4.1 0.19 0.24 4.45 4.95 1.6 5.9 0.8 0.30 0.40 0 [°]<br>Note<br>1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. sot1205_po<br>Outline References European Issue date<br>version IEC JEDEC JEITA projection<br>13-02-21<br>SOT1205<br>14-08-21<br>**----- End of picture text -----**<br> **Fig. 14. Package outline LFPAK56D (SOT1205)** All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **10 / 15** **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** ## **13. Soldering** **==> picture [481 x 574] intentionally omitted <==** **----- Start of picture text -----**<br> Footprint information for reflow soldering of LFPAK56D package SOT1205<br>5.85<br>3.81<br>1.27 0.7 (4x)<br>3.175 3.2 3.325<br>2.0<br>1.275<br>0.8<br>1.875 2.1<br>1.0 (2x) 2.7<br>3.85 3.975<br> 0.0625<br>0.025<br>0.7 (4x) 1.44<br>1.27<br>1.1 (2x)<br>3.81<br>solder land solder land plus solder paste<br>solder paste deposit solder resist<br>occupied area Dimensions in mm sot1205_fr<br>**----- End of picture text -----**<br> **==> picture [259 x 9] intentionally omitted <==** **----- Start of picture text -----**<br> Fig. 15. Reflow soldering footprint for LFPAK56D (SOT1205)<br>**----- End of picture text -----**<br> PHPT610030NK All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **11 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** ## **14. Revision history** |**14. Revision history**|**14. Revision history**|**14. Revision history**|**14. Revision history**|**14. Revision history**| |---|---|---|---|---| |**Table 8.**<br>**Revision history**||||| |**Data sheet ID**|**Release date**|**Data sheet status**|**Change notice**|**Supersedes**| |PHPT610030NK v.1|20141020|Product data sheet|-|-| All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **12 / 15** **Nexperia** **PHPT610030NK** ## **NPN/NPN high power double bipolar transistor** ## **15. Legal information** ## **15.1 Data sheet status** |**Document**<br>**status [1]**<br>**[2]**|**Product**<br>**status[3]**|**Definition**| |---|---|---| |Objective<br>[short] data<br>sheet|Development|This document contains data from<br>the objective specification for product<br>development.| |Preliminary<br>[short] data<br>sheet|Qualification|This document contains data from the<br>preliminary specification.| |Product<br>[short] data<br>sheet|Production|This document contains the product<br>specification.| [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. ## **15.2 Definitions** **Preview** — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. **Draft** — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. **Short data sheet** — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. **Product specification** — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. ## **15.3 Disclaimers** **Limited warranty and liability** — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of Nexperia. **Right to make changes** — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. **Suitability for use in automotive applications** — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. **Quick reference data** — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. **Applications** — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. **Limiting values** — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. **Terms and conditions of commercial sale** — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. PHPT610030NK All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **13 / 15** **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** **No offer to sell or license** — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. **Export control** — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. **Translations** — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. ## **15.4 Trademarks** Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **14 / 15** **Nexperia** **PHPT610030NK** **NPN/NPN high power double bipolar transistor** ## **16. Contents** |**16. **|**Contents**| |---|---| |**1**|**General description ............................................... 1**| |**2**|**Features and benefits ............................................1**| |**3**|**Applications ........................................................... 1**| |**4**|**Quick reference data ............................................. 1**| |**5**|**Pinning information ...............................................2**| |**6**|**Ordering information .............................................2**| |**7**|**Marking ...................................................................2**| |**8**|**Limiting values .......................................................2**| |**9**|**Thermal characteristics .........................................4**| |**10**|**Characteristics .......................................................5**| |**11**|**Test information .....................................................9**| |11.1|Quality information ............................................... 9| |**12**|**Package outline ................................................... 10**| |**13**|**Soldering .............................................................. 11**| |**14**|**Revision history ...................................................12**| |**15**|**Legal information .................................................13**| |15.1|Data sheet status ............................................... 13| |15.2|Definitions ...........................................................13| |15.3|Disclaimers .........................................................13| |15.4|Trademarks ........................................................ 14| ## © **Nexperia B.V. 2017. All rights reserved** For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com **Date of release: 20 October 2014** All information provided in this document is subject to legal disclaimers. PHPT610030NK © Nexperia B.V. 2017. All rights reserved **20 October 2014** **Product data sheet** **15 / 15**
Updated at June 10, 2026
Nexperia is a dedicated global leader in discretes, logic, and MOSFET devices. Built on over half a century of semiconductor expertise and operating independently since 2017, the company produces consistently reliable components at an exceptional volume of 85 billion units annually. With its own manufacturing facilities, Nexperia delivers industry-leading small packages that combine power and thermal efficiency with best-in-class quality, meeting the rigorous standards of the automotive sector. Our extensive Nexperia portfolio is heavily focused on discrete semiconductors, providing engineers with a robust selection of core building blocks. This includes a comprehensive range of diodes and rectifiers, featuring a vast selection of Zener single diodes and Schottky diodes designed for precise voltage regulation and efficient power routing. Additionally, we offer an expansive array of bipolar transistors and single MOSFETs tailored for reliable switching and amplification in demanding applications. Beyond these primary offerings, the lineup extends into specialized circuit protection and passive components. This includes transient voltage suppressor (TVS) diodes, Zener array diodes, and small signal diodes, alongside dual MOSFETs and fast recovery rectifiers. For comprehensive design needs, the selection also encompasses integrated passive filters, common mode chokes, and precision timers and oscillators, ensuring a complete solution for high-performance electronic systems.
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