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PBSS4350SPN,115
Bipolar Transistor Array, Complementary NPN and PNP, 50 V, 2.7 A, 1.43 W, 180 hFE, SOIC
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: NEXPERIA
- Product type: Bipolar Junction Transistor Arrays - BJT
- Transistor Polarity: Complementary NPN and PNP
- Power Dissipation NPN: 1.43W
- Power Dissipation PNP: 1.43W
- DC Current Gain hFE Min NPN: 180hFE
- DC Current Gain hFE Min PNP: 180hFE
- Continuous Collector Current NPN: 2.7A
- Continuous Collector Current PNP: 2.7A
- Collector Emitter Voltage Max NPN: 50V
- Collector Emitter Voltage Max PNP: 50V
| Delivery and price | |
|---|---|
| Units per pack | 10 |
| Price | 0.398 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
## **Important notice**
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the tradename **Nexperia** . Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use **http://www.nexperia.com**
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use **salesaddresses@nexperia.com** (email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved
Should be replaced with:
- **© Nexperia B.V. (year). All rights reserved** .
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via **salesaddresses@nexperia.com** ). Thank you for your cooperation and understanding,
Kind regards,
Team Nexperia
**==> picture [97 x 65] intentionally omitted <==**
## **PBSS4350SPN**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor Rev. 01 — 5 April 2007**
**Product data sheet**
## **1.**
## **1.1 General description**
NPN/PNP double low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium power Surface-Mounted Device (SMD) plastic package.
## **Table 1. Product overview**
|**Type number**|**Package**|**Package**|**NPN/NPN**<br>**complement**|**PNP/PNP**<br>**complement**|
|---|---|---|---|---|
||**NXP**|**Name**|||
|PBSS4350SPN|SOT96-1<br>SO8<br>PBSS4350SS<br>PBSS5350SS||||
## **1.2 Features**
- I Low collector-emitter saturation voltage VCEsat
- I High collector current capability IC and ICM
- I High collector current gain (hFE) at high IC
- I
- I Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
## **1.3 Applications**
- I Complementary MOSFET driver
- I Half and full bridge motor drivers
- I Dual low power switches (e.g. motors, fans)
- I Automotive
## **1.4 Quick reference data**
|**Table 2.**|**Quick reference data**|||||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|**TR1; NPN low VCEsat transistor**||||||||
|VCEO|collector-emitter voltage|open base||-|-|50|V|
|IC|collector current|||-|-|2.7|A|
|ICM|peak collector current|single pulse;||-|-|5|A|
|||tp≤1 ms||||||
|RCEsat|collector-emitter|IC= 2 A;|[1]|-|90|130|mΩ|
||saturation resistance|IB= 200 mA||||||
**==> picture [211 x 101] intentionally omitted <==**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**Table 2. Quick reference data** …continued
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**TR2; PNP low VCEsat transistor**||||||||
|VCEO|collector-emitter voltage|open base||-|-|−50|V|
|IC|collector current|||-|-|−2.7|A|
|ICM|peak collector current|single pulse;||-|-|−5|A|
|||tp≤1 ms||||||
|RCEsat|collector-emitter|IC=−2 A;|[1]|-|95|140|mΩ|
||saturation resistance|IB=−200 mA||||||
[1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
## **2. Pinning information**
**Table 3. Pinning**
|**Pin**|**Description**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Simplifed outline**|**Symbol**|**Symbol**|||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|1<br>2|emitter TR1<br>base TR1|8|||||||||5|||8|7|6|5||
|3|emitter TR2||||||||||||||||||
|4|base TR2|||||||||||||TR1||TR2|||
|5|collector TR2|1|||||||||4|||1|2|3|4||
|6|collector TR2||||||||||||||006aaa985||||
|7|collector TR1||||||||||||||||||
|8|collector TR1||||||||||||||||||
## **3. Ordering information**
## **Table 4. Ordering information**
|**Type number**|**Package**|**Package**|**Package**|
|---|---|---|---|
||**Name**|**Description**|**Version**|
|PBSS4350SPN|SO8<br>plastic small outline package; 8 leads; body width<br>3.9 mm<br>SOT96-1|||
## **4. Marking**
## **Table 5. Marking codes**
|**Type number**|**Marking code**|
|---|---|
|PBSS4350SPN|4350SPN|
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**2 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **5. Limiting values**
## **Table 6. Limiting values**
In accordance with the Absolute Maximum Rating System (IEC 60134).
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**Per transistor; for the PNP transistor**||**with negative polarity**|||||
|VCBO|collector-base voltage|open emitter||-|50|V|
|VCEO|collector-emitter voltage|open base||-|50|V|
|VEBO|emitter-base voltage|open collector||-|5|V|
|IC|collector current|||-|2.7|A|
|ICM|peak collector current|single pulse;||-|5|A|
|||tp≤1 ms|||||
|IB|base current|||-|0.5|A|
|Ptot|total power dissipation|Tamb≤25°C|[1]|-|0.55|W|
||||[2]|-|0.87|W|
||||[3]|-|1.43|W|
|**Per device**|||||||
|Ptot|total power dissipation|Tamb≤25°C|[1]|-|0.75|W|
||||[2]|-|1.2|W|
||||[3]|-|2|W|
|Tj|junction temperature|||-|150|°C|
|Tamb|ambient temperature|||−65|+150|°C|
|Tstg|storage temperature|||−65|+150|°C|
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm[2] .
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**3 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa967<br>2.5<br>Ptot<br>(W)<br>(1)<br>2.0<br>1.5<br>(2)<br>1.0<br>(3)<br>0.5<br>0<br>−75 −25 25 75 125 175<br>Tamb (°C)<br>**----- End of picture text -----**<br>
- (1) Ceramic PCB, Al2O3, standard footprint
- (2) FR4 PCB, mounting pad for collector 1 cm[2]
- (3) FR4 PCB, standard footprint
**Fig 1. Per device: Power derating curves**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1 **Product data sheet**
**Rev. 01 — 5 April 2007**
**4 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **6. Thermal characteristics**
## **Table 7. Thermal characteristics**
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**Per transistor**|||||||
|Rth(j-a)|thermal resistance from<br>junction to ambient|in free air|[1] -<br>[2] -|-<br>-|227<br>144|K/W<br>K/W|
||||[3] -|-|87|K/W|
|Rth(j-sp)|thermal resistance from||-|-|40|K/W|
||junction to solder point||||||
|**Per device**|||||||
|Rth(j-a)|thermal resistance from<br>junction to ambient|in free air|[1] -<br>[2] -|-<br>-|167<br>104|K/W<br>K/W|
||||[3] -|-|63|K/W|
- [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
- [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm[2] .
- [3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
**==> picture [481 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa809<br>10 [3]<br>duty cycle =<br>Zth(j-a)<br>(K/W) 1.0<br>0.75<br>10 [2] 0.5<br>0.33<br>0.2<br>0.1<br>10 0.05<br>0.02<br>0.01<br>0<br>1<br>10 [−][1]<br>10 [−][5] 10 [−][4] 10 [−][3] 10 [−][2] 10 [−][1] 1 10 10 [2] 10 [3]<br>tp (s)<br>**----- End of picture text -----**<br>
FR4 PCB, standard footprint
**Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**5 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
## **50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [481 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa810<br>10 [3]<br>duty cycle =<br>Zth(j-a)<br>(K/W)<br>1.0<br>10 [2] 0.75<br>0.5<br>0.33<br>0.2<br>0.1<br>10<br>0.05<br>0.02<br>0.01<br>1 0<br>10 [−][1]<br>10 [−][5] 10 [−][4] 10 [−][3] 10 [−][2] 10 [−][1] 1 10 10 [2] 10 [3]<br>tp (s)<br>**----- End of picture text -----**<br>
FR4 PCB, mounting pad for collector 1 cm[2]
**Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values**
**==> picture [481 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa811<br>10 [3]<br>Zth(j-a)<br>(K/W)<br>duty cycle =<br>10 [2]<br>1.0<br>0.75<br>0.5<br>0.33<br>0.2<br>10 0.1<br>0.05<br>0.02<br>0.01<br>0<br>1<br>10 [−][4] 10 [−][3] 10 [−][2] 10 [−][1] 1 10 10 [2] 10 [3]<br>tp (s)<br>**----- End of picture text -----**<br>
Ceramic PCB, Al2O3, standard footprint
**Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**6 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **7. Characteristics**
## **Table 8. Characteristics**
Tamb = 25 °
|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
|**TR1; NPN low VCEsat transistor**||
|ICBO<br>collector-base cut-off<br>current|VCB= 50 V; IE= 0 A<br>-<br>-<br>100<br>nA|
||VCB= 50 V; IE= 0 A;<br>Tj= 150°C<br>-<br>-<br>50<br>µA|
|ICES<br>collector-emitter<br>cut-off current|VCE= 50 V; VBE= 0 V<br>-<br>-<br>100<br>nA|
|IEBO<br>emitter-base cut-off<br>current|VEB= 5 V; IC= 0 A<br>-<br>-<br>100<br>nA|
|hFE<br>DC current gain|VCE= 2 V; IC= 100 mA<br>300<br>520<br>-|
||VCE= 2 V; IC= 500 mA<br>[1] 300<br>500<br>-|
||VCE= 2 V; IC= 1 A<br>[1] 300<br>470<br>-|
||VCE= 2 V; IC= 2 A<br>[1] 200<br>340<br>-|
||VCE= 2 V; IC= 2.7 A<br>[1] 120<br>180<br>-|
|VCEsat<br>collector-emitter<br>saturation voltage|[1]|
||IC= 0.5 A; IB= 50 mA<br>-<br>50<br>80<br>mV|
||IC= 1 A; IB= 50 mA<br>-<br>100<br>160<br>mV|
||IC= 2 A; IB= 100 mA<br>-<br>190<br>280<br>mV|
||IC= 2 A; IB= 200 mA<br>-<br>180<br>260<br>mV|
||IC= 2.7 A; IB= 270 mA<br>-<br>240<br>340<br>mV|
|RCEsat<br>collector-emitter<br>saturation resistance|IC= 2 A; IB= 200 mA<br>[1] -<br>90<br>130<br>mΩ|
|VBEsat<br>base-emitter<br>saturation voltage|[1]|
||IC= 2 A; IB= 100 mA<br>-<br>0.95<br>1.1<br>V|
||IC= 2.7 A; IB= 270 mA<br>-<br>1.1<br>1.2<br>V|
|VBEon<br>base-emitter turn-on<br>voltage|VCE= 2 V; IC= 1 A<br>[1] -<br>0.8<br>1.2<br>V|
|td<br>delay time|VCC= 10 V; IC= 2 A;<br>IBon= 100 mA;<br>IBoff=−100 mA<br>-<br>8<br>-<br>ns<br>-<br>96<br>-<br>ns<br>-<br>104<br>-<br>ns<br>-<br>355<br>-<br>ns<br>-<br>165<br>-<br>ns<br>-<br>520<br>-<br>ns|
|tr<br>rise time||
|ton<br>turn-on time||
|ts<br>storage time||
|tf<br>fall time||
|toff<br>turn-off time||
|Cc<br>collector capacitance|VCB= 10 V; IE= ie= 0 A;<br>f = 1 MHz<br>-<br>18<br>25<br>pF|
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**7 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**Table 8. Characteristics** …continued Tamb = 25 °C unless otherwise specified.
|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
|**TR2; PNP low VCEsat transistor**||
|ICBO<br>collector-base cut-off<br>current|VCB=−50 V; IE= 0 A<br>-<br>-<br>−100<br>nA|
||VCB=−50 V; IE= 0 A;<br>Tj= 150°C<br>-<br>-<br>−50<br>µA|
|ICES<br>collector-emitter<br>cut-off current|VCE=−50 V; VBE= 0 V<br>-<br>-<br>−100<br>nA|
|IEBO<br>emitter-base cut-off<br>current|VEB=−5 V; IC= 0 A<br>-<br>-<br>−100<br>nA|
|hFE<br>DC current gain|VCE=−2 V; IC=−100 mA<br>200<br>340<br>-|
||VCE=−2 V; IC=−500 mA<br>[1] 200<br>290<br>-|
||VCE=−2 V; IC=−1 A<br>[1] 180<br>250<br>-|
||VCE=−2 V; IC=−2 A<br>[1] 130<br>180<br>-|
||VCE=−2 V; IC=−2.7 A<br>[1] 95<br>135<br>-|
|VCEsat<br>collector-emitter<br>saturation voltage|[1]|
||IC=−0.5 A; IB=−50 mA<br>-<br>−60<br>−90<br>mV|
||IC=−1 A; IB=−50 mA<br>-<br>−125<br>−180<br>mV|
||IC=−2 A; IB=−100 mA<br>-<br>−225<br>−320<br>mV|
||IC=−2 A; IB=−200 mA<br>-<br>−190<br>−280<br>mV|
||IC=−2.7 A; IB=−270 mA<br>-<br>−255<br>−370<br>mV|
|RCEsat<br>collector-emitter<br>saturation resistance|IC=−2 A; IB=−200 mA<br>[1] -<br>95<br>140<br>mΩ|
|VBEsat<br>base-emitter<br>saturation voltage|[1]|
||IC=−2 A; IB=−100 mA<br>-<br>−0.95<br>−1.1<br>V|
||IC=−2.7 A; IB=−270 mA<br>-<br>−1<br>−1.2<br>V|
|VBEon<br>base-emitter turn-on<br>voltage|VCE=−2 V; IC=−1 A<br>[1] -<br>−0.8<br>−1.2<br>V|
|td<br>delay time|VCC=−10 V; IC=−2 A;<br>IBon=−100 mA;<br>IBoff= 100 mA<br>-<br>9<br>-<br>ns<br>-<br>54<br>-<br>ns<br>-<br>63<br>-<br>ns<br>-<br>190<br>-<br>ns<br>-<br>50<br>-<br>ns<br>-<br>240<br>-<br>ns|
|tr<br>rise time||
|ton<br>turn-on time||
|ts<br>storage time||
|tf<br>fall time||
|toff<br>turn-off time||
|Cc<br>collector capacitance|VCB=−10 V; IE= ie= 0 A;<br>f = 1 MHz<br>-<br>25<br>35<br>pF|
[1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1 **Product data sheet**
**Rev. 01 — 5 April 2007**
**8 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [233 x 209] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa968<br>1000<br>hFE<br>(1)<br>800<br>600 (2)<br>400<br>(3)<br>200<br>0<br>10 [−][1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA)<br>VCE = 2 V<br>**----- End of picture text -----**<br>
**==> picture [233 x 209] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa969<br>5<br>IB (mA) = 100 90<br>IC<br>(A) 80 70<br>4 60<br>50<br>40<br>30<br>3<br>20<br>10<br>2<br>1<br>0<br>0 0.4 0.8 1.2 1.6 2.0<br>VCE (V)<br>Tamb = 25 °C<br>**----- End of picture text -----**<br>
- (1) Tamb = 100 °C
- (2) Tamb = 25 °C
(3) Tamb = −55 °C **Fig 5. TR1 (NPN): DC current gain as a function of collector current; typical values**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa970<br>1.2<br>VBE<br>(V)<br>0.8 (1)<br>(2)<br>0.4 (3)<br>0<br>10 [−][1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>
## VCE = 2 V
- (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C
- **Fig 7. TR1 (NPN): Base-emitter voltage as a function of collector current; typical values**
**Fig 6. TR1 (NPN): Collector current as a function of collector-emitter voltage; typical values**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa971<br>1.4<br>VBEsat<br>(V)<br>1.0<br>(1)<br>(2)<br>0.6<br>(3)<br>0.2<br>10 [−][1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>
IC/IB = 20
- (1) Tamb = −55 °C
- (2) Tamb = 25 °C (3) Tamb = 100 °C
- **Fig 8. TR1 (NPN): Base-emitter saturation voltage as a function of collector current; typical values**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**9 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [497 x 479] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa972 006aaa973<br>1 1<br>VCEsat VCEsat<br>(V) (V)<br>10 [−][1] 10 [−][1]<br>(1) (1)<br>(2)<br>(2)<br>(3)<br>10 [−][2] 10 [−][2]<br>(3)<br>10 [−][3] 10 [−][3]<br>10 [−][1] 1 10 10 [2] 10 [3] 10 [4] 10 [−][1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA) IC (mA)<br>IC/IB = 20 Tamb = 25 °C<br>(1) Tamb = 100 °C (1) IC/IB = 100<br>(2) Tamb = 25 °C (2) IC/IB = 50<br>(3) Tamb = −55 °C (3) IC/IB = 10<br>Fig 9. TR1 (NPN): Collector-emitter saturation voltage Fig 10. TR1 (NPN): Collector-emitter saturation voltage<br>as a function of collector current; typical values as a function of collector current; typical values<br>006aaa974 006aaa975<br>10 [3] 10 [3]<br>RCEsat RCEsat<br>(Ω) (Ω)<br>10 [2] 10 [2]<br>(1)<br>10 10 (2)<br>(3)<br>1 (1) 1<br>(2)<br>(3)<br>10 [−][1] 10 [−][1]<br>10 [−][2] 10 [−][2]<br>10 [−][1] 1 10 10 [2] 10 [3] 10 [4] 10 [−][1] 1 10 10 [2] 10 [3] 10 [4]<br>IC (mA) IC (mA)<br>**----- End of picture text -----**<br>
IC/IB = 20
- (1) Tamb = 100 °C
- (2) Tamb = 25 °C
- (3) Tamb = −55 °C
**Fig 11. TR1 (NPN): Collector-emitter saturation resistance as a function of collector current; typical values**
- Tamb = 25 °C
- (1) IC/IB = 100
- (2) IC/IB = 50
- (3) IC/IB = 10
- **Fig 12. TR1 (NPN): Collector-emitter saturation resistance as a function of collector current; typical values**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**10 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
## **50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [497 x 581] intentionally omitted <==**
**----- Start of picture text -----**<br>
600 006aaa977 −5 006aaa978<br>IB (mA) = −140<br>IC −126<br>hFE (1) (A)−4 −−11298<br>−−8470 −42<br>400 (2) −3 −56 −28<br>−14<br>−2<br>200 (3)<br>−1<br>0 0<br>−10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4] 0 −0.4 −0.8 −1.2 −1.6 −2.0<br>IC (mA) VCE (V)<br>VCE = −2 V Tamb = 25 °C<br>(1) Tamb = 100 °C<br>(2) Tamb = 25 °C<br>(3) Tamb = −55 °C<br>Fig 13. TR2 (PNP): DC current gain as a function of Fig 14. TR2 (PNP): Collector current as a function of<br>collector current; typical values collector-emitter voltage; typical values<br>−1.2 006aaa979 −1.4 006aaa980<br>VBE VBEsat<br>(V) (V)<br>−0.8 (1) −1.0<br>(2) (1)<br>−0.4 (3) −0.6 (2)<br>(3)<br>0 −0.2<br>−10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4] −10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4]<br>IC (mA) IC (mA)<br>VCE = −2 V IC/IB = 20<br>(1) Tamb = −55 °C (1) Tamb = −55 °C<br>(2) Tamb = 25 °C (2) Tamb = 25 °C<br>(3) Tamb = 100 °C (3) Tamb = 100 °C<br>Fig 15. TR2 (PNP): Base-emitter voltage as a function Fig 16. TR2 (PNP): Base-emitter saturation voltage as a<br>of collector current; typical values function of collector current; typical values<br>**----- End of picture text -----**<br>
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**11 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
−1 006aaa981<br>VCEsat<br>(V)<br>−10 [−][1]<br>(1)<br>(2)<br>(3)<br>−10 [−][2]<br>−10 [−][3]<br>−10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>
IC/IB = 20
- (1) Tamb = 100 °C
- (2) Tamb = 25 °C (3) Tamb = −55 °C
- **Fig 17. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa983<br>10 [3]<br>RCEsat<br>(Ω)<br>10 [2]<br>10<br>(1)<br>1 (2)<br>(3)<br>10 [−][1]<br>10 [−][2]<br>−10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>
IC/IB = 20
- (1) Tamb = 100 °C
- (2) Tamb = 25 °C
- (3) Tamb = −55 °C
**Fig 19. TR2 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
−1 006aaa982<br>VCEsat<br>(V)<br>−10 [−][1]<br>(1)<br>(2)<br>−10 [−][2]<br>(3)<br>−10 [−][3]<br>−10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>
Tamb = 25 °C
- (1) IC/IB = 100
- (2) IC/IB = 50
- (3) IC/IB = 10
- **Fig 18. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values**
**==> picture [233 x 189] intentionally omitted <==**
**----- Start of picture text -----**<br>
006aaa984<br>10 [3]<br>RCEsat<br>(Ω)<br>10 [2]<br>(1)<br>10 (2)<br>(3)<br>1<br>10 [−][1]<br>10 [−][2]<br>−10 [−][1] −1 −10 −10 [2] −10 [3] −10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>
- Tamb = 25 °C
- (1) IC/IB = 100
- (2) IC/IB = 50
- (3) IC/IB = 10
- **Fig 20. TR2 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**12 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **8. Test information**
**==> picture [359 x 310] intentionally omitted <==**
**----- Start of picture text -----**<br>
IB<br>90 % input pulse<br>(idealized waveform)<br>IBon (100 %)<br>10 %<br>IBoff<br>output pulse<br>IC (idealized waveform)<br>90 %<br>IC (100 %)<br>10 %<br>t<br>td tr ts tf<br>ton toff 006aaa003<br>**----- End of picture text -----**<br>
**Fig 21.**
**==> picture [313 x 154] intentionally omitted <==**
**----- Start of picture text -----**<br>
VBB VCC<br>RB RC<br>(probe) Vo (probe)<br>oscilloscope oscilloscope<br>450 Ω 450 Ω<br>R2<br>VI DUT<br>R1<br>mlb826<br>VCC = 10 V; IC = 2 A; IBon = 100 mA; IBoff = −100 mA<br>Fig 22. TR1 (NPN): Test circuit for switching times<br>**----- End of picture text -----**<br>
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1 **Product data sheet**
**Rev. 01 — 5 April 2007**
**13 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
**==> picture [359 x 309] intentionally omitted <==**
**----- Start of picture text -----**<br>
−IB<br>90 % input pulse<br>(idealized waveform)<br>−IBon (100 %)<br>10 %<br>−IBoff<br>output pulse<br>−IC (idealized waveform)<br>90 %<br>−IC (100 %)<br>10 %<br>t<br>td tr ts tf<br>ton toff 006aaa266<br>**----- End of picture text -----**<br>
**Fig 23.**
**==> picture [314 x 154] intentionally omitted <==**
**----- Start of picture text -----**<br>
VBB VCC<br>RB RC<br>(probe) Vo (probe)<br>oscilloscope oscilloscope<br>450 Ω 450 Ω<br>R2<br>VI DUT<br>R1<br>mgd624<br>VCC = −10 V; IC = −2 A; IBon = −100 mA; IBoff = 100 mA<br>Fig 24. TR2 (PNP): Test circuit for switching times<br>**----- End of picture text -----**<br>
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1 **Product data sheet**
**Rev. 01 — 5 April 2007**
**14 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **9. Package outline**
**==> picture [236 x 164] intentionally omitted <==**
**----- Start of picture text -----**<br>
5.0<br>1.75<br>4.8<br>1.0<br>0.4<br>6.2 4.0<br>5.8 3.8<br>pin 1 index<br>0.49 0.25<br>1.27<br>0.36 0.19<br>Dimensions in mm 03-02-18<br>**----- End of picture text -----**<br>
**Fig 25. Package outline SOT96-1 (SO8)**
## **10. Packing information**
**Table 9. Packing methods** The indicated -xxx are the last three digits of the 12NC ordering code ~~.~~ [1]
|**Type number**<br>**Package**<br>**Description**|**Packing quantity**|**Packing quantity**|
|---|---|---|
||**1000**|**2500**|
|PBSS4350SPN<br>SOT96-1<br>8 mm pitch, 12 mm tape and reel|-115<br>-118||
[1] For further information and the availability of packing methods, see Section 14.
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1 **Product data sheet**
**Rev. 01 — 5 April 2007**
**15 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **11. Soldering**
**==> picture [397 x 524] intentionally omitted <==**
**----- Start of picture text -----**<br>
5.50<br>0.60 (8×)<br>1.30<br>4.00 6.60 7.00<br>1.27 (6×)<br>solder lands<br>occupied area placement accuracy ± 0.25 Dimensions in mm sot096-1_fr<br>Fig 26. Reflow soldering footprint SOT96-1 (SO8)<br>1.20 (2×)<br>0.60 (6×) 0.3 (2×) enlarged solder land<br>1.30<br>4.00 6.60 7.00<br>1.27 (6×)<br>5.50<br>board direction<br>solder lands solder resist<br>occupied area placement accurracy ± 0.25 Dimensions in mm sot096-1_fw<br>Fig 27. Wave soldering footprint SOT96-1 (SO8)<br>**----- End of picture text -----**<br>
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1 **Product data sheet**
**Rev. 01 — 5 April 2007**
**16 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **12. Revision history**
|**Table 10.**|**Revision**|**history**||||
|---|---|---|---|---|---|
|**Document**|**ID**|**Release date**|**Data sheet status**|**Change notice**|**Supersedes**|
|PBSS4350SPN_1||20070405|Product data sheet|-|-|
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**17 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **13. Legal information**
## **13.1 Data sheet status**
|**Document statu**|**s**<br>**[1]**<br>**[2]**<br>**Product status**<br>**[3]**<br>**Defnition**|
|---|---|
|Objective [short] data sheet<br>Development<br>This document contains data from the objective specifcation for product development.||
|Preliminary [short] data sheet<br>Qualifcation<br>This document contains data from the preliminary specifcation.||
|Product [short] data sheet<br>Production<br>This document contains the product specifcation.||
[1] Please consult the most recently issued document before initiating or completing a design.
[2]
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
## **13.2**
**Draft —** The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Short data sheet —** A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
## **13.3 Disclaimers**
**General —** Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
**Right to make changes —** NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
**Suitability for use —** NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
**Applications —** Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
**Limiting values —** the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
**Terms and conditions of sale —** NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
**No offer to sell or license —** Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
## **13.4 Trademarks**
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
## **14. Contact information**
For additional information, please visit: **http://www.nxp.com**
**salesaddresses@nxp.com**
© NXP B.V. 2007. All rights reserved.
PBSS4350SPN_1
**Product data sheet**
**Rev. 01 — 5 April 2007**
**18 of 19**
**PBSS4350SPN**
**NXP Semiconductors**
**50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor**
## **15. Contents**
|**1**|**Product profle . . . . . . . . . . . . . . . . . . . . . . . . . . 1**|
|---|---|
|1.1|General description. . . . . . . . . . . . . . . . . . . . . . 1|
|1.2|Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1|
|1.3|Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1|
|1.4|Quick reference data. . . . . . . . . . . . . . . . . . . . . 1|
|**2**|**Pinning information. . . . . . . . . . . . . . . . . . . . . . 2**|
|**3**|**Ordering information . . . . . . . . . . . . . . . . . . . . . 2**|
|**4**|**Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2**|
|**5**|**Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**6**|**Thermal characteristics. . . . . . . . . . . . . . . . . . . 5**|
|**7**|**Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 7**|
|**8**|**Test information. . . . . . . . . . . . . . . . . . . . . . . . 13**|
|**9**|**Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15**|
|**10**|**Packing information. . . . . . . . . . . . . . . . . . . . . 15**|
|**11**|**Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16**|
|**12**|**Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17**|
|**13**|**Legal information. . . . . . . . . . . . . . . . . . . . . . . 18**|
|13.1|Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18|
|13.2|Defnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|13.3|Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|13.4|Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|**14**|**Contact information. . . . . . . . . . . . . . . . . . . . . 18**|
|**15**|**Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19**|
**==> picture [151 x 121] intentionally omitted <==**
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
**© NXP B.V. 2007.**
**All rights reserved.**
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com **Date of release: 5 April 2007 Document identifier: PBSS4350SPN_1**
Updated at February 9, 2023
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