NVTR01P02LT1G

NTR1P02L, NVTR01P02L 

## MOSFET – Power, P-Channel, SOT-23 

## -20 V, -1.3 A 

These miniature surface mount MOSFETs low RDS(on) assure minimal power loss and conserve energy, making these devices ideal for use in space sensitive power management circuitry. Typical applications are DC−DC converters and power management in portable and battery−powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. 

## **Features** 

- Low RDS(on) Provides Higher Efficiency and Extends Battery Life 

- Miniature SOT−23 Surface Mount Package Saves Board Space 

- NVTR Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

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|**V(BR)DSS**|**RDS(on) Max**|**ID Max**|
|---|---|---|
|−20 V|220 m @ −4.5 V|−1.3 A|



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P−Channel<br>D<br>G<br>**----- End of picture text -----**<br>


- Pb−Free and Halide−Free Packages are Available 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise noted)|C unless otherwise noted)|C unless otherwise noted)||
|---|---|---|---|
|**Rating**|**Symbol**|**Value**|**Unit**|
|Drain−to−Source Voltage|VDSS|−20|V|
|Gate−to−Source Voltage − Continuous|VGS|±12|V|
|Drain Current<br>− Continuous @ TA= 25°C<br>− Pulsed Drain Current (tp ≤10 s)|ID<br>IDM|−1.3<br>−4.0|A<br>A|
|Total Power Dissipation @ TA= 25°C|PD<br>~~ee~~|400<br>~~ee~~|mW<br>~~ee~~|
|Operating and Storage Temperature Range<br>~~SS~~|TJ, Tstg<br>~~SS~~<br>~~ee~~|−55 to<br>150<br>~~SS~~<br>~~ee~~|°C<br>~~SS~~<br>~~ee~~|
|Thermal Resistance − Junction−to−Ambient<br>~~SS~~|R JA<br>~~SS~~<br>~~ee~~|300<br>~~SS~~<br>~~ee~~|°C/W<br>~~SS~~<br>~~ee~~|
|Maximum Lead Temperature for Soldering<br>Purposes, (1/8″from case for 10 s)<br>~~po~~|TL<br>~~ee~~<br>~~po~~|260<br>~~ee~~<br>~~po~~|°C<br>~~ee~~<br>~~po~~|



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S<br>MARKING DIAGRAM &<br>PIN ASSIGNMENT<br>3<br>Drain<br>3<br>1<br>2 P02 M<br>SOT−23<br>CASE 318<br>STYLE 21 1 2<br>Gate Source<br>P02 = Specific Device Code<br>M = Date Code*<br>= Pb−Free Package<br>(Note: Microdot may be in either location) e<br>*Date Code orientation may vary depending<br>upon manufacturing location.<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|NTR1P02LT1G|SOT−23<br>(Pb−Free)|3000 Tape & Reel|
|NTR1P02LT3G|SOT−23<br>(Pb−Free)|10,000 Tape &<br>Reel|
|NVTR01P02LT1G|SOT−23<br>(Pb−Free)|3000 Tape & Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

Publication Order Number: **NTR1P02LT1/D** 

**1** 

© Semiconductor Components Industries, LLC, 2001 **June, 2019 − Rev. 14** 

## **NTR1P02L, NVTR01P02L** 

## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERIS**|**TICS**(TA= 25°C unless otherwise not|ed)|||||
|---|---|---|---|---|---|---|
|**Parameter**|**Test Condition**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||||
|Drain−to−Source Breakdown Volt-<br>age|(VGS= 0 V, ID= −10�A)|V(BR)DSS|−20|||V|
|Zero Gate Voltage Drain Current|(VDS= −16 V, VGS= 0 V)<br>(VDS= −16 V, VGS= 0 V,<br>TJ= 125°C)|IDSS|||−1.0<br>−10|�A|
|Gate−Body Leakage Current|(VGS=±12 V, VDS= 0 V)|IGSS|||±100|nA|
|**ON CHARACTERISTICS**(Note 1)|||||||
|Gate Threshold Voltage|(VDS= VGS, ID= −250�A)|VGS(th)|−0.7|−1.0|−1.25|V|
|Static Drain−to−Source<br>On−Resistance|(VGS= −4.5 V, ID= −0.75 A)<br>(VGS= −2.5 V, ID= −0.5 A)|rDS(on)||0.140<br>0.200|0.22<br>0.35|�|
|**DYNAMIC CHARACTERISTICS**|||||||
|Input Capacitance|(VDS= −5.0 V)|Ciss||225||pF|
|Output Capacitance|(VDS= −5.0 V)|Coss||130|||
|Transfer Capacitance|(VDS= −5.0 V)|Crss||55|||
|**SWITCHING CHARACTERISTICS**|(Note 2)||||||
|Turn−On Delay Time|(VGS= −4.5 V, VDD= −5.0 V,<br>ID= −1.0 A, RL= 5.0�,<br>RG= 6.0�)|td(on)||7.0||ns|
|Rise Time||tr||15|||
|Turn−Off Delay Time||td(off)||18|||
|Fall Time||tf||9|||
|Total Gate Charge|(VDS= −16 V, ID= −1.5 A,<br>VGS= −4.5 V)|QT||3.1||nC|
|**SOURCE−DRAIN DIODE CHARACTERISTICS**|||||||
|Continuous Current||IS|||−0.6|A|
|Pulsed Current||ISM|||−0.75||
|Forward Voltage (Note 2)|(VGS= 0 V, IS= −0.6 A)|VSD|||−1.0|V|
|Reverse Recovery Time|(IS= −1.0 A, VGS= 0 V,<br>dIS/dt = 100 A/�s)|trr||16||ns|
|||ta||11|||
|||tb||5.5|||
|Reverse Recovery Stored Charge||QRR||8.5||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

1. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

2. Switching characteristics are independent of operating junction temperature. 

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**2** 

**NTR1P02L, NVTR01P02L** 

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3.0 3<br>2.2 V TJ = 25 ° C VDS ≥  5 V<br>2.5<br>VGS = 2.4 V to 3.0 V 2.0 V<br>2.0 2<br>1.5 1.8 V<br>TJ = 25 ° C<br>1.0 1<br>1.6 V<br>0.5 TJ = 100 ° C<br>1.4 V °<br>TJ = −55 C<br>1.2 V<br>0 0<br>0 1 2 3 4 5 1.0 1.5 2.0 2.5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.30 0.30<br>ID = 1.0 A TJ = 25 ° C<br>TJ = 25 ° C 0.25<br>0.25<br>VGS = 2.5 V<br>0.20<br>0.20 0.15 VGS = 4.5 V<br>0.10<br>0.15<br>0.05<br>0.10 0<br>0 2 4 6 8 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1.6 1000<br>VGS = 0 V<br>1.4 ID = 0.75 A TJ = 125 ° C<br>VGS = 4.5 V 100<br>1.2 TJ = 100 ° C<br>10<br>1.0<br>1<br>0.8<br>0.1<br>0.6<br>TJ = 25 ° C<br>0.4 0.01<br>−50 −25 0 25 50 75 100 125 150 1 6 11 16<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED) IDSS<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

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**3** 

**NTR1P02L, NVTR01P02L** 

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400 5<br>VGS = 0 V Q T<br>TJ = 25 ° C<br>4<br>300<br>C iss 3<br>200 Qgs Qgd<br>Coss 2<br>100 VDS = 16 V<br>Crss 1 ID = 1.5 A<br>TJ = 25 ° C<br>0 0<br>0 5 10 15 20 25 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)<br>Figure 7. Capacitance Variation Figure 8. Gate−to−Source and<br>Drain−to−Source Voltage vs. Total Charge<br>100 1.0<br>VIDDD = 9 A = 48 V 0.9 VTJGS = 25= 0 V ° C<br>V GS  = 4.5 V td(off) 0.8<br>t f 0.7<br>tr<br>0.6<br>10 0.5<br>td(on)<br>0.4<br>0.3<br>0.2<br>0.1<br>1 0<br>1 10 100 0 0.5 1.0<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**Figure 10. Diode Forward Voltage vs. Current** 

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100<br>10<br>1 100  � s<br>1 ms<br>0.1 VGS = 12 V 10 ms<br>Single Pulse<br>TC = 25 ° C dc<br>0.01 RDS(on) Limit<br>Thermal Limit<br>Package Limit<br>0.001<br>0.1 1 10 100<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

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**4** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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SOT−23 (TO−236)<br>CASE 318−08<br>ISSUE AS<br>2 DATE 30 JAN 2018<br>SCALE 4:1<br>D NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.<br>0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF<br>“a 3 t = THE BASE MATERIAL.<br>| E HE T 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.<br>1 2<br>MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>L A 0.89 1.00 1.11 0.035 0.039 0.044<br>3X b L1 A1b 0.010.37 0.060.44 0.100.50 0.0000.015 0.0020.017 0.0040.020<br>e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008<br>TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120<br>E 1.20 1.30 1.40 0.047 0.051 0.055<br>e 1.78 1.90 2.04 0.070 0.075 0.080<br>L 0.30 0.43 0.55 0.012 0.017 0.022<br>A L1 0.35 0.54 0.69 0.014 0.021 0.027<br>H E 2.10 2.40 2.64 0.083 0.094 0.104<br>= T 0 ° −−− 10 ° 0 ° −−− 10 °<br>a A1 SIDE VIEW SEE VIEW C c<br>GENERIC<br>END VIEW<br>MARKING DIAGRAM*<br>RECOMMENDED<br>SOLDERING FOOTPRINT XXXM<br>1<br>2.90 i 0.903X XXX = Specific Device Code oo<br>M = Date Code<br>= Pb−Free Package<br>LO | cr ,<br>*This information is generic. Please refer to<br>3X 0.80 a) LL 0.95 device data sheet for actual part marking.<br>PITCH Pb−Free indicator, “G” or microdot “ ”, |<br>DIMENSIONS: MILLIMETERS may or may not be present.<br>STYLE 1 THRU 5: STYLE 6: STYLE 7: STYLE 8:<br>CANCELLED PIN 1. BASE PIN 1. EMITTER PIN 1. ANODE<br>2. EMITTER 2. BASE 2. NO CONNECTION<br>3. COLLECTOR 3. COLLECTOR 3. CATHODE<br>STYLE 9: STYLE 10: STYLE 11: STYLE 12: STYLE 13: STYLE 14:<br>PIN 1. ANODE PIN 1. DRAIN PIN 1. ANODE PIN 1. CATHODE PIN 1. SOURCE PIN 1. CATHODE<br>2. ANODE 2. SOURCE 2. CATHODE 2. CATHODE 2. DRAIN 2. GATE<br>3. CATHODE 3. GATE 3. CATHODE−ANODE 3. ANODE 3. GATE 3. ANODE<br>STYLE 15: STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:<br>PIN 1. GATE PIN 1. ANODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE<br>2. CATHODE 2. CATHODE 2. ANODE 2. CATHODE 2. ANODE 2. ANODE<br>3. ANODE 3. CATHODE 3. CATHODE 3. ANODE 3. CATHODE−ANODE 3. GATE<br>STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: STYLE 26:<br>PIN 1. GATE PIN 1. RETURN PIN 1. ANODE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE<br>2. SOURCE 2. OUTPUT 2. ANODE  2. DRAIN  2. CATHODE  2. ANODE<br>3. DRAIN 3. INPUT 3. CATHODE  3. SOURCE  3. GATE  3. NO CONNECTION<br>STYLE 27: STYLE 28:<br>PIN 1. CATHODE PIN 1. ANODE<br> 2. CATHODE  2. ANODE<br> 3. CATHODE  3. ANODE<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98ASB42226B Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: SOT−23 (TO−236) PAGE 1 OF 1<br>aes<br>ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.<br>ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding<br>the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically<br>disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the<br>rights of others.<br>**----- End of picture text -----**<br>


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**1**