NVMYS1D3N04CTWG

## NVMYS1D3N04C MOSFET – Power, Single N-Channel ~~—~~ 40 V, 1.15 m 252 A 

## **Features** 

- Small Footprint (5x6 mm) for Compact Design 

## **www.onsemi.com** 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

- LFPAK4 Package, Industry Standard 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free and are RoHS Compliant 

**V(BR)DSS RDS(ON) MAX ID MAX** 40 V 1.15 m @ 10 V 252 A ~~ee~~ 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

D (5,8) ~~ee~~ **Parameter Symbol** ~~ee~~ **Value Unit** Drain−to−Source Voltage VDSS 40 V ~~eeee ee~~ Gate−to−Source Voltage VGS ± 20 V ~~ee~~ Continuous Drain Steady TC = 25 ° C ID 252 A G (4) Current R(Notes 1, 3)JC State TC = 100 ° C 178 Power Dissipation TC = 25 ° C PD 134 W S (1,2,3) R JC (Note 1) TC = 100 ° C 67 **N−CHANNEL MOSFET** ~~SFE=—7—s—&~~ Continuous Drain Steady TA = 25 ° C ID 43 A Current R(Notes 1, 2, 3)JA State TA = 100 ° C 30 **MARKING DIAGRAM** Power Dissipation TA = 25 ° C PD 3.9 W D R JA (Notes 1, 2) TA = 100 ° C 1.9 ~~Fer ae~~ Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 900 A 1D3N04C Operating Junction and Storage Temperature TJ, Tstg −55 to ° C **LFPAK4** AWLYW + 175 **CASE 760AB** Source Current (Body Diode) IS 112 A 1 ~~ee ee ee PRE~~ S S S G Single Pulse Drain−to−Source Avalanche EAS 1621 mJ Energy (IL(pk) = 21 A) 1D3N04C = Specific Device Code ~~ee~~ A = Assembly Location Lead Temperature for Soldering Purposes TL 260 ° C WL = Wafer Lot ~~—(~~ (1/8 ″ from case for 10 s) Y = Year Stresses exceeding those listed in the Maximum Ratings table may damage the ~~pO ee|eee~~ W = Work Week device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

||~~ee~~|~~ee~~||
|---|---|---|---|
|**Parameter**<br>~~ee~~|**Symbol**<br>~~ee~~<br>~~ee~~|**Value**<br>~~ee~~<br>~~ee~~|**Unit**<br>~~ee~~|
|Junction−to−Case − Steady State|R JC<br>~~ee ~~|1.12<br> ~~ee~~|°C/W|
|Junction−to−Ambient − Steady State (Note 2)|R JA|39||



## **ORDERING INFORMATION** 

See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NVMYS1D3N04C/D** 

**1** 

© Semiconductor Components Industries, LLC, 2018 **July, 2019 − Rev. 1** 

## **NVMYS1D3N04C** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||20||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||100||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 180�A||2.5||3.5|V|
|Threshold Temperature Coefficient|VGS(TH)/TJ||||−8.0||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 50 A||0.96|1.15|m�|
|Forward Transconductance|gFS|VDS=15 V, ID= 50 A|||143||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 25 V|||4855||pF|
|Output Capacitance|COSS||||2565|||
|Reverse Transfer Capacitance|CRSS||||71|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 32 V; ID= 50 A|||75||nC|
|Threshold Gate Charge|QG(TH)|VGS= 10 V, VDS= 32 V; ID= 50 A|||12|||
|Gate−to−Source Charge|QGS||||20|||
|Gate−to−Drain Charge|QGD||||17|||
|Plateau Voltage|VGP||||4.4||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 32 V,<br>ID= 50 A, RG= 2.5�|||15||ns|
|Rise Time|tr||||22|||
|Turn−Off Delay Time|td(OFF)||||48|||
|Fall Time|tf||||16|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 50 A|TJ= 25°C||0.8|1.2|V|
||||TJ= 125°C||0.6|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 50 A|||70||ns|
|Charge Time|ta||||40|||
|Discharge Time|tb||||30|||
|Reverse Recovery Charge|QRR||||105||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVMYS1D3N04C** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
360 360<br>VGS = 6.5 V to 10 V 5.5 V<br>320 320 V DS  = 10 V<br>6.0 V<br>280 280<br>240 240<br>200 200<br>160 4.8 V 160<br>120 120 TJ = 25 ° C<br>80 4.5 V 80<br>400 4.0 V 400 T J  = 125 ° C TJ = −55 ° C<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>50 6<br>45 T J  = 25 ° C TJ = 25 ° C<br>5<br>40 ID = 50 A<br>35<br>4<br>30<br>25 3<br>20<br>2<br>15<br>10 VGS = 10 V<br>1<br>5<br>0 0<br>4 5 6 7 8 9 10 10 30 50 70 90 110 130 150<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>2.0 1E+06<br>V GS  = 10 V<br>1.8 I D  = 50 A 1E+05 TJ = 150 ° C<br>1.6 T J  = 125 ° C<br>1E+04<br>1.4 1E+03 TJ = 85 ° C<br>1.2<br>1.0 1E+02 TJ = 25 ° C<br>0.8 1E+01<br>0.6 1E+00<br>−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, NORMALIZED DRAIN−TO−<br>SOURCE RESISTANCE , LEAKAGE CURRENT (nA)<br>DS(on) IDSS<br>R<br>**----- End of picture text -----**<br>


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**3** 

**NVMYS1D3N04C** 

## **TYPICAL CHARACTERISTICS** 

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10K<br>CISS<br>COSS<br>1K<br>100<br>VGS = 0 V CRSS<br>TJ = 25 ° C<br>f = 1 MHz<br>10<br>0 5 10 15 20 25 30 35 40<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 7. Capacitance Variation<br>1000<br>td(off)d(off)<br>tff<br>100 trr<br>td(on)d(on)<br>10<br>VGS = 10 VVGS = 10 V<br>VGS = 10 V DS  = 32 V = 10 V<br>I D  = 50 A<br>1<br>0 10 20 30 40 50 60<br>C, CAPACITANCE (pF)<br>t, SWITCHING TIME (ns)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
10<br>9<br>8<br>7<br>6<br>QGS QGD<br>5<br>4<br>3<br>2 VTJ DS  = 25= 32 V ° C<br>1 I D  = 50 A<br>0<br>0 10 20 30 40 50 60 70<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


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QG, TOTAL GATE CHARGE (nC)<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source Voltage vs. Total Charge** 

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**----- Start of picture text -----**<br>
1000 100<br>VGS = 0 V<br>td(off)d(off)<br>tff<br>100 trr 10<br>td(on)d(on)<br>10 1<br>VGS = 10 VVGS = 10 V DS  = 32 V = 10 V TJ = 125 ° C<br>I D  = 50 A TJ = 25 ° C TJ = −55 ° C<br>1 0.1<br>0 10 20 30 40 50 60 0.2 0.4 0.6 0.8 1.0 1.2<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000 1000<br>T J(initial)  = 25 ° C<br>100 100<br>10  � s<br>10 TC = 25 ° C 10<br>Single Pulse TJ(initial) = 100 ° C<br>0.5 ms<br>VGS ≤  10 V 1 ms<br>1 10 ms 1<br>RDS(on) Limit<br>Thermal Limit<br>Package Limit<br>0.1 0.1<br>0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TAV, TIME IN AVALANCHE (S)<br>t, SWITCHING TIME (ns) , SOURCE CURRENT (A)IS<br>, DRAIN CURRENT (A)<br>, DRAIN CURRENT(A)<br>ID<br>IPEAK<br>**----- End of picture text -----**<br>


**Figure 12. Maximum Drain Current vs. Time in Avalanche** 

**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

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**4** 

**NVMYS1D3N04C** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
100<br>Duty Cycle = 0.5<br>10 0.2<br>0.1<br>0.05<br>1 0.02<br>0.01<br>0.1<br>0.01<br>Single Pulse<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>t, PULSE TIME (s)<br>C/W)<br>°<br>, EFFECTIVE TRANSIENT<br>JC(t)<br>�<br>R THERMAL RESISTANCE (<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

## **DEVICE ORDERING INFORMATION** 

|**Device**|**Marking**|**Package**|**Shipping**†|
|---|---|---|---|
|NVMYS1D3N04CTWG|1D3N04C|LFPAK4<br>(Pb−Free)|3000 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

## MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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LFPAK4 5x6<br>**----- End of picture text -----**<br>


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CASE 760AB<br>ISSUE C<br>**----- End of picture text -----**<br>


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DATE 19 NOV 2019<br>**----- End of picture text -----**<br>


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GENERIC<br>XXXXXX = Specific Device Code<br>MARKING DIAGRAM*<br>A = Assembly Location<br>——— WL = Wafer Lot<br>Y = Year<br>XXXXXX W = Work Week<br>XXXXXX<br>*This information is generic. Please refer<br>AWLYW<br>to device data sheet for actual part<br>marking. Some products may not follow<br>the Generic Marking.<br>**----- End of picture text -----**<br>


## **DOCUMENT NUMBER:** 

## **98AON82777G DESCRIPTION: LFPAK4 5x6** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**PAGE 1 OF 1** 

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