NVMFS6H818NT1G

## NVMFS6H818N 

## Power MOSFET **80 V, 3.7 m 123 A, Single N−Channel** 

## **Features** 

- Small Footprint (5x6 mm) for Compact Design 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

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- NVMFS6H818NWF − Wettable Flank Option for Enhanced Optical Inspection 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free and are RoHS Compliant 

**V(BR)DSS RDS(ON) MAX ID MAX** 80 V 3.7 m @ 10 V 123 A ~~ee ee~~ 

## **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

~~es~~ **Parameter** ~~Gs~~ **Symbol Value Unit** D (5,6) Drain−to−Source Voltage VDSS 80 V ~~a~~ Gate−to−Source Voltage VGS ± 20 V Continuous Drain TC = 25 ° C ID 123 A ~~EE~~ Current R(Notes 1, 3)JC Steady TC = 100 ° C 87 G (4) ~~=e~~ Power DissipationR JC (Note 1) State TTCC = 100 = 25 °° CC PD 13668 W **N−CHANNEL MOSFET** ~~3~~ S (1,2,3) Continuous Drain TA = 25 ° C ID 20 A ~~oo~~ Current R(Notes 1, 2, 3)JA Steady TA = 100 ° C 14 Power Dissipation State TA = 25 ° C PD 3.8 W R JA (Notes 1 & 2) TA = 100 ° C 1.9 ~~ee——) FE~~ 1 Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 900 A S Operating Junction and Storage Temperature TJ, Tstg −55 to+ 175 ° C **(SO−8FL)DFN5** SSS ~~So~~ **CASE 488AA** G Source Current (Body Diode) IS 113 A **STYLE 1** ~~es~~ Single Pulse Drain−to−Source Avalanche EAS 731 mJ XXXXXX = 6H818N ~~ee~~ Energy (IL(pk) = 9.3 A) XXXXXX = (NVMFS6H818N) or Lead Temperature for Soldering Purposes TL 260 ° C XXXXXX = 818NWF 818NWF (1/8 ″ from case for 10 s) XXXXXX = (NVMFS6H818NWF) ~~ee ee~~ ~~**e** e ee~~ 

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MARKING<br>DIAGRAM<br>D<br>1 ee<br>S D<br>DFN5 XXXXXX<br>(SO−8FL)DFN5 SSS AYWZZ<br>CASE 488AA G D<br>STYLE 1 D<br>XXXXXX = 6H818N<br>XXXXXX = (NVMFS6H818N) or<br>XXXXXX = 818NWF 818NWF<br>XXXXXX = (NVMFS6H818NWF)<br>A = Assembly Location<br>Y = Year<br>W = Work Week<br>ZZ = Lot Traceability<br>**----- End of picture text -----**<br>


Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

~~a~~ **Parameter Symbol Value Unit** Junction−to−Case − Steady State R JC 1.1 ° C/W Junction−to−Ambient − Steady State (Note 2) R JA 39 

## **ORDERING INFORMATION** 

See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NVMFS6H818N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2017 **August, 2017 − Rev. 1** 

## **NVMFS6H818N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|80|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||39||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 80 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||100||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 190�A||2.0||4.0|V|
|Threshold Temperature Coefficient|VGS(TH)/TJ||||7.0||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 20 A||3.1|3.7|m�|
|Forward Transconductance|gFS|VDS=15 V, ID= 50 A|||170||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 40 V|||3100||pF|
|Output Capacitance|COSS||||440|||
|Reverse Transfer Capacitance|CRSS||||20|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 40 V; ID= 50 A|||46||nC|
|Threshold Gate Charge|QG(TH)|VGS= 10 V, VDS= 40 V; ID= 50 A|||9.0|||
|Gate−to−Source Charge|QGS||||15|||
|Gate−to−Drain Charge|QGD||||8.0|||
|Plateau Voltage|VGP||||5.0||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 64 V,<br>ID= 50 A, RG= 2.5�|||22||ns|
|Rise Time|tr||||98|||
|Turn−Off Delay Time|td(OFF)||||49|||
|Fall Time|tf||||21|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 20 A|TJ= 25°C||0.8|1.2|V|
||||TJ= 125°C||0.7|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 50 A|||63||ns|
|Charge Time|ta||||31|||
|Discharge Time|tb||||32|||
|Reverse Recovery Charge|QRR||||55||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVMFS6H818N** 

## **TYPICAL CHARACTERISTICS** 

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250 250<br>5.5 to 10 V 5.0 V VDS = 10 V<br>200 200<br>150 150<br>100 4.5 V 100<br>TJ = 25 ° C<br>50 50<br>VGS = 4.0 V TJ = 125 ° C TJ = −55 ° C<br>0 0<br>0 1 2 3 4 5 6 7 8 2 3 4 5 6 7<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>16 5.0<br>14 TI DJ  = 25 = 20 A ° C 4.5 TJ = 25 ° C<br>12<br>4.0<br>10<br>3.5<br>8 VGS = 10 V<br>3.0<br>6<br>2.5<br>4<br>2 2.0<br>4 5 6 7 8 9 10 5 10 15 20 25 30 35 40 45 50<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>2.6 1M<br>2.4 ID = 20 A TJ = 175 ° C<br>2.2 VGS = 10 V 100K TJ = 150 ° C<br>2.0<br>1.8 10K TJ = 125 ° C<br>1.6<br>1.4 1K TJ = 85 ° C<br>1.2<br>100<br>1.0<br>T J  = 25 ° C<br>0.8 10<br>0.6<br>0.4 1<br>−50 −25 0 25 50 75 100 125 150 175 5 15 25 35 45 55 65 75<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>IDSS<br>, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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**NVMFS6H818N** 

## **TYPICAL CHARACTERISTICS** 

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10K<br>C iss<br>1K<br>C oss<br>100<br>T J  = 25 ° C<br>Vf = 1 MHzGS = 0 V Crss<br>10<br>0 10 20 30 40 50 60 70 80<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

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10<br>9<br>8<br>7<br>6 Qgs Qgd<br>5<br>4<br>3<br>2 V DS  = 40 V<br>ID = 50 A<br>1 TJ = 25 ° C<br>0<br>0 5 10 15 20 25 30 35 40 45 50<br>Qg, TOTAL GATE CHARGE (nC)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source vs. Total Charge** 

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1000<br>V GS  = 10 V<br>VDS = 64 V<br>I D  = 50 A<br>100 tr<br>t d(off)<br>td(on)<br>tf<br>10<br>1 10 100<br>RG, GATE RESISTANCE ( � )<br>t, TIME (ns)<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

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100<br>V GS  = 0 V<br>10<br>TJ = 125 ° C TJ = 25 ° C TJ = −55 ° C<br>1<br>0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 10. Diode Forward Voltage vs. Current** 

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1000<br>100<br>10 TC = 25 ° C 10  � s<br>V GS ≤  10 V<br>Single Pulse 0.5 ms<br>1 1 ms<br>RDS(on) Limit 10 ms<br>Thermal Limit<br>Package Limit<br>0.1<br>0.1 1 10 100 1000<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

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100<br>TJ(initial) = 25 ° C<br>10<br>TJ(initial) = 100 ° C<br>1<br>0.0001 0.001 0.01<br>TIME IN AVALANCHE (s)<br> (A)<br>IPEAK<br>**----- End of picture text -----**<br>


**Figure 12. Maximum Drain Current vs. Time in Avalanche** 

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**4** 

**NVMFS6H818N** 

## **TYPICAL CHARACTERISTICS** 

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100<br>50% Duty Cycle<br>20%<br>10<br>10%<br>5%<br>1 2%<br>1%<br>0.1<br>0.01<br>Single Pulse<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br>(t) (<br>JA<br>�<br>R<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

## **DEVICE ORDERING INFORMATION** 

|**Device**|**Marking**|**Package**|**Shipping**†|
|---|---|---|---|
|NVMFS6H818NT1G|6H818N|DFN5<br>(Pb−Free)|1500 / Tape & Reel|
|NVMFS6H818NWFT1G|818NWF|DFN5<br>(Pb−Free, Wettable Flanks)|1500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

**NVMFS6H818N** 

## **PACKAGE DIMENSIONS** 

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DFN5 5x6, 1.27P<br>2 X CASE 488AA (SO−8FL) NOTES:1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ISSUE M ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>D < A a 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>4 f e ct = A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.00 5.15 5.30<br>2 D1 4.70 4.90 5.10<br>c D2 3.80 4.00 4.20<br>A1 E 6.00 6.15 6.30<br>E1 5.70 5.90 6.10<br>1 2 3 4 E2 3.45 3.65 3.85<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.575 0.71<br>C K 1.20 1.35 1.50<br>SEATING L 0.51 0.575 0.71<br>0.10 C DETAIL A PLANE L1 0.125 REF<br>~ | or M 3.00 3.40 3.80<br>A 0  −−− 12<br>0.10 C STYLE 1:<br>ace SIDE VIEW DETAIL A SOLDERING FOOTPRINT*RECOMMENDED === PIN 1. 2. 3. SOURCESOURCESOURCE<br>2X  4. GATE<br>0.495 4.560  5. DRAIN<br>8X b<br>2X<br>0.10 C A B e/2 1.530<br>0.05 c<br>L e<br>1 4<br>3.200<br>K<br>4.530<br>E2<br>(EXPOSED PAD)PIN 5 L1 M 2X 1.330<br>0.905<br>a l a 1<br>G D2 0.965<br>Pov a r p 4X e g<br>BOTTOM VIEW 1.000 1.270<br>4X 0.750 aaa PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>**----- End of picture text -----**<br>


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**6** 

**NVMFS6H818N/D**