NVMFS5C638NLT1G

**DATA SHEET www.onsemi.com** ~~a~~ 

## MOSFET – Power, Single ~~—___—~~ N-Channel 60 V, 3.0 m 133 A NVMFS5C638NL 

## **Features** 

- Small Footprint (5x6 mm) for Compact Design 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

- NVMFS5C638NLWF − Wettable Flank Option for Enhanced Optical Inspection 

- AEC−Q101 Qualified and PPAP Capable 

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V(BR)DSS RDS(ON) MAX ID MAX<br>eeee<br>3.0 m  @ 10 V<br>60 V 133 A<br>4.2 m  @ 4.5 V<br>D (5)<br>G (4)<br>S (1,2,3)<br>**----- End of picture text -----**<br>


**N−CHANNEL MOSFET** 

- These Devices are Pb−Free and are RoHS Compliant 

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|||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
|MARKING|
|MAXIMUM RATINGS|(TJ = 25C unless otherwise noted)|DIAGRAMS|
|Parameter|Symbol|Value|Unit|D|
|1|
|S|D|
|Drain−to−Source Voltage|VDSS|60|V|
|DFN5|S|XXXXXX|
|Gate−to−Source Voltage|VGS|20|V|(SO−8FL)|S|AYWZZ|
||CASE 488AA|G|D|
|ee|Continuous Drain Current R(Notes 1, 3)JC|Steady|ee|TTCC = 100 = 25|CC|ID|13394|A|STYLE 1|aa|DD|
|Power Dissipation|State|TC = 25C|PD|100|W|S|D|
|R|JC (Note 1)|TC = 100C|50|SS|XXXXXXAYWZZ|
|||Continuous Drain|FEF|TA = 25C|ID|26|A|>|DFN5W|G|D|
|Current R(Notes 1, 2, 3)JA|Steady|TA = 100C|18|CASE 507BA(SO8FL WF)|D|
|Power Dissipation|State|TA = 25C|PD|4|W|
|R|JA (Notes 1 & 2)|TA = 100C|2|XXXXXX = 5C638L|
|re|—|
|pf|Pulsed Drain Current|TA = 25C, tp = 10 s|IDM|811|A|XXXXXX =XXXXXX = (NVMFS5C638NL) or 638LWF|
|Operating Junction and Storage Temperature|Pa|TJ, Tstg|−55 to|C|XXXXXX = (NVMFS5C638NLWF)|
|+ 175|A|= Assembly Location|
|Po|Y|= Year|
|a|Source Current (Body Diode)|IS|84|A|W|= Work Week|
|Single Pulse Drain−to−Source Avalanche|EAS|180|mJ|ZZ|= Lot Traceability|
|Energy (IL(pk) = 13 A)|
|ee|Lead Temperature for Soldering Purposes|ee|TL|ee|260|C|ee|
|(1/8 from case for 10 s)|ORDERING INFORMATION|
|eeee|eee|See detailed ordering, marking and shipping information on|
|Stresses exceeding those listed in the Maximum Ratings table may damage the|
|page 5 of this data sheet.|
|device. If any of these limits are exceeded, device functionality should not be|
|assumed, damage may occur and reliability may be affected.|

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## **THERMAL RESISTANCE MAXIMUM RATINGS** 

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||||||
|---|---|---|---|---|
|a|Parameter|Symbol|Value|Unit|
|Junction−to−Case − Steady State|R|JC|1.5|C/W|
|Junction−to−Ambient − Steady State (Note 2)|R|JA|40.1|

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1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NVMFS5C638NL/D** 

**1** 

 Semiconductor Components Industries, LLC, 2017 **July, 2023 − Rev. 1** 

## **NVMFS5C638NL** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25C unless otherwise specified) 

|**Parameter**|**Symbol**|**Test Condition**|**Test Condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|60|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||26||mV/C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 60 V|TJ= 25C|||10|�A|
||||TJ= 125C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||1.2||2.0|V|
|Threshold Temperature Coefficient|VGS(TH)/TJ||||−5.0||mV/C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 50 A||2.6|3.0|m�|
|||VGS= 4.5 V|ID= 50 A||3.6|4.2||
|Forward Transconductance|gFS|VDS=15 V, ID= 50 A|||130||S|
|**CHARGES AND CAPACITANCES**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 25 V|||2880||pF|
|Output Capacitance|COSS||||1680|||
|Reverse Transfer Capacitance|CRSS||||22|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 48 V; ID= 50 A|||18.4||nC|
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 48 V; ID= 50 A|||40.7||nC|
|Threshold Gate Charge|QG(TH)|VGS= 10 V, VDS= 48 V; ID= 50 A|||4.5||nC|
|Gate−to−Source Charge|QGS||||8.6|||
|Gate−to−Drain Charge|QGD||||3.8|||
|Plateau Voltage|VGP||||3.0||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 48 V,<br>ID= 50 A, RG= 1�|||15||ns|
|Rise Time|tr||||58|||
|Turn−Off Delay Time|td(OFF)||||66|||
|Fall Time|tf||||96|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 50 A|TJ= 25C||0.84|1.2|V|
||||TJ= 125C||0.73|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt = 100 A/�s,<br>IS= 50 A|||42||ns|
|Charge Time|ta||||21|||
|Discharge Time|tb||||22|||
|Reverse Recovery Charge|QRR||||28||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVMFS5C638NL** 

## **TYPICAL CHARACTERISTICS** 

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120<br>120 3.6 V to 10 V<br>100<br>100<br>3.2 V<br>80<br>80<br>3.0 V 60<br>60<br>40 2.8 V 40 T J  = 25C<br>20 20<br>T J  = 125C TJ = −55C<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>20 6<br>18 TJ = 25C TJ = 25C<br>ID = 50 A 5<br>16<br>14 4 VGS = 4.5 V<br>12<br>3 V GS  = 10 V<br>10<br>8 2<br>6<br>1<br>4<br>2 0<br>2 3 4 5 6 7 8 9 10 10 30 50 70 90 110 130 150<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>100K<br>2.0 VGS = 10 V<br>ID = 50 A TJ = 150C<br>1.8<br>10K TJ = 125C<br>1.6<br>1.4<br>1K TJ = 85C<br>1.2<br>1.0 100<br>0.8<br>0.6 10<br>−50 −25 0 25 50 75 100 125 150 175 5 15 25 35 45 55<br>TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

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**3** 

**NVMFS5C638NL** 

## **TYPICAL CHARACTERISTICS** 

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10K 10<br>CISS 9<br>1K C OSS 8<br>7<br>6<br>100 5<br>4 QGS QGD<br>3<br>10 VGS = 0 V 2 V DS  = 48 V<br>Tf = 1 MHzJ = 25  C CRSS 1 T IDJ = 50 A  = 25C<br>1 0<br>0 10 20 30 40 50 60 0 5 10 15 20 25 30 35 40<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

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1K<br>td(off)<br>tf<br>100 tr<br>t d(on)<br>10<br>V GS  = 10 V<br>VDS = 48 V<br>1<br>1 11 21 31 41<br>t, TIME (ns)<br>**----- End of picture text -----**<br>


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RG, GATE RESISTANCE ( � )<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**Figure 8. Gate−to−Source Voltage vs. Total Charge** 

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50<br>VGS = 0 V<br>40<br>30<br>20<br>10<br>TJ = 125C TJ = 25C TJ = −55C<br>0<br>0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


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VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 10. Diode Forward Voltage vs. Current** 

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1000 100<br>100 10  � s T J  (initial) = 25C<br>10 TC = 25C 10<br>VGS  10 V TJ (initial) = 100C<br>Single Pulse<br>0.5 ms<br>1 1 ms<br>RDS(on) Limit<br>10 ms<br>Thermal Limit<br>Package Limit<br>0.1 1<br>0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01<br>VDS, DRAIN−TO−SOURCE VOLTAGE(V) TIME IN AVALANCHE (s)<br>, (A)<br>IPEAK<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. IPEAK vs. Time in Avalanche** 

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**4** 

**NVMFS5C638NL** 

## **TYPICAL CHARACTERISTICS** 

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100<br>50% Duty Cycle<br>10 20%<br>10%<br>5%<br>2%<br>1<br>1%<br>0.1<br>Single Pulse<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br><br> (<br>JA<br>�<br>R<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Characteristics** 

## **DEVICE ORDERING INFORMATION** 

|**Device**|**Marking**|**Package**|**Shipping**†|
|---|---|---|---|
|NVMFS5C638NLT1G|5C638L|DFN5<br>(Pb−Free)|1500 / Tape & Reel|
|NVMFS5C638NLWFT1G|638LWF|DFNW5<br>(Pb−Free, Wettable Flanks)|1500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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DFN5 5x6, 1.27P<br>(SO−8FL)<br>CASE 488AA<br>1 ISSUE N<br>SCALE 2:1 DATE 25 JUN 2018<br>2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>D A 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>� c 0.23 0.28 0.33<br>E D 5.00 5.15 5.30<br>2 D1 4.70 4.90 5.10<br>c D2 3.80 4.00 4.20<br>A1 E 6.00 6.15 6.30<br>E1 5.70 5.90 6.10<br>1 2 3 4 E2 3.45 3.65 3.85<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.575 0.71<br>C K 1.20 1.35 1.50<br>SEATING L 0.51 0.575 0.71<br>0.10 C DETAIL A PLANE L1 0.125 REF<br>M 3.00 3.40 3.80<br>A � 0   � −−− 12    �<br>0.10 C GENERIC<br>SIDE VIEW MARKING DIAGRAM*<br>DETAIL A<br>1<br>8X b XXXXXX<br>0.10 C A B e/2 AYWZZ<br>0.05 c<br>L e<br>1 4 XXXXXX = Specific Device Code<br>K A = Assembly Location<br>Y = Year<br>RECOMMENDED W = Work Week<br>E2 SOLDERING FOOTPRINT* ZZ = Lot Traceability<br>(EXPOSED PAD)PIN 5 L1 M 0.4952X 4.560 *This information is generic. Please refer to<br>2X device data sheet for actual part marking.<br>1.530 Pb−Free indicator, “G” or microdot “  � ”,<br>may or may not be present. Some products<br>G D2 2X may not follow the Generic Marking.<br>BOTTOM VIEW 0.475<br>3.200<br>4.530<br>STYLE 1: STYLE 2: 2X 1.330<br>PIN 1. 2. SOURCESOURCE PIN 1. 2. ANODEANODE 0.905<br> 3. SOURCE  3. ANODE 1<br> 4. GATE  4. NO CONNECT<br> 5. DRAIN  5. CATHODE 0.965<br>4X<br>1.000 1.270<br>4X 0.750 PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the  onsemi  Soldering and Mounting<br>Techniques Reference Manual, SOLDERRM/D.<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98AON14036D Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: DFN5 5x6, 1.27P (SO−8FL) PAGE 1 OF 1<br>**----- End of picture text -----**<br>


**onsemi** and                     are trademarks of Semiconductor Components Industries, LLC dba **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2018 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

## **DFNW5 4.90x5.90x1.00, 1.27P** 

CASE 507BA ISSUE C 

## DATE 19 SEP 2024 

## **GENERIC MARKING DIAGRAM*** 

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1 XXXXXX = Specific Device Code<br>I XXXXXX A = Assembly Location<br>1 AYWZZ Y = Year<br>i i] W = Work Week<br>ZZ = Lot Traceability<br>DOCUMENT NUMBER: 98AON26450H<br>**----- End of picture text -----**<br>


*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, a may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**PAGE 1 OF 1** 

**DESCRIPTION: DFNW5 4.90x5.90x1.00, 1.27P** 

## 

**onsemi** and                     are trademarks of Semiconductor Components Industries, LLC dba onsemi **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2020 

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