NVMFS5C404NLWFAFT1G

## NVMFS5C404NL 

## MOSFET – Power, Single N-Channel 40 V, 0.67 m 370 A 

## **Features** 

- Small Footprint (5x6 mm) for Compact Design 

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- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

**V(BR)DSS RDS(ON) MAX ID MAX** 0.67 m @ 10 V 40 V 370 A 1.0 m @ 4.5 V 

- NVMFS5C404NLWF − Wettable Flank Option for Enhanced Optical Inspection 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

D (5) **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 40 V G (4) ~~esee Ge~~ Gate−to−Source Voltage VGS ± 20 V ~~es~~ Continuous Drain TC = 25 ° C ~~es~~ ID 370 A ~~re~~ S (1,2,3) ~~FST~~ Current R(Notes 1, 3)JC Steady TC = 100 ° C 260 **N−CHANNEL MOSFET** Power Dissipation State TC = 25 ° C PD 200 W ~~re~~ R JC (Note 1) TC = 100 ° C 100 **MARKING** Continuous Drain TA = 25 ° C ID 52 A **DIAGRAM** Current R(Notes 1, 2, 3)JA Steady TA = 100 ° C 37 1 S D D Power Dissipation State TA = 25 ° C PD 3.9 W **(SO−8FL)DFN5** S XXXXXX R JA (Notes 1 & 2) TA = 100 ° C 1.9 **CASE 488AA** S AYWZZ ~~p= EE~~ =: G _ D ~~Pe~~ Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 900 A **STYLE 1** D Operating Junction and Storage Temperature TJ, Tstg −55 to ° C XXXXXX = 5C404L + 175 ~~eeee ee~~ XXXXXX = (NVMFS5C404NL) or Source Current (Body Diode) IS 191 A XXXXXX = 404LWF ~~a~~ XXXXXX = (NVMFS5C404NLWF) Single Pulse Drain−to−Source Avalanche EAS 907 mJ A = Assembly Location Energy (IL(pk) = 38 A) ~~eee~~ Y = Year ~~ee Gs~~ Lead Temperature for Soldering Purposes TL 260 ° C W = Work Week ~~ee~~ (1/8 ″ from case for 10 s) ~~ee eee~~ ZZ = Lot Traceability Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **ORDERING INFORMATION** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 

|**Parameter**|**Symbol**|**Value**|**Unit**|
|---|---|---|---|
|Junction−to−Case − Steady State|R JC|0.75|°C/W|
|Junction−to−Ambient − SteadyState(Note 2)|R JA|39||



1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NVMFS5C404NL/D** 

**1** 

© Semiconductor Components Industries, LLC, 2016 **July, 2019 − Rev. 8** 

## **NVMFS5C404NL** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||21.6||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||1.2||2.0|V|
|Threshold Temperature Coefficient|VGS(TH)/TJ||||−6.2||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 50 A||0.52|0.67|m�|
|||VGS= 4.5 V|ID= 50 A||0.75|1.0||
|Forward Transconductance|gFS|VDS=15 V, ID= 50 A|||270||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 25 V|||12168||pF|
|Output Capacitance|COSS||||4538|||
|Reverse Transfer Capacitance|CRSS||||79.8|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 20 V; ID= 50 A|||81||nC|
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 20 V; ID= 50 A|||181|||
|Threshold Gate Charge|QG(TH)|VGS= 4.5 V, VDS= 20 V; ID= 50 A|||8.5|||
|Gate−to−Source Charge|QGS||||27.8|||
|Gate−to−Drain Charge|QGD||||23.8|||
|Plateau Voltage|VGP||||2.7||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 20 V,<br>ID= 50 A, RG= 1.0�|||24||ns|
|Rise Time|tr||||135|||
|Turn−Off Delay Time|td(OFF)||||87|||
|Fall Time|tf||||157|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 50 A|TJ= 25°C||0.7|1.2|V|
||||TJ= 125°C||0.61|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 50 A|||97.4||ns|
|Charge Time|ta||||46.5|||
|Discharge Time|tb||||50.9|||
|Reverse Recovery Charge|QRR||||190||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVMFS5C404NL** 

## **TYPICAL CHARACTERISTICS** 

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800<br>700<br>600<br>500<br>400<br>300 TJ = 25J = 25 = 25 ° C<br>200<br>100 TJ = 125J = 125 = 125 ° C<br>TJ = −55J = −55 = −55 ° C<br>0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0<br>VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>IDD<br>**----- End of picture text -----**<br>


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10 V to 3.2 V<br>280<br>3.0 V 700<br>240<br>600<br>200<br>500<br>160 2.8 V 400<br>120 300 TJ = 25J = 25 = 25 ° C<br>80 200<br>40 100 TJ = 125J = 125 = 125 ° C<br>TJ = −55J = −55 = −55 ° C<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.0015 0.0010<br>0.0014 VGS = 4.5 V<br>0.0013 T J  = 25 ° C<br>0.0012 ID = 50 A 0.0008<br>0.0011<br>0.0010<br>0.0009 0.0006 V GS  = 10 V<br>0.0008<br>0.0007<br>0.0004<br>0.0006<br>0.0005 T J  = 25 ° C<br>0.0004 0.0002<br>3 4 5 6 7 8 9 10 10 50 90 130 170 210 250 290<br>VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1M<br>2.1<br>1.9 VI D GS = 50 A= 10 V 100k TJ = 150 ° C<br>1.7 TJ = 125 ° C<br>1.5 10k<br>1.3 TJ = 85 ° C<br>1k<br>1.1<br>0.9<br>100<br>0.7<br>0.5 10<br>−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID IDD<br>)<br>) �<br>� , DRAIN−TO−SOURCE RESISTANCE (<br>, DRAIN−TO−SOURCE RESISTANCE (<br>DS(on)<br>DS(on) R<br>R<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**Figure 5. On−Resistance Variation with Temperature** 

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**3** 

**NVMFS5C404NL** 

## **TYPICAL CHARACTERISTICS** 

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14k 10 30<br>13k CISS QT<br>12k<br>25<br>11k 8<br>10k<br>20<br>9k COSS V GS  = 0 V 6<br>8k T J  = 25 ° C<br>7k f = 1 MHz 15<br>6k5k 4 Q GS QGD V DS  = 20 V 10<br>4k TJ = 25 ° C<br>3k 2 I D  = 50 A 5<br>2k<br>1k CRSS<br>0 0 0<br>0 5 10 15 20 25 30 35 40 0 20 40 60 80 100 120 140 160 180<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)<br>Figure 7. Capacitance Variation Figure 8. Gate−to−Source and<br>Drain−to−Source Voltage vs. Total Charge<br>10,000<br>VGS = 4.5 V 46<br>VDD = 20 V 41<br>ID = 50 A<br>1000 td(off) 36<br>31<br>tf<br>tr 26 T J  = 125 ° C<br>21<br>100 t d(on)<br>16<br>11 TJ = 150 ° C<br>6 TJ = 25 ° C TJ = −55 ° C<br>10 1<br>1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000 TC = 25 ° C 1000<br>VGS ≤  10 V 0.01 ms<br>0.1 ms<br>100 100<br>1 ms TJ(initial) = 25 ° C<br>dc 10 ms TJ(initial) = 100 ° C<br>10 10<br>RDS(on) Limit<br>Thermal Limit<br>Package Limit<br>1 1<br>0.1 1 10 100 1E−04 1E−03 1E−02<br>VDS (V) TIME IN AVALANCHE (s)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V) , DRAIN−TO−SOURCE VOLTAGE (V)<br>GS DS<br>V V<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br> (A)<br> (A)<br>IDS IPEAK<br>**----- End of picture text -----**<br>


**Figure 11. Safe Operating Area** 

**Figure 12. IPEAK vs. Time in Avalanche** 

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**4** 

**NVMFS5C404NL** 

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100<br>50% Duty Cycle<br>10 20%<br>10%<br>5%<br>1 2% NVMFS5C404NL 650 mm [2] , 2 oz., Cu Single Layer Pad<br>1%<br>0.1<br>Single Pulse<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>Figure 13. Thermal Characteristics<br>DEVICE ORDERING INFORMATION<br>Device Marking Package Shipping [†]<br>NVMFS5C404NLT1G 5C404L DFN5 1500 / Tape & Reel<br>(Pb−Free)<br>NVMFS5C404NLWFT1G 404LWF DFN5 1500 / Tape & Reel<br>(Pb−Free, Wettable Flanks)<br>NVMFS5C404NLT3G 5C404L DFN5 5000 / Tape & Reel<br>(Pb−Free)<br>NVMFS5C404NLWFT3G 404LWF DFN5 5000 / Tape & Reel<br>(Pb−Free, Wettable Flanks)<br>NVMFS5C404NLAFT1G 5C404L DFN5 1500 / Tape & Reel<br>(Pb−Free)<br>NVMFS5C404NLWFAFT1G 404LWF DFN5 1500 / Tape & Reel<br>(Pb−Free, Wettable Flanks)<br>C/W)<br>°<br>(t) (<br>JA<br>�<br>R<br>**----- End of picture text -----**<br>


†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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DFN5 5x6, 1.27P<br>(SO−8FL)<br>CASE 488AA<br>+<br>1 ISSUE N<br>SCALE 2:1 DATE 25 JUN 2018<br>2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>D = A o 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>fet = A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.00 5.15 5.30<br>2 D1 4.70 4.90 5.10<br>c D2 3.80 4.00 4.20<br>A1 E 6.00 6.15 6.30<br>E1 5.70 5.90 6.10<br>1 2 3 4 E2 3.45 3.65 3.85<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.575 0.71<br>C K 1.20 1.35 1.50<br>SEATING L 0.51 0.575 0.71<br>0.10 C DETAIL A PLANE L1 0.125 REF<br>M 3.00 3.40 3.80<br>~. | A —— 0  −−− 12<br>0.10 C GENERIC<br>Sy SIDE VIEW SS MARKING DIAGRAM*<br>DETAIL A<br>1<br>8X b XXXXXX<br>0.10 C A B e/2 AYWZZ<br>0.05 c<br>L e<br>1 4 XXXXXX = Specific Device Code<br>P o {IF S<br>K A = Assembly Location<br>Y = Year<br>RECOMMENDED W = Work Week<br>E2 SOLDERING FOOTPRINT* ZZ = Lot Traceability<br>(EXPOSED PAD)PIN 5 L1 M 0.4952X 4.560 *This information is generic. Please refer to<br>2X device data sheet for actual part marking.<br>a<br>1.530 Pb−Free indicator, “G” or microdot “ ”,<br>G = D2 2X may not follow the Generic Marking.may or may not be present. Some products<br>BOTTOM VIEW 0.475<br>an 7a 3.200 |<br>4.530<br>| |<br>STYLE 1: STYLE 2: 2X 1.330<br>PIN 1. 2. SOURCESOURCE PIN 1. 2. ANODEANODE 0.905<br> 3. SOURCE  3. ANODE 1<br> 4. GATE  4. NO CONNECT<br> 5. DRAIN  5. CATHODE 0.965<br>“ 4X g o l a<br>1.000 1.270<br>4X 0.750 one PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98AON14036D Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: DFN5 5x6, 1.27P (SO−8FL) PAGE 1 OF 1<br>**----- End of picture text -----**<br>


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