NVLJD4007NZTBG

## NVLJD4007NZ 

## MOSFET – Dual, N-Channel, Small Signal, Gate ESD Protection, 2x2 WDFN 

## 30 V, 245 mA 

## **Features** 

- Optimized Layout for Excellent High Speed Signal Integrity 

- Low Gate Charge for Fast Switching 

- Small 2 x 2 mm Footprint 

- ESD Protected Gate 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free and are RoHS Compliant 

## **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise noted)|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise noted)|C unless otherwise noted)|||
|---|---|---|---|---|
|**Parameter**||**Symbol**<br>~~ee~~|**Value**<br>~~ee~~|**Unit**|
|Drain−to−Source Voltage<br>~~ee~~||VDSS<br>~~ee~~<br>~~ee~~|30<br>~~ee~~<br>~~ee~~|V<br>~~ee~~|
|Gate−to−Source Voltage<br>~~esee~~||VGS<br>~~ee ~~|10<br> ~~ee~~|V|
|Continuous Drain<br>Current (Note 1)<br>~~es~~|Steady State = 25°C<br>~~ee~~|ID|245|mA|
|Power Dissipation<br>(Note 1)<br>~~es ~~|Steady State = 25°C<br> ~~ee~~<br>~~ee~~<br>~~ee~~|PD|755|mW|
|Pulsed Drain Current<br>~~ee~~|tP<br>10 s<br>~~ee~~<br>~~ee~~<br>~~ee~~|IDM<br>~~ee~~|1.2<br>~~ee~~|A<br>~~ee~~|
|Operating Junction and Storage Temperature<br>~~ee~~<br>~~ee~~||TJ,<br>TSTG|−55 to<br>150|°C|
|Continuous Source Current (Body Diode)||ISD|245|mA|
|Lead Temperature for Soldering Purposes<br>(1/8″from case for 10 s)<br>~~Ct~~||TL<br>~~Ct~~|260<br>~~Ct~~|°C<br>~~Ct~~|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Max**|**Unit**|
|Junction−to−Ambient – Steady State (Note 1)|R JA|166|°C/W|



1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 

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RDS(on) ID MAX<br>V(BR)DSS Typ @ VGS (Note 1)<br>1.4  @ 4.5 V<br>30 V 245 mA<br>2.3  @ 2.5 V<br>D (6) D (4)<br>G (2) G (5)<br>S (1) S (3)<br>N−Channel N−Channel<br>MARKING<br>DIAGRAM<br>1 6<br>WDFN6 JG<br>2 5<br>CASE 506AN<br>3 4<br>1<br>JG = Specific Device Code<br>M = Date Code<br>= Pb−Free Package<br>(Note: Microdot may be in either location)<br>**----- End of picture text -----**<br>


## **PIN CONNECTIONS** 

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D1<br>S1 1 6 D1<br>G1 2 5 G2<br>D2<br>S2 3 4 D2<br>(Top View)<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|NVLJD4007NZTAG|WDFN6<br>(Pb−Free)|(Pb−Free)<br>3000/Tape &<br>Reel|
|NVLJD4007NZTBG|WDFN6<br>(Pb−Free)|(Pb−Free)<br>3000/Tape &<br>Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2013 **July, 2019 − Rev. 1** 

**NVLJD4007NZ/D** 

## **NVLJD4007NZ** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ= 25°C|unless otherwi|se specified)|||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 100�A|30|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ|Reference to 25°C, ID= 100�A||27||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V, VDS= 30 V|||1.0|�A|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V, VDS= 20 V,<br>T = 85°C|||1.0|�A|
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±10 V|||±25|�A|
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±5 V|||±1.0|�A|
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±5 V<br>T = 85°C|||±1.0|�A|
|**ON CHARACTERISTICS**(Note 2)|||||||
|Gate Threshold Voltage|VGS(TH)|VDS= VGS, ID= 100�A|0.5|1.0|1.5|V|
|Threshold Temperature Coefficient|VGS(TH)/TJ|Reference to 25°C, ID= 100�A||−2.5||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 4.5 V, ID= 125 mA||1.4|7.0|�|
|||VGS= 2.5 V, ID= 125 mA||2.3|7.5||
|Forward Transconductance|gFS|VDS= 3 V, ID= 125 mA||80||mS|
|**CAPACITANCES & GATE CHARGE**|||||||
|Input Capacitance|CISS|VDS= 5.0 V, f = 1 MHz,<br>VGS= 0 V||12.2|20|pF|
|Output Capacitance|COSS|||10|15||
|Reverse Transfer Capacitance|CRSS|||3.3|6.0||
|Total Gate Charge|Qg|VDS= 24 V, ID= 100 mA,<br>VGS= 4.5 V||0.75||nC|
|Gate−to−Source Charge|Qgs|||0.20|||
|Gate−to−Drain Charge|Qgd|||0.20|||
|Plateau Voltage|VGP|||1.57||V|
|**SWITCHING CHARACTERISTICS**(Note 3)|||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 24 V,<br>ID= 125 mA, RG= 10�||9||ns|
|Rise Time|tr|||41||ns|
|Turn−Off Delay Time|td(OFF)|||96|||
|Fall Time|tf|||72|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||
|Forward Diode Voltage|VSD|VGS= 0 V, IS= 125 mA||0.79|0.9|V|



2. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

3. Switching characteristics are independent of operating junction temperatures. 

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**NVLJD4007NZ** 

## **TYPICAL PERFORMANCE CURVES** 

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1.2 1.2<br>VGS = 10 VGS = 10 V = 10 V 5.0 V 4.5 V 4.0 V<br>1.1 1.1 V DS  = 5 V<br>1.0 1.0 T J  = 25 ° C<br>0.9 3.5 V 0.9<br>0.8 0.8<br>0.7 3.0 V 0.7 TJ = 150 ° C<br>0.6 2.8 V 0.6 TJ = −55 ° C<br>0.5 2.6 V 0.5<br>0.4 2.4 V 0.4<br>0.3 2.2 V 0.3<br>0.2 2.0 V 0.2<br>1.8 V<br>0.1 0.1<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)DS, DRAIN−TO−SOURCE VOLTAGE (V), DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>10 10<br>TJ = 125 ° C TJ = −55 ° C<br>9.0 T J  = 25 ° C 9.0<br>8.0 I D  = 125 mA 8.0 T J  = 25 ° C V GS = 2.5 V<br>7.0 7.0 VGS = 4.5 V<br>6.0 6.0<br>5.0 5.0<br>4.0 4.0 TJ = 125 ° C<br>3.0 3.0<br>T J  = 25 ° C<br>2.0 2.0<br>1.0 1.0 T J  = −55 ° C<br>1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2<br>VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1.9 1000<br>1.8 ID = 125 mA<br>1.7 VGS = 4.5 V<br>1.6 100 T J  = 150 ° C<br>1.5<br>1.41.3 T J  = 125 ° C<br>10<br>1.2<br>1.1<br>1.0<br>0.9 1 TJ = 85 ° C<br>0.8<br>0.7<br>0.6 0.1<br>−50 −25 0 25 50 75 100 125 150 0 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>DRAIN CURRENT (A) DRAIN CURRENT (A)<br>ID, D,  ID,<br>) � ) �<br>DRAIN−TO−SOURCE RESISTANCE ( DRAIN−TO−SOURCE RESISTANCE (<br>DS(on),  DS(on),<br>R R<br>, LEAKAGE (nA)<br>DRAIN−TO−SOURCE<br>IDSS<br>DS(on),<br>R RESISTANCE (NORMALIZED)<br>**----- End of picture text -----**<br>


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1.2<br>VGS = 10 VGS = 10 V = 10 V 5.0 V 4.5 V 4.0 V<br>1.1<br>1.0<br>0.9 3.5 V<br>0.8<br>0.7<br>3.0 V<br>0.6<br>2.8 V<br>0.5<br>2.6 V<br>0.4 2.4 V<br>0.3 2.2 V<br>0.2 2.0 V<br>1.8 V<br>0.1<br>0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)DS, DRAIN−TO−SOURCE VOLTAGE (V), DRAIN−TO−SOURCE VOLTAGE (V)<br>DRAIN CURRENT (A)<br>ID, D,<br>**----- End of picture text -----**<br>


**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**Figure 5. On−Resistance Variation with Temperature** 

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**NVLJD4007NZ** 

## **TYPICAL PERFORMANCE CURVES** 

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25 5.0 30<br>QT<br>4.5<br>VGS = 0 V<br>20 T J  = 25 ° C 4.0 25<br>f = 1 MHz<br>3.5 VDS 20<br>15 3.0 V GS<br>2.5 15<br>Ciss<br>10 2.0<br>Q GS Q GD<br>10<br>Coss 1.5 VDS = 24 V<br>5 Crss 1.00.5 TIDJ = 1 = 2500 ° C mA 5<br>0 0 0<br>0 5 10 15 20 25 30 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V) , DRAIN−TO−SOURCE VOLTAGE (V)<br>GS<br>V DS<br>V<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge** 

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1000 10<br>VGS = 4.5 V<br>VDD = 24 V<br>I D = 125 mA<br>TJ = 85 ° C TJ = 25 ° C<br>100 td(off)<br>ttrf 1 TJ = 125 ° C<br>10 td(on)<br>TJ = 150 ° C<br>1 0.1 TJ = −55 ° C<br>1 10 100 0.5 0.6 0.7 0.8 0.9 1.0 1.1<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>10<br>VGS ≤  10 V<br>Single Pulse<br>TC = 25 ° C<br>1<br>10  � s<br>100  � s<br>0.1 1 ms<br>10 ms<br>dc<br>0.01 RDS(on) Limit<br>Thermal Limit<br>Package Limit<br>0.001<br>0.1 1 10 100<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

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**NVLJD4007NZ** 

## **TYPICAL PERFORMANCE CURVES** 

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1000<br>R � JA Steady State = 166 ° C/W<br>100 Duty Cycle = 0.5<br>0.20<br>0.10<br>0.05<br>10<br>0.02<br>Single Pulse<br>0.01<br>1<br>1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03<br>t, TIME (s)<br>RESPONSE<br>R(t), EFFECTIVE TRANSIENT THERMAL<br>**----- End of picture text -----**<br>


**Figure 12. Thermal Impedance (Junction−to−Ambient)** 

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MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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**WDFN6 2x2, 0.65P** CASE 506AN ISSUE H 

DATE 25 JAN 2022 

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GENERIC<br>MARKING DIAGRAM*<br>1<br>XX M<br>XX = Specific Device Code<br>M = Date Code<br>**----- End of picture text -----**<br>


*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ � ”, may or may not be present. Some products may not follow the Generic Marking. 

**DOCUMENT NUMBER: 98AON20861D DESCRIPTION: WDFN6 2x2, 0.65P** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

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