NVJS4151PT1G

## NVJS4151P 

## MOSFET – Power, Single P-Channel, Trench, SC-88 -20 V, -4.1 A 

## **Features** 

**http://onsemi.com** 

- Leading Trench Technology for Low RDS(ON) Extending Battery Life 

- SC−88 Small Outline (2x2 mm) for Maximum Circuit Board Utilization, Same as SC−70−6 

**==> picture [191 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS RDS(on) Typ ID Max<br>eeeeee<br>55 m  @ −4.5 V<br>−20 V 70 m  @ −2.5 V −4.1 A<br>180 m  @ −1.8 V<br>SC−88 (SOT−363)<br>D 1 6 D<br>D 2 5 D<br>G 3 4 S<br>**----- End of picture text -----**<br>


- Gate Diodes for ESD Protection 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

## **Applications** 

- High Side Load Switch 

- Cell Phones, Computing, Digital Cameras, MP3s and PDAs 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) 

|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise stated)|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise stated)|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise stated)|C unless otherwise stated)|C unless otherwise stated)||
|---|---|---|---|---|---|
|**Parameter**<br>~~a~~|||**Symbol**<br>~~a~~|**Value**<br>~~a~~|**Unit**<br>~~a~~|
|Drain−to−Source Voltage<br>~~a~~<br>~~a~~<br>~~a~~|||VDSS<br>~~a~~<br>~~a~~<br>~~a~~|−20<br>~~a~~<br>~~a~~<br>~~a~~|V<br>~~a~~<br>~~a~~<br>~~a~~|
|Gate−to−Source Voltage<br>~~a~~|||VGS<br>~~a~~|±12<br>~~a~~|V<br>~~a~~|
|Continuous Drain<br>Current (Note 1)<br>~~re~~<br>~~a~~|Steady<br>State<br>p~~rs~~|TA= 25°C<br>~~rs~~|ID<br>~~eee~~|−3.2<br>~~fe~~|A<br>~~eee~~|
|||TA= 85°C<br>~~rs~~<br>~~ee~~||−2.3<br>~~fe~~||
||t≤5 s<br>~~i~~<br>~~eee~~|TA= 25°C<br>~~eee~~||−4.1<br>~~eee~~||
|Power Dissipation<br>(Note 1)<br>~~re~~<br>~~a~~<br>~~a~~|Steady<br>State<br>~~i~~<br>~~eee~~<br>~~a~~|TA= 25°C<br>~~eee~~|PD<br>~~eee~~|1.2<br>~~eee~~|W<br>~~eee~~|
|Pulsed Drain Current<br>~~re eee~~<br>~~a~~<br>~~a~~||tp= 10 s<br>~~eee ~~|IDM<br> ~~eee~~|−13<br>~~eee~~|A<br>~~eee~~|
|Operating Junction and Storage Temperature<br>~~a~~|||TJ,<br>TSTG|−55 to<br>150|°C|
|Source Current (Body Diode)|||IS|−0.8|A|
|Lead Temperature for Soldering Purposes<br>(1/8” from case for 10 s)<br>~~po~~<br>|||TL<br>~~po~~<br>|260<br>~~po~~<br>|°C<br>~~po~~<br>|
|ESD<br>Human Body Model (HBM)<br>~~a~~|||ESD<br>~~a~~|4000<br>~~a~~|V<br>~~a~~|



Top View 

**==> picture [178 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
MARKING DIAGRAM &<br>PIN ASSIGNMENT<br>D D S<br>-.<br>6<br>1<br>VTY M<br>SC−88/SOT−363 oe<br>Lot<br>CASE 419B<br>1 A<br>S|<br>D D G<br>VTY = Device Code<br>M = Date Code<br>= Pb−Free Package<br>**----- End of picture text -----**<br>


(Note: Microdot may be in either location) 

~~a~~ **Parameter Symbol Max Unit** Junction−to−Ambient – Steady State R JA 125 ° C/W ~~a~~ **Device** Junction−to−Ambient − t ≤ 5 s R JA 75 ~~a a~~ Junction−to−Lead – Steady State R JL 45 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

**ORDERING INFORMATION** 

|**Device**<br>~~a~~<br>~~a~~|**Package**|**Shipping**†|
|---|---|---|
|NVJS4151PT1G<br>~~a~~<br>~~a~~|SC−88<br>(Pb−Free)|3000 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2014 **July, 2019 − Rev. 1** 

**NVJS4151P/D** 

## **NVJS4151P** 

## **ELECTRICAL CHARACTERISTICS** (TJ=25 ° C unless otherwise stated) 

|**Parameter**|**Symbol**|**Test Condition**|**Test Condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID|= −250�A|−20|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||−12||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= −16 V,<br>VDS= 0 V|TJ= 25°C|||−1.0|�A|
||||TJ= 85°C|||−5.0||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±4.5 V||||±1.5|�A|
|||VDS= 0 V, VGS=±12 V||||±10|mA|
|**ON CHARACTERISTICS**(Note 2)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= −250�A||−0.40||−1.2|V|
|Negative Threshold Temperature<br>Coefficient|VGS(TH)/TJ||||4.0||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= −4.5 V, ID= −2.9 A|||55|67|m�|
|||VGS= −2.5 V, ID= −2.4 A|||70|85||
|||VGS= −1.8 V, ID= −1.0 A|||180|205||
|Forward Transconductance|gFS|VGS= −10 V, ID= −3.3 A|||12||S|
|**CHARGES AND CAPACITANCES**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1.0 MHz,<br>VDS= −10 V|||850||pF|
|Output Capacitance|COSS||||160|||
|Reverse Transfer Capacitance|CRSS||||110|||
|Total Gate Charge|QG(TOT)|VGS= −4.5 V, VDS= −10 V,<br>ID= −3.3 A|||10||nC|
|Gate−to−Source Charge|QGS||||1.5|||
|Gate−to−Drain Charge|QGD||||2.8|||
|**SWITCHING CHARACTERISTICS**(Note 3)||||||||
|Turn−On Delay Time|td(ON)|VGS= −4.5 V, VDD= −10 V,<br>ID= −1.0 A, RG= 6.0�|||0.85||�s|
|Rise Time|tr||||1.7|||
|Turn−Off Delay Time|td(OFF)||||2.7|||
|Fall Time|tf||||4.2|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V, IS= −1.3 A,<br>TJ= 25°C|||−0.75|−1.2|V|
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100<br>A/�s,<br>IS= −1.3 A|||63||ns|
|Charge Time|Ta||||9.0|||
|Discharge Time|Tb||||54|||
|Reverse Recovery Charge|QRR||||0.23||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: pulse width ≤ 300 � s, duty cycle ≤ 2%. 

3. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**2** 

**NVJS4151P** 

## **TYPICAL ELECTRICAL CHARACTERISTICS** 

**==> picture [235 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS = −1.8 V TJ = 25 ° C<br>4<br>VGS = −2.4 V<br>VGS = −2.0 V<br>3 VGS = −1.6 V<br>VGS = −2.8 V to 6.0 V<br>2 .<br>VGS = −1.4 V<br>1<br>VGS = −1.0 V VGS = −1.2 V<br>0<br>0 2 4 6 8<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 1. On−Region Characteristics** 

**==> picture [234 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
5<br>VDS �  −10 V<br>4<br>3<br>2<br>1<br>0<br>0 1 2 3 4<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 2. On−Region Characteristics** 

**==> picture [491 x 435] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.5 0.6<br>ITDJ = −3.3 A = 25 ° C 0.5 TJ = 25 ° C<br>0.4<br>0.4<br>0.3<br>0.3 VGS = −1.8 V<br>0.2<br>0.2<br>0.1<br>0.1 VGS = −2.5 V<br>0 0 VGS = −4.5 V<br>0 2 4 6 1 2 3 4 5<br>−VGS, GATE−TO−SOURCE VOLTAGE (V) −ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance versus Figure 4. On−Resistance versus Drain Current<br>Gate−to−Source Voltage and Gate Voltage<br>1.7 100000<br>VGS = −4.5 V VGS = 0 V<br>ID = −2.9 A<br>1.5 TJ = 150 ° C<br>10000<br>1.3<br>1.1<br>1000<br>0.9<br>0.7 100<br>−50 −25 0 25 50 75 100 125 150 0 4 8 12 16 20<br>TJ, JUNCTION TEMPERATURE ( ° C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature versus Voltage<br>) �<br>)( �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE<br>(on)<br>(on)<br>RDS<br>RDS<br>, LEAKAGE (nA)<br>DRAIN−TO−SOURCE<br>DSS<br>−I<br>DS(on),<br>R RESISTANCE (NORMALIZED)<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**3** 

**NVJS4151P** 

## **TYPICAL ELECTRICAL CHARACTERISTICS** 

**==> picture [492 x 389] intentionally omitted <==**

**----- Start of picture text -----**<br>
1250 5 15<br>VTJGS = 25 = 0 V ° C QT<br>1000 4 12<br>CISS VDS VGS<br>750 3 9<br>500 2 6<br>Qgs Qgd ID = −3.3 A<br>TJ = 25 ° C<br>250 1 3<br>0 0 0<br>0 4 8 12 16 20 0 2 4 6 8 10 12<br>QG, TOTAL GATE CHARGE (nC)<br>Figure 7. Capacitance Variation Figure 8. Gate−to−Source and<br>Drain−to−Source Voltage versus Total Charge<br>10000 3<br>VGS = 0 V<br>tf 2.5 TJ = 25 ° C<br>td(off)<br>2<br>tr<br>1000 1.5<br>td(on)<br>1<br>0.5<br>100 0<br>1 10 100 0.4 0.5 0.6 0.7 0.8 0.9<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V) , DRAIN−TO−SOURCE VOLTAGE (V)<br>GS DS<br>−V −V<br>t, TIME (ns) , SOURCE CURRENT (A)<br>S<br>−I<br>**----- End of picture text -----**<br>


**==> picture [104 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
RG, GATE RESISTANCE ( � )<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation Gate Resistance** 

**==> picture [155 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 10. Diode Forward Voltage versus Current** 

**http://onsemi.com** 

**4** 

**NVJS4151P** 

## **PACKAGE DIMENSIONS** 

**SC−88/SC70−6/SOT−363** CASE 419B−02 ISSUE Y 

**==> picture [490 x 613] intentionally omitted <==**

**----- Start of picture text -----**<br>
2X<br>aaa H D<br>_ D H NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>A 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>D GAGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-<br>PLANE SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.<br>4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF<br>6 5 4 THE PLASTIC BODY AND DATUM H.<br>L2 L 5. DATUMS A AND B ARE DETERMINED AT DATUM H.<br>E E1 DETAIL A 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THELEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.<br>7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.<br>1 2 3<br>ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN<br>EXCESS OF DIMENSION b AT MAXIMUM  MATERIAL CONDI-<br>2X aaa C TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER<br>bbb H D 2X 3 TIPS RADIUS OF THE FOOT.<br>e MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>B [= 6X b : A −−− −−− 1.10 −−− −−− 0.043<br>ddd M C A-B D A1 0.00 −−− 0.10 0.000 −−− 0.004<br>TOP VIEW A2 0.70 0.90 1.00 0.027 0.035 0.039<br>b 0.15 0.20 0.25 0.006 0.008 0.010<br>C 0.08 0.15 0.22 0.003 0.006 0.009<br>A2 DETAIL A D 1.80 2.00 2.20 0.070 0.078 0.086<br>A E 2.00 2.10 2.20 0.078 0.082 0.086<br>E1 1.15 1.25 1.35 0.045 0.049 0.053<br>e 0.65 BSC 0.026 BSC<br>L 0.26 0.36 0.46 0.010 0.014 0.018<br>L2 0.15 BSC 0.006 BSC<br>aaa 0.15 0.006<br>bbb 0.30 0.012<br>6X ccc C ccc 0.10 0.004<br>A1 C SEATINGPLANE c a ddd 0.10 0.004<br>SIDE VIEW END VIEW<br>RECOMMENDED<br>SOLDERING FOOTPRINT*<br>6X 6X<br>0.30 0.66<br>To or 2.50<br>0.65 sto<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>ON Semiconductor and the         are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.<br>SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed<br>at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation<br>or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and<br>specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets<br>and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each<br>customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended,<br>or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which<br>the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or<br>unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and<br>expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim<br>alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable<br>copyright laws and is not for resale in any manner.<br>PUBLICATION ORDERING INFORMATION<br>LITERATURE FULFILLMENT : N. American Technical Support : 800−282−9855 Toll Free ON Semiconductor Website :  www.onsemi.com<br>Literature Distribution Center for ON Semiconductor USA/Canada<br>P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature : http://www.onsemi.com/orderlit<br>Phone : 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910<br>Fax : 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local<br>Email : orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative<br>**----- End of picture text -----**<br>


## **PUBLICATION ORDERING INFORMATION** 

**http://onsemi.com** 

**NVJS4151P/D** 

**5**