NVD6495NLT4G-VF01

NVD6495NL 

## MOSFET – Power, N-Channel, Logic Level 100 V, 25 A, 50 m * 

## **Features** 

- Low RDS(on) 

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- 100% Avalanche Tested 

- AEC−Q101 Qualified 

- These Devices are Pb−Free and are RoHS Compliant 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **Parameter Symbol Value Unit** ~~a~~ Drain−to−Source Voltage VDSS 100 V ~~a~~ Gate−to−Source Voltage − Continuous VGS 20 V Continuous Drain Steady TC = 25 ° C ID 25 A ~~pe~~ Current State TC = 100 ° C 18 ~~ee~~ Power Dissipation Steady TC = 25 ° C PD ~~ee~~ 83 W State ~~TT~~ Pulsed Drain Current tp = 10 s IDM 80 A Operating and Storage Temperature Range TJ, Tstg −55 to ° C +175 ~~pO~~ Source Current (Body Diode) IS 25 A Single Pulse Drain−to−Source Avalanche EAS 79 mJ Energy (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) = 23 A, L = 0.3 mH, RG = 25 ) Lead Temperature for Soldering TL 260 ° C Purposes, 1/8 ″ from Case for 10 Seconds ~~ee eee~~ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

**THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit** Junction−to−Case (Drain) − Steady State R JC 1.8 ° C/W ~~ee~~ Junction−to−Ambient − Steady State (Note 1) R JA 39 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [2 oz] including traces). ~~es~~ 

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V(BR)DSS RDS(on) MAX ID MAX<br>54 m  @ 4.5 V<br>100 V 25 A<br>ee 50 m  @ 10 V ee<br>D<br>G<br>S<br>**----- End of picture text -----**<br>


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4<br>1 [2]<br>3<br>DPAK<br>CASE 369AA<br>STYLE 2<br>MARKING DIAGRAM<br>& PIN ASSIGNMENT<br>4 Drain<br>1 3<br>Gate = 2 Source<br>Drain<br>6495NL = Device Code<br>Y = Year<br>WW = Work Week<br>G = Pb−Free Package<br>YWW 64 95NLG<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 

Publication Order Number: **NVD6495NL/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **June, 2019 − Rev. 2** 

## **NVD6495NL** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTIC**|**S**(TJ= 25°C u|nless otherwise noted)|nless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A<br>VGS= 0 V, ID= 250�A, TJ= −40°C||100<br>92|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||115||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 100 V|TJ= 25°C|||1.0|�A|
||||TJ= 125°C|||100||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=|�20 V|||�100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||1.0||2.0|V|
|Negative Threshold Temperature<br>Coefficient|VGS(TH)/TJ||||4.8||mV/°C|
|Drain−to−Source On−Resistance|RDS(on)|VGS= 4.5 V, ID= 10 A|||44|54|m�|
|||VGS= 10 V, ID= 10 A|||43|50||
|Forward Transconductance|gFS|VDS= 5.0 V, ID= 10 A|||24||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1.0 MHz, VDS= 25 V|||1024||pF|
|Output Capacitance|COSS||||156|||
|Reverse Transfer Capacitance|CRSS||||70|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 80 V, ID= 23 A|||20||nC|
|Threshold Gate Charge|QG(TH)||||1.1|||
|Gate−to−Source Charge|QGS||||3.1|||
|Gate−to−Drain Charge|QGD||||14|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 80 V, ID= 23 A|||35||nC|
|**SWITCHING CHARACTERISTICS**(Note 3)||||||||
|Turn−On Delay Time|td(on)|VGS= 4.5 V, VDD= 80 V,<br>ID= 23 A, RG= 6.1�|||11||ns|
|Rise Time|tr||||91|||
|Turn−Off Delay Time|td(off)||||40|||
|Fall Time|tf||||71|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V, IS= 23 A|TJ= 25°C||0.87|1.2|V|
||||TJ= 125°C||0.74|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 23 A|||64||ns|
|Charge Time|Ta||||40|||
|Discharge Time|Tb||||24|||
|Reverse Recovery Charge|QRR||||152||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

3. Switching characteristics are independent of operating junction temperatures. 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Device**|**Package**|**Shipping**†|
|NVD6495NLT4G|DPAK<br>(Pb−Free)|2500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

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**2** 

**NVD6495NL** 

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45 45<br>40 VGS = 10 V TJ = 25 ° C 40 VDS �  10 V<br>5 V 4 V 3.6 V<br>35 35<br>30 3.4 V 30<br>25 25<br>3.2 V<br>20 20<br>15 3.0 V 15 TJ = 25 ° C<br>10 2.8 V 10 TJ = 125 ° C<br>5 5 TJ = −55 ° C<br>0 0<br>0 1 2 3 4 5 1 2 3 4<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.050 0.050<br>ID = 23 A TJ = 25 ° C<br>TJ = 25 ° C<br>0.048 0.048<br>0.046 0.046<br>VGS = 4.5 V<br>0.044 0.044<br>VGS = 10 V<br>0.042 0.042<br>0.040 0.040<br>2 3 4 5 6 7 8 9 10 5 10 15 20 25<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Region versus Gate Voltage Figure 4. On−Resistance versus Drain<br>Current and Gate Voltage<br>3.0 10000<br>I D = 23 A VGS = 0 V<br>VGS = 4.5 V<br>2.5<br>TJ = 150 ° C<br>2.0<br>1000<br>1.5 TJ = 125 ° C<br>1.0<br>0.5 100<br>−50 −25 0 25 50 75 100 125 150 175 10 20 30 40 50 60 70 80 90 100<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature versus Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED)<br>IDSS<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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**3** 

**NVD6495NL** 

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2500 10<br>TJ = 25 ° C QT<br>VGS = 0 V<br>2000 8<br>1500 6<br>1000 Ciss 4 Qds Q gs<br>500 2 VDS = 80 V<br>Crss ID = 23 A<br>Coss TJ = 25 ° C<br>0 0<br>0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 35<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**Figure 8. Gate−to−Source Voltage and Drain−to−Source Voltage  versus Total Charge** 

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1000 25<br>VDS = 80 V TJ = 25 ° C<br>ID = 23 A VGS = 0 V<br>VGS = 4.5 V 20<br>100 tr<br>15<br>tf<br>td(off)<br>10<br>10<br>td(on)<br>5<br>1 0<br>1 10 100 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage versus<br>versus Gate Resistance Current<br>100 125<br>ID = 23 A<br>10  � s 100<br>10<br>100  � s 75<br>VGS = 10 V 1 ms<br>SINGLE PULSE<br>50<br>1 TC = 25 ° C 10 ms<br>dc<br>RDS(on) LIMIT 25<br>THERMAL LIMIT<br>PACKAGE LIMIT<br>0.1 0<br>1 10 100 1000 25 50 75 100 125 150 175<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE<br>Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy versus<br>Safe Operating Area Starting Junction Temperature<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID<br>AVALANCHE ENERGY (mJ)<br>**----- End of picture text -----**<br>


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**4** 

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10<br>Duty Cycle = 0.5<br>1<br>0.2<br>0.1<br>0.05<br>0.1<br>0.02<br>0.01<br>0.01 SINGLE PULSE<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10<br>t, PULSE TIME (s)<br>C/W) EFFECTIVE TRANSIENT<br> ( ° THERMAL RESISTANCE<br>JC(t)<br>�<br>R<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

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**5** 

**NVD6495NL** 

## **PACKAGE DIMENSIONS** 

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DPAK (SINGLE GUAGE)<br>CASE 369AA−01<br>ISSUE B<br>**----- End of picture text -----**<br>


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NOTES:<br>C 1. DIMENSIONING AND TOLERANCING PER ASME<br>A Y14.5M, 1994.<br>E A 2.3. CONTROLLING DIMENSION: INCHES.THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>MENSIONS b3, L3 and Z.<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 4 Z 5. DIMENSIONS D AND E ARE DETERMINED AT THEOUTERMOST EXTREMES OF THE PLASTIC BODY.<br>1 2 3 D DETAIL A H 6. DATUMS A AND B ARE DETERMINED AT DATUMPLANE H.<br>INCHES MILLIMETERS<br>DIM MIN MAX MIN MAX<br>L4 At Fao A 0.086 0.094 2.18 2.38<br>b2 A1 0.000 0.005 0.00 0.13<br>b c b 0.025 0.035 0.63 0.89<br>b2 0.030 0.045 0.76 1.14<br>e 0.005 (0.13) M C H b3 0.180 0.215 4.57 5.46<br>c 0.018 0.024 0.46 0.61<br>eySBP L2 [GAUGE] PLANE C SEATINGPLANE ee c2D 0.0180.235 0.0240.245 0.465.97 0.616.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L A1 HL 0.3700.055 0.4100.070 9.401.40 10.411.78<br>L1 L1 0.108 REF 2.74 REF<br>L2 0.020 BSC 0.51 BSC<br>DETAIL A L3 0.035 0.050 0.89 1.27<br>ROTATED 9  CW L4 −−− 0.040 −−− 1.01<br>Z 0.155 −−− 3.93 −−−<br>SOLDERING FOOTPRINT* STYLE 2:PIN 1. GATE<br>2. DRAIN<br>6.20 3.00 3. SOURCE<br>4. DRAIN<br>0.244 0.118<br>2.58<br>PLT,<br>0.102<br>. 4<br>5.80<br>1.60 6.17<br>0.228<br>0.063 0.243<br>Ld<br>SCALE 3:1 mm<br>inches<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

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## **LITERATURE FULFILLMENT** : 

**NVD6495NL/D** 

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