NVD5C464NT4G

MOSFET – Power, Single N-Channel 40 V, 5.8 m 59 A 

## NVD5C464N 

## **Features** 

• Low R to Minimize Conduction Losses **www.onsemi.com** DS(on) • Low QG and Capacitance to Minimize Driver Losses • AEC−Q101 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS **V(BR)DSS RDS(on) ID** Compliant 40 V 5.8 m @ 10 V 59 A ~~eeee ee~~ **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) D **Parameter Symbol Value Unit** ~~eses es~~ Drain−to−Source Voltage VDSS 40 V ~~eeee es~~ Gate−to−Source Voltage VGS 20 V ~~esee ec~~ Continuous Drain CurTC = 25 ° C ID 59 A G rent R JC (Notes 1 & 3) Steady TC = 100 ° C 41 S Power Dissipation R JC State TC = 25 ° C PD 40 W **N−CHANNEL MOSFET** (Note 1) TC = 100 ° C 20 ~~taea ee a~~ Continuous Drain TA = 25 ° C ID 16 A 4 Current R(Notes 1, 2 & 3)JA Steady TA = 100 ° C 13 1[2] Power Dissipation R JA State TA = 25 ° C PD 3.0 W 3 ~~re~~ (Notes 1 & 2) TA = 100 ° C 2.1 ~~®~~ **DPAK** ~~pt~~ Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 431 A **CASE 369CSTYLE 2** Operating Junction and Storage Temperature TJ, Tstg −55 to ° C 175 ~~Po~~ Source Current (Body Diode) IS 44 A **MARKING DIAGRAM** ~~esen Ge~~ **& PIN ASSIGNMENT** Single Pulse Drain−to−Source Avalanche EAS 136 mJ Energy (TJ = 25 ° C, IL(pk) = 5 A) 4 ~~Po~~ Drain Lead Temperature for Soldering Purposes TL 260 ° C (1/8 ″ from case for 10 s) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ~~Po =~~ 2 **THERMAL RESISTANCE MAXIMUM RATINGS** 1 Drain 3 Gate Source ~~es~~ Junction−to−Case (Drain) (Note 1) **Parameter Symbol** R ~~es~~ JC ~~Ge~~ **Value** 3.76 ° **Unit** C/W AY = Assembly Location= Year Junction−to−Ambient − Steady State (Note 2) R JA 48 WW = Work Week 5C464N= Device Code 1. The entire application environment impacts the thermal resistance values shown, G = Pb−Free Package 

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information  on page 5 of this data sheet. 

Publication Order Number: **NVD5C464N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2015 **May, 2021 − Rev. 2** 

**NVD5C464N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TJ|= 25°C unless|otherwise noted)|otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||22||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 40�A||2.0||4.0|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||6.8||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 30 A|||4.8|5.8|m�|
|Forward Transconductance|gFS|VDS= 3 V, ID= 30 A|||55||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCES**||||||||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 25 V|||1200||pF|
|Output Capacitance|Coss||||580|||
|Reverse Transfer Capacitance|Crss||||32|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 32 V,<br>ID= 30 A|||20||nC|
|Threshold Gate Charge|QG(TH)||||3.7|||
|Gate−to−Source Charge|QGS||||6.2|||
|Gate−to−Drain Charge|QGD||||4.0|||
|Plateau Voltage|VGP||||5.0||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(on)|VGS= 10 V, VDS= 32 V,<br>ID= 30 A, RG= 2.5�|||9||ns|
|Rise Time|tr||||40|||
|Turn−Off Delay Time|td(off)||||18|||
|Fall Time|tf||||5|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 30 A|TJ= 25°C||0.9|1.2|V|
||||TJ= 125°C||0.8|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt<br>IS= 30|= 100 A/�s,<br>A||32||ns|
|Charge Time|ta||||16|||
|Discharge Time|tb||||17|||
|Reverse Recovery Charge|QRR||||20||nC|



4. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVD5C464N** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
100 100<br>VGS = 8 V to 10 V 7.0 V<br>VDS = 3 V<br>80 80<br>60 60<br>6.0 V<br>40 5.2 V 40<br>5.0 V TJ = 25 ° C<br>20 4.8 V 20<br>. 4.6 V<br>4.4 V TJ = 125 ° C TJ = −55 ° C<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 2 3 4 5 6<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>16 16<br>TJ = 25 ° C TJ = 25 ° C<br>ID = 30 A<br>12 12<br>VGS = 10 V<br>8 8<br>4 4<br>0 0<br>3 4 5 6 7 8 9 10 5 10 15 20 25 30 35 40 45 50<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
2.0 100000<br>1.8 V GS = 10 V 10000 TJ = 175 ° C<br>ID = 30 A TJ = 150 ° C<br>1.6 1000 TJ = 125 ° C<br>1.4 100 TJ = 85 ° C<br>1.2 10<br>TJ = 25 ° C<br>1.0 1<br>0.8 0.1<br>0.6 0.01<br>−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

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**3** 

**NVD5C464N** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
10000<br>C ISS<br>1000<br>COSS<br>100<br>CRSS<br>10<br>VGS = 0 V<br>TJ = 25 ° C<br>f = 1 MHz<br>1<br>0 5 10 15 20 25 30 35 40<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

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**----- Start of picture text -----**<br>
10<br>9<br>8<br>7<br>6 Q GS Q GD<br>5<br>4<br>3<br>2 V DS  = 32 V<br>TJ = 25 ° C<br>1 I D  = 30 A<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>QG, TOTAL GATE CHARGE (nC)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source vs. Total Charge** 

**==> picture [490 x 384] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 100<br>VGS = 10 V VGS = 0 V<br>VDS = 32 V<br>ID = 17 A<br>100 10<br>tr<br>t d(off)<br>10 t d(on) 1<br>tf<br>1 0.1 TJ = 125 ° C TJ = 25 ° C TJ = −55 ° C<br>1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000 100<br>TC = 25 ° C<br>VGS ≤  10 V<br>Single Pulse<br>100<br>TJ (initial) = 25 ° C<br>10 10<br>10  � s<br>0.5 ms T J  (initial) = 100 ° C<br>1<br>RDS(on) Limit 1 ms<br>Thermal Limit 10 ms<br>Package Limit<br>0.1 1<br>0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, (A)<br>IPEAK<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. IPEAK vs. Time in Avalanche** 

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**4** 

**NVD5C464N** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
10<br>50% Duty Cycle<br>20%<br>1<br>10%<br>5%<br>2%<br>0.1<br>1%<br>Single Pulse<br>0.01<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br>R(t) (<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Characteristics** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Order Number**|**Package**|**Shipping**†|
|NVD5C464NT4G|DPAK<br>(Pb−Free)|2500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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**----- Start of picture text -----**<br>
4 DPAK (SINGLE GAUGE)<br>CASE 369C<br>ISSUE F<br>1 [2]<br>DATE 21 JUL 2015<br>3<br>SCALE 1:1<br>NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>L1 CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 90  CW � GENERIC<br>MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW<br>ALYWW XXX<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>IC Discrete<br>SOLDERING FOOTPRINT* XXXXXX = Device Code<br>6.20 3.00 A = Assembly Location<br>0.244 0.118 L = Wafer Lot<br>2.58 Y =  Year<br>0.102 WW = Work Week<br>G = Pb−Free Package<br>5.80<br>1.60 6.17 *This information is generic. Please refer to<br>0.228<br>0.063 0.243 device data sheet for actual part marking.<br>Pb−Free indicator, “G” or microdot “ � ”, may<br>or may not be present. Some products may<br>not follow the Generic Marking.<br>SCALE 3:1<br>� inches [mm] �<br>**----- End of picture text -----**<br>


- *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

## **DOCUMENT NUMBER: 98AON10527D** 

**DESCRIPTION: DPAK (SINGLE GAUGE)** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

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