NVD5C454NLT4G

NVD5C454NL 

## Power MOSFET 

## **40 V, 3.9 m 88 A, Single N−Channel** 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

**www.onsemi.com V(BR)DSS RDS(on) ID** 3.9 m @ 10 V 40 V 88 A ~~Se~~ 5.7 m @ 4.5 V D 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

5.7 m @ 4.5 V ~~a~~ **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 40 V D Gate−to−Source Voltage VGS 20 V ~~a~~ Continuous Drain CurTC = 25 ° C ID 84 A rent R JC (Notes 1 & 3) Steady ~~|~~ TC = 100 ° C ~~|~~ 60 Power Dissipation R JC State TC = 25 ° C PD 56 W G (Note 1) TC = 100 ° C 28 Continuous Drain TA = 25 ° C ID 20 A S Current R(Notes 1, 2 & 3)JA Steady TA = 100 ° C 14 **N−CHANNEL MOSFET** Power Dissipation R JA State TA = 25 ° C PD 3.1 W 4 ~~Pe~~ (Notes 1 & 2) TA = 100 ° C ~~Ee~~ 1.5 Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 463 A 1[[2]] ~~pt~~ Operating Junction and Storage Temperature TJ, Tstg −55 to ° C ~~2~~ 3 175 ~~ee~~ **DPAK** Source Current (Body Diode) IS 46 A **CASE 369C STYLE 2** Single Pulse Drain−to−Source Avalanche EAS 205 mJ ~~ee~~ Energy (TJ = 25 ° C, IL(pk) = 8.3 A) **MARKING DIAGRAM** Lead Temperature for Soldering Purposes(1/8 ″ from case for 10 s) TL 260 ° C **& PIN ASSIGNMENT** ~~ee~~ 

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G<br>S<br>N−CHANNEL MOSFET<br>4<br>1 [[2]]<br>2 3<br>DPAK<br>CASE 369C<br>STYLE 2<br>**----- End of picture text -----**<br>


## **MARKING DIAGRAM & PIN ASSIGNMENT** 

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4<br>Drain<br>= 2<br>1 Drain 3<br>Gate Source<br>A = Assembly Location<br>Y = Year<br>WW = Work Week<br>5C454NL = Device Code<br>G = Pb−Free Package<br>AYWW 5C 454NLG<br>**----- End of picture text -----**<br>


Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. **THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit** ~~a~~ Junction−to−Case (Drain) (Note 1) R JC 2.7 ° C/W 

|**Parameter**<br>~~a~~|**Symbol**|**Value**|**Unit**|
|---|---|---|---|
|Junction−to−Case (Drain) (Note 1)<br>~~a~~|R JC|2.7|°C/W|
|Junction−to−Ambient − SteadyState(Note 2)<br>~~a~~|R JA|48.4||



1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 5 of this data sheet. 

Publication Order Number: **NVD5C454NL/D** 

**1** 

© Semiconductor Components Industries, LLC, 2017 **December, 2017 − Rev. 0** 

**NVD5C454NL** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TJ|= 25°C unless|otherwise noted)|otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||11||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 70�A||1.2||2.2|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||5.2||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 4.5 V, ID= 40 A|||4.5|5.7|m�|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 40 A|||3.3|3.9|m�|
|Forward Transconductance|gFS|VDS= 3 V, ID= 40 A|||106||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCES**||||||||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 25 V|||2600||pF|
|Output Capacitance|Coss||||1000|||
|Reverse Transfer Capacitance|Crss||||43|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 32 V,<br>ID= 40 A|||21||nC|
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 32 V,<br>ID= 40 A|||43||nC|
|Threshold Gate Charge|QG(TH)||||4.5|||
|Gate−to−Source Charge|QGS||||8.4|||
|Gate−to−Drain Charge|QGD||||6.9|||
|Plateau Voltage|VGP||||3.3||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(on)|VGS= 10 V, VDS= 32 V,<br>ID= 40 A, RG= 2.5�|||10||ns|
|Rise Time|tr||||38|||
|Turn−Off Delay Time|td(off)||||33|||
|Fall Time|tf||||7|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 40 A|TJ= 25°C||0.88|1.2|V|
||||TJ= 125°C||0.78|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt<br>IS= 40|= 100 A/�s,<br>A||43||ns|
|Charge Time|ta||||21|||
|Discharge Time|tb||||21|||
|Reverse Recovery Charge|QRR||||30||nC|



4. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVD5C454NL** 

## **TYPICAL CHARACTERISTICS** 

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VGS = 4.2 V − 10 V<br>120 120<br>4 V 3.6 V VDS = 3 V<br>100 100<br>80 3.4 V 80<br>60 3.2 V 60 TJ = 25 ° C<br>40 40<br>3 V<br>20 2.8 V 20 TJ = 125 ° C<br>2.6 V TJ = −55 ° C<br>0 0<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 6<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>6.5 6.5<br>TJ = 25J = 25 = 25J = 25 = 25 = 25 ° C TJ = 25J = 25 = 25 ° C<br>ID = 40 AD = 40 A = 40 AD = 40 A = 40 A = 40 A<br>5.5 5.5<br>4.5 4.5 VGS = 4.5 VGS = 4.5 V = 4.5 V<br>3.5 3.5 VGS = 10 VGS = 10 V = 10 V<br>2.5<br>2.5<br>1.5<br>3 4 5 6 7 8 9 10 1.555 10 15 20 25 30 35 40<br>VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)D, DRAIN CURRENT (A), DRAIN CURRENT (A)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>**----- End of picture text -----**<br>


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6.5<br>TJ = 25J = 25 = 25J = 25 = 25 = 25 ° C<br>ID = 40 AD = 40 A = 40 AD = 40 A = 40 A = 40 A<br>5.5<br>4.5<br>3.5<br>2.5<br>1.5<br>3 4 5 6 7 8 9 10<br>VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>) �<br>, DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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TJ = 25J = 25 = 25J = 25 = 25 = 25 ° C TJ = 25J = 25 = 25 ° C<br>ID = 40 AD = 40 A = 40 AD = 40 A = 40 A = 40 A<br>5.5 5.5<br>4.5 4.5 VGS = 4.5 VGS = 4.5 V = 4.5 V<br>3.5 3.5 VGS = 10 VGS = 10 V = 10 V<br>2.5<br>2.5<br>1.5<br>3 4 5 6 7 8 9 10 1.555 10 15 20 25 30 35 40<br>VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)D, DRAIN CURRENT (A), DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>2.0 100k<br>VIDGS = 40 A = 10 V 10k TJ = 175 ° C T J  = 150 ° C<br>TJ = 125 ° C<br>1.5<br>1k<br>TJ = 85 ° C<br>100.00<br>1.0<br>10.00<br>1.00 TJ = 25 ° C<br>0.5<br>0.10<br>0.0 0.01<br>−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**Figure 5. On−Resistance Variation with Temperature** 

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**3** 

**NVD5C454NL** 

## **TYPICAL CHARACTERISTICS** 

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10,000<br>CISS<br>1,000 COSS<br>100<br>CRSS<br>VGS = 0 V<br>T J = 25 ° C<br>f = 1 MHz<br>10<br>0 5 10 15 20 25 30 35 40<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 7. Capacitance Variation<br>1000<br>VGS = 10 V<br>VDS = 32 V<br>I D = 40 A<br>100 tr t d(off)<br>tf<br>t d(on)<br>10<br>1<br>1 10 100<br>RG, GATE RESISTANCE ( � )<br>Figure 9. Resistive Switching Time Variation<br>vs. Gate Resistance<br>1000<br>VGS ≤  10 V<br>Single Pulse<br>100 TC = 25 ° C 10  � s<br>10<br>0.5 ms<br>1 1 ms<br>RDS(on) Limit 10 ms<br>Thermal Limit<br>Package Limit<br>0.1<br>0.1 1 10 100 1000<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>t, TIME (ns)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


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10<br>9 VDS = 32 V<br>ID = 40 A<br>8 TJ = 25 ° C<br>7<br>6<br>5<br>4 Q GS Q GD<br>3<br>2<br>1<br>0<br>0 5 10 15 20 25 30 35 40 45<br>QG, TOTAL GATE CHARGE (nC)<br>Figure 8. Gate−to−Source vs. Total Charge<br>100<br>VGS = 0 V<br>10<br>TJ = 125 ° C<br>1 TJ = 25 ° C<br>TJ = −55 ° C<br>0.1<br>0.3 0.4 0.5 0.6 0.7 0.8 0.9 1<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 10. Diode Forward Voltage vs. Current<br>100<br>T J(initial)  = 25 ° C<br>10 TJ(initial) = 100 ° C<br>1<br>0.00001 0.0001 0.001 0.01<br>TIME IN AVALANCHE (s)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>, SOURCE CURRENT (A)<br>IS<br>, (A)<br>IPEAK<br>**----- End of picture text -----**<br>


**Figure 12. Maximum Drain Current vs. Time in Avalanche** 

**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

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**4** 

**NVD5C454NL** 

## **TYPICAL CHARACTERISTICS** 

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100<br>Duty Cycle = 50%<br>20%<br>10 10%<br>5%<br>2%<br>1 1%<br>0.1 Single Pulse<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br>R(t) (<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Order Number**|**Package**|**Shipping**†|
|NVD5C454NLT4G|DPAK<br>(Pb−Free)|2500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

**NVD5C454NL** 

## **PACKAGE DIMENSIONS** 

**DPAK (SINGLE GAUGE)** CASE 369C ISSUE F 

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NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 bl Ee Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>oe b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>tof L1 By co CONSTRUCTIONS t ALTERNATE Ga h Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 9  CW SOLDERING FOOTPRINT* STYLE 2:<br>PIN 1. GATE<br>2. DRAIN<br>6.20 3.00 3. SOURCE<br>0.244 0.118 4. DRAIN<br>2.58<br>PET<br>0.102<br>5.80<br>1.60 6.17<br>0.228<br>0.063 0.243<br>Ls"<br>SCALE 3:1 mm<br>inches<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>**----- End of picture text -----**<br>


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