NVD5C446NT4G

**DATA SHEET www.onsemi.com** 

## MOSFET – Power, Single N-Channel 40 V, 3.5 m **�** , 101 A 

## NVD5C446N 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

- AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

|**MAXIMUM RATINGS**(TJ= 25°C|**MAXIMUM RATINGS**(TJ= 25°C|unless otherw|ise noted)|||
|---|---|---|---|---|---|
|**Parameter**|||**Symbol**|**Value**|**Unit**|
|Drain−to−Source Voltage|||VDSS|40|V|
|Gate−to−Source Voltage|||VGS|�20|V|
|Continuous Drain Cur-<br>rent R�JC(Notes 1 & 3)|Steady<br>State|TC= 25°C|ID|105|A|
|||TC= 100°C||74||
|Power Dissipation R�JC<br>(Note 1)||TC= 25°C|PD|66|W|
|||TC= 100°C||33||
|Continuous Drain<br>Current R�JA<br>(Notes 1, 2 & 3)|Steady<br>State|TA= 25°C|ID|22|A|
|||TA= 100°C||16||
|Power Dissipation R�JA<br>(Notes 1 & 2)||TA= 25°C|PD|3.1|W|
|||TA= 100°C||1.5||
|Pulsed Drain Current|TA= 25°C, tp= 10�s||IDM|590|A|
|Operating Junction and Storage Temperature|||TJ, Tstg|−55 to<br>175|°C|
|Source Current (Body Diode)|||IS|73|A|
|Single Pulse Drain−to−Source Avalanche<br>Energy (TJ= 25°C, IL(pk)= 11 A)|||EAS|214|mJ|
|Lead Temperature for Soldering Purposes<br>(1/8″from case for 10 s)|||TL|260|°C|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

|**V(BR)DSS**|**RDS(on)**|**ID**|
|---|---|---|
|40 V|3.5 m�@ 10 V|101 A|



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N−CHANNEL MOSFET<br>**----- End of picture text -----**<br>


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4<br>1 [2]<br>3<br>DPAK<br>CASE 369C<br>STYLE 2<br>MARKING DIAGRAM<br>& PIN ASSIGNMENT<br>4<br>Drain<br>2<br>1 Drain 3<br>Gate Source<br>A = Assembly Location<br>Y = Year<br>WW = Work Week<br>5C446N= Device Code<br>G = Pb−Free Package<br>AYWW 5C 446NG<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**Parameter**|**Symbol**|**Value**|**Unit**|
|---|---|---|---|
|Junction−to−Case (Drain) (Note 1)|R�JC|2.28|°C/W|
|Junction−to−Ambient − Steady State (Note 2)|R�JA|48||



1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NVD5C446N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2015 **March, 2022 − Rev. 1** 

**NVD5C446N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TJ|= 25°C unless|otherwise noted)|otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||19||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||2.0||4.0|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||7.5||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 50 A|||2.9|3.5|m�|
|Forward Transconductance|gFS|VDS= 3 V, ID= 50 A|||100||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCES**||||||||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 25 V|||2300||pF|
|Output Capacitance|Coss||||1200|||
|Reverse Transfer Capacitance|Crss||||46|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 32 V,<br>ID= 50 A|||34.3||nC|
|Threshold Gate Charge|QG(TH)||||5.0|||
|Gate−to−Source Charge|QGS||||12.2|||
|Gate−to−Drain Charge|QGD||||5.8|||
|Plateau Voltage|VGP||||7.2||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(on)|VGS= 10 V, VDS= 32 V,<br>ID= 50 A, RG= 2.5�|||20||ns|
|Rise Time|tr||||62|||
|Turn−Off Delay Time|td(off)||||43|||
|Fall Time|tf||||17|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 50 A|TJ= 25°C||0.9|1.2|V|
||||TJ= 125°C||0.8|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt<br>IS= 50|= 100 A/�s,<br>A||46||ns|
|Charge Time|ta||||23|||
|Discharge Time|tb||||23|||
|Reverse Recovery Charge|QRR||||40||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NVD5C446N** 

## **TYPICAL CHARACTERISTICS** 

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200 200<br>VGS = 8 V to 10 V<br>7.0 V VDS = 3 V<br>160 160<br>120 120<br>6.0 V<br>80 5.2 V 80<br>5.0 V TJ = 25 ° C<br>40 4.8 V 40<br>4.6 V<br>4.4 V TJ = 125 ° C TJ = −55 ° C<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 2 3 4 5 6<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>10 4.0<br>9 TJ = 25 ° C TJ = 25 ° C<br>ID = 50 A 3.5<br>8 3.0 V GS = 10 V<br>7<br>2.5<br>6<br>5 2.0<br>4<br>1.5<br>3<br>1.0<br>2<br>1 0.5<br>0 0<br>3 4 5 6 7 8 9 10 10 20 30 40 50 60 70 80 90 100<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>2.0 100000<br>1.8 V GS = 10 V 10000 TJ = 150 ° C<br>ID = 50 A<br>1.6 1000 TJ = 125 ° C<br>1.4 100 TJ = 85 ° C<br>1.2 10<br>TJ = 25 ° C<br>1.0 1<br>0.8 0.1<br>0.6 0.01<br>−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

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**3** 

**NVD5C446N** 

## **TYPICAL CHARACTERISTICS** 

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10000<br>CISS<br>1000 C OSS<br>100<br>VGS = 0 V CRSS<br>TJ = 25 ° C<br>f = 1 MHz<br>10<br>0 5 10 15 20 25 30 35 40<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 7. Capacitance Variation<br>1000<br>VGS = 10 V<br>VDS = 32 V<br>I D  = 50 A<br>100<br>tr<br>td(off)<br>td(on)<br>10 tf<br>1 10 100<br>C, CAPACITANCE (pF)<br>t, TIME (ns)<br>**----- End of picture text -----**<br>


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RG, GATE RESISTANCE ( � )<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

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10<br>9<br>8 QGS QGD<br>7<br>6<br>5<br>4<br>3<br>2 V DS  = 32 V<br>TJ = 25 ° C<br>1 I D  = 50 A<br>0<br>0 5 10 15 20 25 30 35<br>QG, TOTAL GATE CHARGE (nC)<br>Figure 8. Gate−to−Source vs. Total Charge<br>100<br>VGS = 0 V<br>10<br>1 TJ = 125 ° C TJ = 25 ° C TJ = −55 ° C<br>0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 10. Diode Forward Voltage vs. Current** 

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1000 100<br>TC = 25 ° C<br>VGS ≤  10 V<br>Single Pulse<br>100 T J  (initial) = 25 ° C<br>TJ (initial) = 100 ° C<br>10 10<br>10  � s<br>1<br>RDS(on) Limit 0.5 ms<br>Thermal Limit 1 ms<br>Package Limit 10 ms<br>0.1 1<br>0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)<br>, (A)<br>IPEAK<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. IPEAK vs. Time in Avalanche** 

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**4** 

**NVD5C446N** 

## **TYPICAL CHARACTERISTICS** 

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10<br>50% Duty Cycle<br>1<br>20%<br>10%<br>5%<br>0.1 2%<br>1%<br>Single Pulse<br>0.01<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 10000<br>PULSE TIME (sec)<br>C/W)<br>°<br>R(t) (<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Characteristics** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Order Number**|**Package**|**Shipping**†|
|NVD5C446NT4G|DPAK<br>(Pb−Free)|2500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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4 DPAK (SINGLE GAUGE)<br>CASE 369C<br>ISSUE F<br>1 ® [2]<br>DATE 21 JUL 2015<br>3<br>SCALE 1:1<br>NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 Ele 4| Of Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>wat L1 h GF CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 9  CW GENERIC<br>MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW<br>ALYWW XXX<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE a d<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>IC Discrete<br>SOLDERING FOOTPRINT* XXXXXX = Device Code<br>A = Assembly Location<br>6.20 3.00<br>L = Wafer Lot<br>0.244 0.118<br>2.58 Y =  Year<br>0.102 WW = Work Week<br>G = Pb−Free Package<br>5.80 *This information is generic. Please refer<br>0.228 1.60 6.17 to device data sheet for actual part<br>0.063 0.243 marking.<br>Ts.<br>SCALE 3:1 mm<br>inches<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK (SINGLE GAUGE) PAGE 1 OF 1** ~~ee~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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