NTMD4N03R2G

## NTMFS4927N, NTMFS4927NC 

## Power MOSFET **30 V, 38 A, Single N−Channel, SO−8 FL Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low Capacitance to Minimize Driver Losses 

• Optimized Gate Charge to Minimize Switching Losses **http://onsemi.com** • Optimized for 5 V, 12 V Gate Drives • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS **V(BR)DSS RDS(ON) MAX ID MAX** Compliant 7.3 m @ 10 V **Applications** 30 V 38 A • CPU Power Delivery ~~ae~~ 12.0 m @ 4.5 V • DC−DC Converters **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) D (5,6) **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ± 20 V G (4) Continuous Drain TA = 25 ° C ID 13.6 A ~~SES~~ Current R(Note 1) JA TA = 100 ° C 8.6 ~~B~~ S (1,2,3) Power Dissipation TA = 25 ° C PD 2.70 W **N−CHANNEL MOSFET** R JA (Note 1) ~~ee~~ Continuous Drain ee ~~e~~ TA = 25 ° C ~~e~~ ID ~~**e**~~ 20.4 ~~ee~~ A **MARKING** Current R(Note 1) JA ≤ 10 s TA = 100 ° C 12.9 **DIAGRAM** Power Dissipation TA = 25 ° C PD 6.04 W D R JA ≤ 10 s (Note 1) Steady 1 S D ~~ee|~~ Continuous DrainCurrent R(Note 2) JA State ee ~~eeE~~ TTAA = 100 = 25 °° CC e ID **e** ~~ee~~ 7.95.0 A **SO−8 FLAT LEADCASE 488AASTYLE 1** GSS AYWZZ4927N ! D Power Dissipation TA = 25 ° C PD 0.92 W D R JA (Note 2) 4927N = Specific Device Code ~~a~~ Continuous Drain ee ~~ee~~ TC = 25 ° C ID 38 A A = Assembly Location ~~co)~~ Current R(Note 1) JC ~~FTE"~~ TC =100 ° C ee 24 ~~ee~~ YW = Year= Work Week Power Dissipation TC = 25 ° C PD 20.8 W ZZ = Lot Traceability ~~Sietee~~ RPulsed DrainJC (Note 1) TA ~~ee~~ = 25 ° C, tp = 10 s ~~ee ee~~ IDM ~~ee~~ 160 A ~~=~~ Current **ORDERING INFORMATION** Current Limited by Package TA = 25 ° C IDmax 100 A ~~pt~~ Operating Junction and Storage ~~Tt~~ TJ, −55 to ° C **Device Package Shipping**[†] Temperature TSTG +150 NTMFS4927NT1G SO−8 FL 1500 / Source Current (Body Diode) IS 21 A NTMFS4927NCT1G (Pb−Free) Tape & Reel Drain to Source DV/DT dV/dt 6.0 V/ns NTMFS4927NT3G SO−8 FL 5000 / ~~ee~~ Single Pulse Drain−to−Source AvalancheEnergy (TJ = 25 ° C, VDD = 24 V, VGS = 20 V, ~~ee~~ EAS ~~eee~~ 20 mJ ~~——~~ †For information on tape and reel specifications,NTMFS4927NCT3G (Pb−Free) Tape & Reel ~~ee~~ IL = 20 Apk, L = 0.1 mH, RG = 25 ) including part orientation and tape sizes, please Lead Temperature for Soldering Purposes TL 260 ~~ae~~ ° C refer to our Tape and Reel Packaging Specifications ~~ee~~ (1/8 ″ from case for 10 s) ~~ee ee~~ Brochure, BRD8011/D. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

Publication Order Number: **NTMFS4927N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2012 **June, 2012 − Rev. 8** 

**NTMFS4927N, NTMFS4927NC** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**THERMAL RESISTANCE MAXIMUM RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Value**|**Unit**|
|Junction−to−Case (Drain)|R�JC|6.0|°C/W|
|Junction−to−Ambient – Steady State (Note 3)|R�JA|46.3||
|Junction−to−Ambient – Steady State (Note 4)|R�JA|136.2||
|Junction−to−Ambient – (t≤10 s) (Note 3)|R�JA|20.7||



3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

4. Surface−mounted on FR4 board using the minimum recommended pad size. 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||30|||V|
|Drain−to−Source Breakdown Voltage<br>(transient)|V(BR)DSSt|VGS = 0 V, ID(aval)= 8.4 A,<br>Tcase= 25°C, ttransient= 100 ns||34|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||24||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 24 V|TJ= 25°C|||1.0|�A|
||||TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA|
|**ON CHARACTERISTICS**(Note 5)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.32|1.6|2.2|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||3.7||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 30 A||5.8|7.3|m�|
||||ID= 15 A||5.7|||
|||VGS= 4.5 V|ID= 30 A||9.6|12||
||||ID= 15 A||9.2|||
|Forward Transconductance|gFS|VDS= 1.5 V, ID= 15 A|||40||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 15 V|||913||pF|
|Output Capacitance|COSS||||366|||
|Reverse Transfer Capacitance|CRSS||||108|||
|Capacitance Ratio|CRSS/<br>CISS|VGS= 0 V, VDS= 15 V, f = 1 MHz|||0.118|0.237||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||8.0||nC|
|Threshold Gate Charge|QG(TH)||||1.6|||
|Gate−to−Source Charge|QGS||||3.1|||
|Gate−to−Drain Charge|QGD||||3.1|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V; ID= 30 A|||16.0||nC|
|**SWITCHING CHARACTERISTICS**(Note 6)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||9.2||ns|
|Rise Time|tr||||25.5|||
|Turn−Off Delay Time|td(OFF)||||14.0|||
|Fall Time|tf||||4.4|||



5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

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**2** 

## **NTMFS4927N, NTMFS4927NC** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**SWITCHING CHARACTERISTICS**(Note 6)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||6.5||ns|
|Rise Time|tr||||21.0|||
|Turn−Off Delay Time|td(OFF)||||18.0|||
|Fall Time|tf||||3.0|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 30 A|TJ= 25°C||0.87|1.1|V|
||||TJ= 125°C||0.76|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 30 A|||21.4||ns|
|Charge Time|ta||||10.5|||
|Discharge Time|tb||||10.9|||
|Reverse Recovery Charge|QRR||||8.4||nC|
|**PACKAGE PARASITIC VALUES**||||||||
|Source Inductance|LS|TA= 25°C|||1.00||nH|
|Drain Inductance|LD||||0.005||nH|
|Gate Inductance|LG||||1.84||nH|
|Gate Resistance|RG||||0.90|2.2|�|



5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

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**3** 

**NTMFS4927N, NTMFS4927NC** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 591] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 100<br>10 V °<br>4.5 V TJ = −55 C<br>90 90<br>80 TJ = 25 ° C 4.0 V 80 TJ = 25 ° C<br>70 70<br>60 3.5 V 60 VDS = 10 V TJ = 125 ° C<br>50 50<br>40 40<br>3.0 V<br>30 30<br>20 20<br>10 VGS = 2.5 V 10<br>0 0<br>0 1 2 3 4 5 1 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.015 0.019<br>0.014 ID = 30 A 0.017 T = 25 ° C<br>0.013<br>0.015<br>0.012<br>0.011 0.013<br>0.010 0.011 V GS  = 4.5 V<br>0.009<br>0.008 0.009<br>0.007 0.007<br>VGS = 10 V<br>0.006<br>0.005<br>0.005<br>0.004 0.003<br>3 4 5 6 7 8 9 10 10 20 30 40 50 60 70 80 90 100<br>VGS (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and<br>Gate Voltage<br>1.7 10,000<br>1.61.5 VIDGS = 30 A = 10 V TJ = 150 ° C<br>1.4<br>1,000 TJ = 125 ° C<br>1.3<br>1.2<br>1.1<br>1.0<br>100<br>0.9 TJ = 85 ° C<br>0.8<br>0.7 VGS = 0 V<br>0.6 10<br>−50 −25 0 25 50 75 100 125 150 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, DRAIN−TO−SOURCE<br>IDSS<br>DS(on)<br>R RESISTANCE (NORMALIZED)<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**==> picture [187 x 20] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6. Drain−to−Source Leakage Current<br>vs. Voltage<br>**----- End of picture text -----**<br>


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**4** 

**NTMFS4927N, NTMFS4927NC** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 591] intentionally omitted <==**

**----- Start of picture text -----**<br>
1200 11<br>T J  = 25 ° C 10 QT<br>1000 Ciss VGS = 0 V 9<br>8<br>800<br>7<br>6<br>600<br>Coss 5<br>400 4 Qgs Qgd TJ = 25J = 25 = 25 ° C<br>3<br>2 V GS  = 10 V<br>200 C rss VDD = 15 VDD = 15 V = 15 V<br>1<br>ID = 30 AD = 30 A = 30 A<br>0 0<br>0 5 10 15 20 25 30 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)<br>Figure 7. Capacitance Variation Figure 8. Gate−to−Source and<br>Drain−to−Source Voltage vs. Total Charge<br>1000 30<br>VGS = 0 V<br>25<br>VGS = 10 V<br>100 VIDDD = 15 A = 15 V td(off) 20<br>tf<br>tr 15<br>10 td(on) 10<br>TJ = 125 ° C TJ = 25 ° C<br>5<br>1 0<br>1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000 20<br>18 I D = 20 A<br>100 16<br>10  � s 14<br>10 12<br>100  � s<br>10<br>1 ms<br>1 0 V < VGS < 10 V 10 ms 8<br>Single Pulse<br>TC = 25 ° C 6<br>0.1 RDS(on) Limit dc 4<br>Thermal Limit<br>2<br>Package Limit<br>0.01 0<br>0.01 0.1 1 10 100 25 50 75 100 125 150<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE ( ° C)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID , SINGLE PULSE DRAIN−TO−<br>AS<br>E<br>SOURCE AVALANCHE ENERGY (mJ)<br>**----- End of picture text -----**<br>


**==> picture [240 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
11<br>QT<br>10<br>9<br>8<br>7<br>6<br>5<br>4 Qgs Qgd TJ = 25J = 25 = 25 ° C<br>3<br>2 V GS  = 10 V<br>VDD = 15 VDD = 15 V = 15 V<br>1<br>ID = 30 AD = 30 A = 30 A<br>0<br>0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** 

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**5** 

**NTMFS4927N, NTMFS4927NC** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [480 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>D = 0.5<br>0.2<br>10<br>0.1<br>0.05<br>0.02<br>1<br>0.01<br>0.1<br>SINGLE PULSE<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>t, TIME (s)<br>r(t)C/W)<br>( °<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

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**6** 

**NTMFS4927N, NTMFS4927NC** 

## **PACKAGE DIMENSIONS** 

**==> picture [475 x 581] intentionally omitted <==**

**----- Start of picture text -----**<br>
DFN5 5x6, 1.27P<br>(SO−8FL)<br>CASE 488AA<br>ISSUE G<br>2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>a D A 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>4 DIM MIN NOM MAX<br>A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.15 BSC<br>2 D1 4.50 4.90 5.10<br>c D2 3.50 −−− 4.22<br>a A1 E 6.15 BSC<br>HH f ec t —= E1 5.50 5.80 6.10<br>P 1 2 3 T 4 ify EEE E2 3.45 −−− 4.30<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.61 0.71<br>3 X C K 1.20 1.35 1.50<br>0.10 C S e h SEATINGPLANE = L1L 0.510.05 0.610.17 0.710.20<br>M 3.00 3.40 3.80<br>A DETAIL A 0  −−− 12<br>a ae<br>0.10 C STYLE 1:<br>PIN 1. SOURCE<br>SF SIDE VIEW DETAIL A SOLDERING FOOTPRINT*  2. 3. SOURCESOURCE<br> 4. GATE<br>3X 4X  5. DRAIN<br>8X b 1.270 0.750<br>4X<br>0.10 C A B 1.000<br>0.05 c L e/2<br>1 fe 4 0.965 b oo ts<br>K<br>1.330 2X<br>ft an a 0.905<br>E2 2X<br>PIN 5 M 0.495 4.530<br>(EXPOSED PAD) L1<br>3.200<br>0.475<br>G ac D2 and<br>2X<br>BOTTOM VIEW 1.530<br>rah Lo 4.560  eS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>ON Semiconductor  and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC owns the rights to a number of patents, trademarks,<br>copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC<br>reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any<br>particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without<br>limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications<br>and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC<br>does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for<br>surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where<br>personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and<br>its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,<br>any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture<br>of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner.<br>**----- End of picture text -----**<br>


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**NTMFS4927N/D** 

**7**