NTLJD4116NT1G

## NTLJD4116N MOSFET – Power, Dual, N-Channel, WDFN 2X2 mm ~~—~~ 30 V, 4.6 A 

## **Features** 

## **http://onsemi.com** 

- WDFN Package Provides Exposed Drain Pad for Excellent Thermal Conduction 

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V(BR)DSS RDS(on) MAX ID MAX  (Note 1)<br>70 m  @ 4.5 V<br>30 V 90 m  @ 2.5 V 4.6 A<br>125 m  @ 1.8 V<br>250 m  @ 1.5 V<br>Ss<br>D<br>G<br>S<br>N−CHANNEL MOSFET<br>**----- End of picture text -----**<br>


- 2x2 mm Footprint Same as SC−88 

- Lowest RDS(on) Solution in 2x2 mm Package 

- 1.5 V RDS(on) Rating for Operation at Low Voltage Gate Drive Logic Level 

- Low Profile (< 0.8 mm) for Easy Fit in Thin Environments 

- This is a Pb−Free Device 

## **Applications** 

- DC−DC Converters (Buck and Boost Circuits) 

- Low Side Load Switch 

- Optimized for Battery and Load Management Applications in Portable Equipment such as, Cell Phones, PDA’s, Media Players, etc. 

- Level Shift for High Side Load Switch 

**MAXIMUM RATINGS** (TJ = 25J = 25 = 25 ° C unless otherwise noted) 

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|||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|MAXIMUM RATINGS|(TJ = 25J = 25 = 25|°|C unless otherwise noted)|MARKING|
|ee|Parameter|Symbol|es|Value|ee|Unit|DIAGRAM|
|Drain−to−Source Voltage|VDSS|30|V|WDFN6|1|JFM|6|
|2|5|
|Gate−to−Source Voltage|VGS|±|8.0|V|CASE 506AN|3|4|
|Continuous Drain|Steady|TA = 25|°|C|ID|3.7|A|1|
|Current (Note 1)|State|TA = 85|°|C|2.7|JF|= Specific Device Code|
|M|= Date Code|
|ie|t|≤|5 s|TA = 25|°|C|4.6|= Pb−Free Package|
|Power Dissipation|Steady|PD|1.5|W|(Note: Microdot may be in either location)|
|(Note 1)|State|TA = 25|°|C|
|PIN CONNECTIONS|
|t|≤|5 s|2.3|
|FF|Continuous Drain|oF|TA = 25|°|C|ID|2.5|A|D1|
|Current (Note 2)|Steady|TA = 85|°|C|1.8|S1|1|6|D1|
|State|
|7|Power Dissipation(Note 2)|ae|TA = 25|°|C|PD|0.71|W|G1|2|_|5|G2|
|eer|
|Pulsed Drain Current|tp|= 10 s|IDM|20|A|D2|
|Operating Junction and Storage Temperature|TJ, TSTG|−55 to|°|C|D2|3|4|S2|
|150|
|Source Current (Body Diode) (Note 2)|IS|2.0|A|
|a|(Top View)|
|Lead Temperature for Soldering Purposes|TL|260|°|C|
|es|(1/8|″|from case for 10 s)|ORDERING INFORMATION|
|Maximum ratings are those values beyond which device damage can occur.|
|Maximum ratings applied to the device are individual stress limit values (not|Device|Package|Shipping|[†]|
|normal operating conditions) and are not valid simultaneously. If these limits are|
|exceeded, device functional operation is not implied, damage may occur and|NTLJD4116NT1G|WDFN6|3000/Tape & Reel|
|reliability may be affected.|(Pb−Free)|
|1.|Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq|†For information on tape and reel specifications,|
|[2 oz] including traces).|
|including part orientation and tape sizes, please|
|2.|Surface Mounted on FR4 Board using the minimum recommended pad size|
|refer to our Tape and Reel Packaging Specification|
|of 30 mm|[[2]]|, 2 oz Cu.|
|Brochure, BRD8011/D.|

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Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 

2. Surface Mounted on FR4 Board using the minimum recommended pad size of 30 mm[[2]] , 2 oz Cu. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2006 **May, 2019 − Rev. 4** 

**NTLJD4116N/D** 

**NTLJD4116N** 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Max**|**Unit**|
|**SINGLE OPERATION (SELF−HEATED)**||||
|Junction−to−Ambient – Steady State (Note 3)|R�JA|83|°C/W|
|Junction−to−Ambient – Steady State Min Pad (Note 4)|R�JA|177||
|Junction−to−Ambient – t≤5 s (Note 3)|R�JA|54||
|**DUAL OPERATION (EQUALLY HEATED)**||||
|Junction−to−Ambient – Steady State (Note 3)|R�JA|58|°C/W|
|Junction−to−Ambient – Steady State Min Pad (Note 4)|R�JA|133||
|Junction−to−Ambient – t≤5 s (Note 3)|R�JA|40||



3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 

4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm[2] , 2 oz Cu). 

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**2** 

## **NTLJD4116N** 

**MOSFET ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**Parameter**|**Symbol**|**Test Conditions**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||30|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ|ID= 250�A, Ref to 25°C|||18.1||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VDS= 24 V, VGS= 0 V|TJ= 25°C|||1.0|�A|
||||TJ= 85°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±8.0 V||||100|nA|
|**ON CHARACTERISTICS**(Note 5)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||0.4|0.7|1.0|V|
|Negative Gate Threshold<br>Temperature Coefficient|VGS(TH)/TJ||||2.8||mV/°C|
|Drain−to−Source On−Resistance|RDS(on)|VGS= 4.5, ID= 2.0 A|||47|70|m�|
|||VGS= 2.5, ID= 2.0 A|||56|90||
|||VGS= 1.8, ID= 1.8 A|||88|125||
|||VGS= 1.5, ID= 1.5 A|||133|250||
|Forward Transconductance|gFS|VDS= 5.0 V, ID= 2.0 A|||4.5||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1.0 MHz,<br>VDS= 15 V|||427||pF|
|Output Capacitance|COSS||||51|||
|Reverse Transfer Capacitance|CRSS||||32|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V,<br>ID= 2.0 A|||5.4|6.5|nC|
|Threshold Gate Charge|QG(TH)||||0.5|||
|Gate−to−Source Charge|QGS||||0.8|||
|Gate−to−Drain Charge|QGD||||1.24|||
|Gate Resistance|RG||||0.37||�|
|**SWITCHING CHARACTERISTICS**(Note 6)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDD= 15 V,<br>ID= 2.0 A, RG= 2.0�|||4.8||ns|
|Rise Time|tr||||11.8|||
|Turn−Off Delay Time|td(OFF)||||14.2|||
|Fall Time|tf||||1.7|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Recovery Voltage|VSD|VGS= 0 V, IS = 2.0 A|TJ= 25°C||0.78|1.2|V|
||||TJ= 125°C||0.62|||
|Reverse Recovery Time|tRR|VGS= 0 V, dISD/dt= 100 A/�s,<br>IS= 2.0 A|||10.5||ns|
|Charge Time|ta||||7.6|||
|Discharge Time|tb||||2.9|||
|Reverse Recovery Time|QRR||||5.0||nC|



5. Pulse Test: Pulse Width � 300 � s, Duty Cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

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**3** 

**NTLJD4116N** 

## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) 

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5<br>VGS = 1.7 V to 8 V TJ = 25 ° C<br>1.6 V<br>4<br>3 1.5 V<br>2 1.4 V<br>1.3 V<br>1<br>1.2 V<br>0<br>0 1 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>, DRAIN CURRENT (AMPS)<br>ID<br>**----- End of picture text -----**<br>


**Figure 1. On−Region Characteristics** 

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6<br>V DS ≥  10 V<br>4<br>2 TJ = 25 ° C<br>TJ = 100 ° C<br>T J  = −55 ° C<br>0<br>0 0.5 1 1.5 2 2.5 3<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>, DRAIN CURRENT (AMPS)<br>ID<br>**----- End of picture text -----**<br>


**Figure 2. Transfer Characteristics** 

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0.07 0.14<br>VGS = 4.5 V 0.13 TJ = 25 ° C<br>TJ = 100 ° C<br>0.06 0.12<br>0.11<br>0.05 0.1<br>TJ = 25 ° C 0.09 VGS = 1.8 V<br>0.04 0.08<br>0.07 VGS = 2.5 V<br>0.03 TJ = −55 ° C 0.06<br>0.05 VGS = 4.5 V<br>0.02 0.04<br>1.0 1.5 2.0 2.5 1 2 3 4 5<br>ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS)<br>Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance versus Drain Current<br>and Gate Voltage<br>1.6 100,000<br>ID = 2 A VGS = 0 V<br>VGS = 4.5 V<br>1.4<br>10,000<br>TJ = 150 ° C<br>1.2<br>1000<br>1.0<br>TJ = 100 ° C<br>100<br>0.8<br>0.6 10<br>−50 −25 0 25 50 75 100 125 150 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature versus Voltage<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED) IDSS<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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**NTLJD4116N** 

## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) 

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5 18<br>VDS = 0 V VGS = 0 V<br>1000 TJ = 25 ° C QT<br>15<br>4<br>800 VDS VGS<br>12<br>3<br>600<br>Ciss 9<br>2 QGS QGD<br>400<br>Crss 6<br>200 1<br>Coss ID = 2.0 A 3<br>TJ = 25 ° C<br>0 0 0<br>5 0 5 10 15 20 25 30 0 1 2 3 4 5 6<br>VGS VDS QG, TOTAL GATE CHARGE (nC)<br>C, CAPACITANCE (pF)<br>VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


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GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge** 

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1000 3<br>VI DDD  = 2.0 A = 15 V VGS = 0 V TJ = 125 ° C<br>VGS = 4.5 V TJ = 150 ° C<br>100 td(off) 2<br>tf TJ = 25 ° C<br>tr<br>10 td(on) 1<br>1 0<br>1 10 100 0.3 0.6 0.9<br>RG, GATE RESISTANCE (OHMS) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)<br>t, TIME (ns)<br>IS, SOURCE CURRENT (AMPS)<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation versus Gate Resistance** 

**Figure 10. Diode Forward Voltage versus Current** 

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100<br> TC = 25 ° C<br>TJ = 150 ° C<br>SINGLE PULSE 10  � s<br>10<br>100  � s<br>1 ms<br>1 10 ms<br>*See Note 2 on Page 1<br>0.1<br>RDS(on) LIMIT<br>THERMAL LIMIT dc<br>PACKAGE LIMIT<br>0.01<br>0.1 1 10 100<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>, DRAIN CURRENT (AMPS)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

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**5** 

**NTLJD4116N** 

## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) 

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1000<br>D = 0.5<br>100<br>0.2<br>0.1 *See Note 2 on Page 1<br>10<br>0.05 P(pk)<br>D CURVES APPLY FOR POWER<br>0.02 PULSE TRAIN SHOWN<br>1 0.01 READ TIME AT t1<br>t1 t2 TJ(pk) − TA = P(pk) R � JA(t)<br>SINGLE PULSE DUTY CYCLE, D = t1/t2<br>0.1<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>t, TIME (s)<br>EFFECTIVE TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 12. Thermal Response** 

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**6** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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WDFN6 2x2, 0.65P<br>CASE 506AN<br>ISSUE H<br>DATE 25 JAN 2022<br>**----- End of picture text -----**<br>


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**GENERIC MARKING DIAGRAM*** 1 XX M XX = Specific Device Code M = Date Code 

*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ � ”, may or may not be present. Some products may not follow the Generic Marking. 

## **DOCUMENT NUMBER: 98AON20861D** 

**DESCRIPTION: WDFN6 2x2, 0.65P** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

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