NTGD3148NT1G

## NTGD3148N 

## MOSFET – Power, Dual, N-Channel, TSOP-6 

## 20 V, 3.5 A 

## **Features** 

- Low Threshold Levels, VGS(th) < 1.5 V 

- Low Gate Charge (3.8 nC) 

- Leading Edge Trench Technology of Low RDS(on) 

- High Power and Current Handling Capability 

- This is a Pb−Free Device 

## **http://onsemi.com** 

## **N−CHANNEL MOSFET** 

|**V(BR)DSS**|**RDS(on) Max**|**ID Max**|
|---|---|---|
|20 V|70 m @ 4.5 V|3.5 A|
||100 m @ 2.5 V||



## **Applications** 

- DC−DC Converters (Buck and Boost Circuits) 

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- Low Side Load Switch 

- Optimized for Battery and Load Management Applications in Portable Equipment Like Cell Phones, DSCs, Media Player, Etc 

- Battery Charging and Protection Circuits 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

**Parameter Symbol Value Unit N−CHANNEL MOSFET** Drain−to−Source Voltage VDSS 20 V Gate−to−Source Voltage VGS ± 12 V Continuous Drain Steady State TA = 25 ° C ID 3.0 A Current (Note 1) TA = 85 ° C 2.2 ~~Fat~~ Continuous Drain t ≤ 5 s TA = 25 ° C ID 3.5 A ee 1 Current (Note 1) ~~ee eee~~ **TSOP−6** DN M Power Dissipation Steady State TA = 25 ° C PD 0.9 W **CASE 318G** (Note 1) t ≤ 5 s 1.1 **STYLE 13** 1 ~~pt~~ Pulsed Drain Current tp = 10 s IDM 10 A DN = Specific Device Code r Operating Junction and Storage Temperature TJ, TSTG −50 to ° C M = Date Code 150 = Pb−Free Package (Note: Microdot may be in either location) Source Current (Body Diode) IS 0.8 A ~~pT~~ Lead Temperature for Soldering Purposes(1/8 ″ from case for 10 s) TL 260 ° C **PIN CONNECTION THERMAL RESISTANCE RATINGS** D2 4 3 G2 **Parameter Symbol Value Unit** Junction−to−Ambient – Steady State (Note 1) R JA 140 ° C/W S1 5 2 S2 Junction−to−Ambient – t ≤ 5 s (Note 1) R JA 110 ° C/W ~~Sr ie~~ Stresses exceeding Maximum Ratings may damage the device. Maximum D1 6 1 G1 Ratings are stress ratings only. Functional operation above the Recommended ~~a Gn~~ Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. (Top View) 

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MARKING<br>DIAGRAM<br>1<br>TSOP−6 DN M<br>CASE 318G<br>STYLE 13<br>1<br>DN = Specific Device Code r i<br>M = Date Code<br>= Pb−Free Package<br>**----- End of picture text -----**<br>


(Note: Microdot may be in either location) 

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2008 **May, 2019 − Rev. 0** 

**NTGD3148N/D** 

## **NTGD3148N** 

**MOSFET ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**MOSFET ELECTRICAL CHARACTERIS**|**TICS **(TJ= 25|°C unless otherwise noted)|°C unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||20|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ|ID= 250�A, Ref to 25°C|||12.5||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 16 V|TJ= 25°C|||1.0|�A|
||||TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±12 V||||100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||0.5||1.5|V|
|Gate Threshold Temperature Coefficient|VGS(TH)/TJ||||3.28||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 4.5 V|ID= 3.5 A||41.7|70|m�|
|||VGS= 2.5 V|ID= 2.8 A||58|100||
|Forward Transconductance|gFS|VDS= 5.0 V, ID= 3.5 A|||6.2||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1.0 MHz,<br>VDS= 10 V|||300||pF|
|Output Capacitance|COSS||||73|||
|Reverse Transfer Capacitance|CRSS||||44|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 10 V,<br>ID= 3.5 A|||3.8||nC|
|Threshold Gate Charge|QG(TH)||||0.3|||
|Gate−to−Source Charge|QGS||||0.7|||
|Gate−to−Drain Charge|QGD||||1.1|||
|Gate Resistance|RG||||2.8||�|
|**SWITCHING CHARACTERISTICS**(Note 3)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 10 V,<br>ID= 3.5 A, RG= 3.0�|||7.4||ns|
|Rise Time|tr||||11.2|||
|Turn−Off Delay Time|td(OFF)||||12.8|||
|Fall Time|tf||||1.6|||
|**DRAIN−TO−SOURCE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V<br>ID= 0.8 A|TJ= 25°C||0.71||V|
||||TJ= 125°C||0.57|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt= 100 A/�s,<br>IS= 0.8 A|||9.0||ns|
|Charge Time|Ta||||5.0|||
|Discharge Time|Tb||||4.0|||
|Reverse Recovery Time|QRR||||2.5||nC|



2. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

3. Switching characteristics are independent of operating junction temperatures. 

## **ORDERING INFORMATION** 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|NTGD3148NT1G|TSOP−6<br>(Pb−Free)|3000 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

**http://onsemi.com** 

**2** 

**NTGD3148N** 

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5<br>6 V GS  = 2.0 V VDS ≥  10 V<br>2.4 V − 3.0 V 4<br>5<br>2.2 V<br>4 4.5 V 1.8 V 3 TJ = 125 ° C<br>3<br>2<br>2 1.6 V TJ = 25 ° C<br>1<br>1 1.4 V TJ = −55 ° C<br>0 0<br>0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.08<br>0.38 ID = 3.5 A 0.07 TJ = 25 ° C<br>0.340.3 T J  = 25 ° C 0.06 VGS = 2.5 V<br>0.26 0.05<br>VGS = 4.5 V<br>0.22<br>0.04<br>0.18<br>0.03<br>0.14<br>0.02<br>0.1<br>0.01<br>0.06<br>0.02 0<br>1 2 3 4 5 6 2 3 4 5 6 7<br>VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs.  Voltage Figure 4. On−Resistance  vs. Drain Current<br>and Gate Voltage<br>1.5 10000<br>ID = 3.5 A<br>1.4<br>V GS  = 4.5 V TJ = 125 ° C<br>1.3<br>1000<br>1.2<br>TJ = 150 ° C<br>1.1<br>1<br>100<br>0.9<br>0.8<br>0.7 10<br>−50 −25 0 25 50 75 100 125 150 2 7 12 17<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance  Variation vs. Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED)<br>IDSS<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**3** 

**NTGD3148N** 

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400 4.5<br>350 V GS  = 0 V 4 QT<br>Ciss T J  = 25 ° C<br>3.5<br>300<br>3<br>250<br>2.5<br>200 2 Q1 Q2<br>150<br>1.5<br>Coss<br>100<br>50 Crss 0.51 TIDJ = 3.5 A = 25 ° C<br>0 0<br>0 2 4 6 8 10 12 14 16 18 20 0 1 2 3 4<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)<br>Figure 7. Capacitance Variation Figure 8. Gate−To−Source and<br>Drain−To−Source Voltage vs. Total Charge<br>100<br>VDD = 10 V 3<br>VIDGS = 3.5 A = 4.5 V td(off) 2.5 VTJGS = 25 = 0 V ° C<br>2<br>tr<br>10<br>1.5<br>td(on)<br>1<br>0.5<br>tf<br>1 0<br>1 10 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>VGS, GATE−TO−SOURCE VOLTAGE (V)<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**Figure 10. Diode Forward Voltage vs. Current** 

**http://onsemi.com** 

**4** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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TSOP−6<br>CASE 318G−02<br>gd<br>ISSUE V<br>1<br>DATE 12 JUN 2012<br>SCALE 2:1<br>D NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>H 2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM<br>LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.<br>6 5 4 L2 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>GAUGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR<br>E1 ÉÉ E PLANE GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D<br>AND E1 ARE DETERMINED AT DATUM H.<br>ÉÉ 1 2 3 L 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.<br>NOTE 5 b M C PLANESEATING DIM MIN MILLIMETERSNOM MAX<br>DETAIL Z A 0.90 1.00 1.10<br>i e A1 0.01 0.06 0.10<br>b 0.25 0.38 0.50<br>c 0.10 0.18 0.26<br>D 2.90 3.00 3.10<br>A c E 2.50 2.75 3.00<br>0.05 E1 1.30 1.50 1.70<br>e 0.85 0.95 1.05<br>A1 L 0.20 0.40 0.60<br>DETAIL Z L2M 0° 0.25 BSC− 1 0°<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6:<br>PIN 1. DRAIN PIN 1. EMITTER 2 PIN 1. ENABLE PIN 1. N/C PIN 1. EMITTER 2 PIN 1. COLLECTOR<br>2. DRAIN 2. BASE 1 2. N/C 2. V in 2. BASE 2 2. COLLECTOR<br>3. GATE 3. COLLECTOR 1 3. R BOOST 3. NOT USED 3. COLLECTOR 1 3. BASE<br>4. SOURCE 4. EMITTER 1 4. Vz 4. GROUND 4. EMITTER 1 4. EMITTER<br>5. DRAIN 5. BASE 2 5. V in 5. ENABLE 5. BASE 1 5. COLLECTOR<br>6. DRAIN 6. COLLECTOR 2 6. V out 6. LOAD 6. COLLECTOR 2 6. COLLECTOR<br>STYLE 7: STYLE 8: STYLE 9: STYLE 10: STYLE 11: STYLE 12:<br>PIN 1. COLLECTOR PIN 1. Vbus PIN 1. LOW VOLTAGE GATE PIN 1. D(OUT)+ PIN 1. SOURCE 1 PIN 1. I/O<br>2. COLLECTOR 2. D(in) 2. DRAIN 2. GND 2. DRAIN 2 2. GROUND<br>3. BASE 3. D(in)+ 3. SOURCE 3. D(OUT)− 3. DRAIN 2 3. I/O<br>4. N/C 4. D(out)+ 4. DRAIN 4. D(IN)− 4. SOURCE 2 4. I/O<br>5. COLLECTOR 5. D(out) 5. DRAIN 5. VBUS 5. GATE 1 5. VCC<br>6. EMITTER 6. GND 6. HIGH VOLTAGE GATE 6. D(IN)+ 6. DRAIN 1/GATE 2 6. I/O<br>STYLE 13: STYLE 14: STYLE 15: STYLE 16: STYLE 17:<br>PIN 1. GATE 1 PIN 1. ANODE PIN 1. ANODE PIN 1. ANODE/CATHODE PIN 1. EMITTER<br>2. SOURCE 2 2. SOURCE 2. SOURCE 2. BASE 2. BASE<br>3. GATE 2 3. GATE 3. GATE 3. EMITTER 3. ANODE/CATHODE<br>4. DRAIN 2 4. CATHODE/DRAIN 4. DRAIN 4. COLLECTOR 4. ANODE<br>5. SOURCE 1 5. CATHODE/DRAIN 5. N/C 5. ANODE 5. CATHODE<br>6. DRAIN 1 6. CATHODE/DRAIN 6. CATHODE 6. CATHODE 6. COLLECTOR<br>GENERIC<br>RECOMMENDED<br>MARKING DIAGRAM*<br>SOLDERING FOOTPRINT*<br>6X<br>0.60<br>XXXAYW XXX M<br>roo 1 1<br>3.20 6X<br>0.95 IC STANDARD<br>XXX = Specific Device Code XXX = Specific Device Code<br>A =Assembly Location M = Date Code<br>Loom Y = Year | = Pb−Free Package<br>0.95 W = Work Week<br>PITCH<br>= Pb−Free Package<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering *This information is generic. Please refer to device data sheet details, please download the ON Semiconductor Soldering and for actual part marking. Pb−Free indicator, “G” or microdot “ Mounting Techniques Reference Manual, SOLDERRM/D. ”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98ASB14888C** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: TSOP−6 PAGE 1 OF 1** ~~Be~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2019 

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