NSVJ6904DSB6T1G
JFET Transistor, -25 V, 40 mA, -1.8 V, CPH, 6 Pin, 150 °C
- Manufacturer: ONSEMI
- Product type: JFETs
- Breakdown Voltage Vbr:-25V; Zero Gate Voltage Drain Current Idss Min:20mA; Zero Gate Voltage Drain Current Idss Max:40mA; Gate-Source Cutoff Voltage Vgs(off) Max:-1.8V; Transistor Case S
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 6 Pin
- Channel Type: N Channel
- Product Range: -
- Qualification: AEC-Q101
- Transistor Type: JFET
- Transistor Mounting: Surface Mount
- Transistor Case Style: CPH
- Operating Temperature Max: 150°C
- Gate Source Cutoff Voltage Max: -1.8V
- Gate Source Breakdown Voltage Max: -25V
- Zero Gate Voltage Drain Current Max: 40mA
- Zero Gate Voltage Drain Current Idss Min: 20mA
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.364 € |
| Current stock | 1000+ |
| Lead time | 30 days |
## NSVJ6904DSB6 ## _Advance Information_ ## N-Channel JFET **−25 V, 20 to 40 mA, 40 mS, Dual** The NSVJ6904DSB6 is a composite type of JFET designed for compact size and high efficiency which can achieve high gain performance. This AEC−Q101 qualified and PPAP capable device is suited for automotive applications. ## **Features** - Large | yfs | - Small Ciss **www.onsemi.com** **==> picture [190 x 46] intentionally omitted <==** **----- Start of picture text -----**<br> VDSS RDS(on) MAX ID MAX<br>eeee ee<br>78 m @ 10 V<br>60 V 4.5 A<br>104 m @ 4.5 V<br>**----- End of picture text -----**<br> - Ultralow Noise Figure - CPH6 Package is Pin−Compatible with SC−74 - AEC−Q101 Qualified and PPAP Capable - Mounting Area is Greatly Reduced by Incorporating Two JFETs of the NSVJ3910SB3 in One Package of CPH6 Compared with Using Two Separate Packages ## **Typical Applications** - AM Tuner RF Amplification - Low Noise Amplifier **ELECTRICAL CONNECTION N−Channel** **==> picture [169 x 85] intentionally omitted <==** **----- Start of picture text -----**<br> 6 5 4<br>1 : Drain 1<br>2 : NC<br>3 : Drain 2<br>4 : Gate 2<br>5 : Source 1 / Source 2<br>6 : Gate 1<br>1 2 3<br>**----- End of picture text -----**<br> ## **Specifications** ## **MARKING DIAGRAM** **ABSOLUTE MAXIMUM RATINGS** (Ta = 25 ° C) **DIAGRAM Symbo Parameter l Value Unit** Drain to Source Voltage VDSX 25 V 6 5 Gate to Drain Voltage VGDS −25 V 4 Gate Current IG 10 mA 12 3 **CPH6** Drain Current ID 50 mA **CASE 318BD** Allowable Power Dissipation 1 unit PD 400 mW Total Power Dissipation PT 700 mW **ORDERING INFORMATION** ~~==~~ Operating Junction and Storage Temperature TJ, TStg −55 to +150 ° C See detailed ordering, marking and shipping information in the ~~°~~ Stresses exceeding those listed in the Maximum Ratings table may damage the package dimensions section on page 4 of this data sheet. device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Publication Order Number: **NSVJ6904DSB6/D** **1** © Semiconductor Components Industries, LLC, 2017 **March, 2018 − Rev. P1** **NSVJ6904DSB6** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C, (Note 1)) |**ELECTRICAL CHARACTERISTI**|**CS**(TJ= 25°|C, (Note 1))||||| |---|---|---|---|---|---|---| |**Characteristic**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**| |Gate to Drain Breakdown Voltage|V(BR)GDS|IG= −10�A, VDS= 0 V|−25|−|−|V| |Gate to Source Leakage Current|IGSS|VGS= −10 V, VDS= 0 V|−|−|−1.0|nA| |Cutoff Voltage|VGS(off)|VDS= 5 V, ID= 100�A|−0.6|−1.2|−1.8|V| |Zero−Gate Voltage Drain Current|IDSS|VDS= 5 V, VGS= 0 V|20|−|40|mA| |Forward Transfer Admittance|| yfs ||VDS= 5 V, VGS= 0 V, f = 1 kHz|30|40|−|mS| |Input Capacitance|Ciss|VDS= 5 V, VGS= 0 V, f = 1 MHz|−|6.0|−|pF| |Reverse Transfer Capacitance|Crss||−|2.3|−|pF| |Noise Figure|NF|VDS= 5 V, VGS= 0 V, f = 100 MHz|−|2.1|2.8|dB| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. The specifications shown above are for each individual JFET. **www.onsemi.com** **2** **NSVJ6904DSB6** ## **CHARACTERISTICS** **==> picture [217 x 174] intentionally omitted <==** **----- Start of picture text -----**<br> 30<br>VGS = 0 V<br>25<br>20 −1.0 V −0.2 V<br>15<br>−0.4 V<br>10<br>−0.6 V<br>5 −0.8 V<br>0<br>0 0.5 1.0 1.5 2.0<br>DRAIN−TO−SOURCE VOLTAGE, VDS − V<br> mA<br>D −<br>DRAIN CURRENT, I<br>**----- End of picture text -----**<br> **Figure 1. ID − VDS** **==> picture [217 x 174] intentionally omitted <==** **----- Start of picture text -----**<br> 40<br>35 VGS = 0 V<br>−1.0 V<br>30<br>−0.2 V<br>25<br>20 −0.4 V<br>15<br>−0.6 V<br>10<br>−0.8 V<br>5<br>0<br>0 2 4 6 8 10<br>DRAIN−TO−SOURCE VOLTAGE, VDS − V<br> mA<br>D −<br>DRAIN CURRENT, I<br>**----- End of picture text -----**<br> **Figure 2. ID − VDS** **==> picture [220 x 411] intentionally omitted <==** **----- Start of picture text -----**<br> 50<br>VDS = 5 V<br>45<br>40<br>IDSS = 40 mA<br>35<br>30<br>30 mA<br>25<br>20<br>15<br>20 mA<br>10<br>5<br>0<br>−2.0 −1.5 −1.0 −0.5 0 0.5<br>GATE−TO−SOURCE VOLTAGE, VGS − V<br>Figure 3. ID − VGS<br>100<br>7 V DS = 5 V<br>f = 1 kHz<br>5<br>IDSS = 30 mA<br>3<br>2<br>10<br>7<br>5<br>3<br>2<br>1.0<br>1.0 2 3 5 7 10 2 3 5 7 100<br>DRAIN CURRENT, ID − mA<br>Figure 5. | yfs | − ID<br> mA<br>D −<br>DRAIN CURRENT, I<br>FORWARD TRANSFER ADMITTANCE, | yfs | − mS<br>**----- End of picture text -----**<br> **==> picture [219 x 395] intentionally omitted <==** **----- Start of picture text -----**<br> 50<br>VDS = 5 V<br>45 Ta = −25 ° C<br>40<br>35<br>30 25 ° C<br>75 ° C<br>25<br>20<br>15<br>10<br>5<br>0<br>−2.0 −1.5 −1.0 −0.5 0 0.5<br>GATE−TO−SOURCE VOLTAGE, VGS − V<br>Figure 4. ID − VGS<br>100<br>VDS = 5 V<br>VGS = 0 V<br>7 f = 1 kHz<br>5<br>3<br>2<br>10<br>10 2 3 5 7 100<br>DRAIN CURRENT, IDSS − mA<br> mA<br>D −<br>DRAIN CURRENT, I<br>FORWARD TRANSFER ADMITTANCE, | yfs | − mS<br>**----- End of picture text -----**<br> **Figure 6. | yfs | − IDSS** **www.onsemi.com** **3** **NSVJ6904DSB6** ## **CHARACTERISTICS** **==> picture [222 x 392] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>7 V DS = 5 V<br>ID = 100 � A<br>5<br>3<br>2<br>1.0<br>7<br>5<br>3<br>2<br>0.1<br>10 2 3 5 7 100<br>DRAIN CURRENT, IDSS − mA<br>Figure 7. VGS(off) − IDSS<br>10<br>VGS = 0 V<br>f = 1 MHz<br>7<br>5<br>3<br>2<br>1.0<br>1.0 2 3 5 7 10 2 3 5 7 100<br>DRAIN−TO−SOURCE VOLTAGE, VDS − V<br>(off) − V<br>GS<br>CUTOFF VOLTAGE, V<br>REVERSE TRANSFER CAPACITANCE, Crss − pF<br>**----- End of picture text -----**<br> **Figure 9. Crss − VDS** **==> picture [222 x 177] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>VGS = 0 V<br>f = 1 MHz<br>7<br>5<br>3<br>2<br>1.0<br>1.0 2 3 5 7 10 2 3 5 7 100<br>DRAIN−TO−SOURCE VOLTAGE, VDS − V<br>INPUT CAPACITANCE, Ciss − pF<br>**----- End of picture text -----**<br> **Figure 8. Ciss − VGDS** **==> picture [221 x 205] intentionally omitted <==** **----- Start of picture text -----**<br> 800<br>PT<br>700<br>600<br>500<br>1 unit<br>400<br>300<br>200<br>100<br>0<br>0 20 40 60 80 100 120 140 160<br>AMBIENT TEMPERATURE, Ta − ° C<br>Figure 10. PD, PT − Ta<br>− mW<br>T<br>, P<br>D<br>ALLOWABLE POWER DISSIPATION, P<br>**----- End of picture text -----**<br> ## **ORDERING INFORMATION** |**ORDERING INFORMATION**|||| |---|---|---|---| |**Device Order Number**|**Specific Device Marking**|**Package Type**|**Shipping**†| |NSVJ6904DSB6T1G|1P|CPH6<br>(Pb−Free / Halogen Free)|3,000 / Tape & Reel| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. **www.onsemi.com** **4** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **CPH6** CASE 318BD ISSUE O DATE 30 NOV 2011 **==> picture [491 x 72] intentionally omitted <==** **----- Start of picture text -----**<br> DOCUMENT NUMBER: 98AON65440E Electronic versions are uncontrolled except when<br>accessed directly from the Document Repository. Printed<br>STATUS: ON SEMICONDUCTOR STANDARD<br>versions are uncontrolled except when stamped<br>“CONTROLLED COPY” in red.<br>NEW STANDARD:<br>© Semiconductor Components Industries, LLC, 2002 http://onsemi.com Case Outline Number:<br>October, 2002 − Rev. 0DESCRIPTION: CPH6 1 PAGE 1 OF 2XXX<br>**----- End of picture text -----**<br> |**DOCUMENT NUMBER:**<br>**98AON65440E**<br>**PAGE 2 OF 2**<br>~~— ©~~<br>~~———~~|**DOCUMENT NUMBER:**<br>**98AON65440E**<br>**PAGE 2 OF 2**<br>~~— ©~~<br>~~———~~| |---|---| |**ISSUE**|**REVISION**<br>**DATE**| |O|RELEASED FOR PRODUCTION FROM SANYO ENACT# TC−00000733 TO ON<br>30 NOV 2011| ||SEMICONDUCTOR. REQ. BY D. TRUHITTE.| > **ON Semiconductor** and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. Case Outline Number: © Semiconductor Components Industries, LLC, 2011 **November, 2011 − Rev. O** **318BD** ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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