NRVBD1035CTLT4G

## NRVBD1035CTL 

## Switch-mode Schottky Power Rectifier **DPAK Power Surface Mount Package** 

The NRVBD1035CTL employs the Schottky Barrier principle in a large area metal−to−silicon power diode. State of the art geometry features epitaxial construction with oxide passivation and metal overlay contact. Ideally suited for low voltage, high frequency switching power supplies, free wheeling diode and polarity protection diodes. 

## **Features** 

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**SCHOTTKY BARRIER RECTIFIER 10 AMPERES 35 VOLTS** 

- Highly Stable Oxide Passivated Junction 

- Guardring for Stress Protection 

- Matched Dual Die Construction − May be Paralleled for High Current Output 

- High dv/dt Capability 

- Short Heat Sink Tap Manufactured − Not Sheared 

- Very Low Forward Voltage Drop 

- Epoxy Meets UL  94 V−0 @ 0.125 in 

- This is a Pb−Free Device 

## **Mechanical Characteristics:** 

- Case: Epoxy, Molded 

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1<br>4<br>3<br>a<br>4<br>1 D [2] ><br>3<br>DPAK<br>CASE 369C<br>**----- End of picture text -----**<br>


- Weight: 0.4 Gram (Approximately) 

- Finish: All External Surfaces Corrosion Resistant and Terminal Leads are Readily Solderable 

- Lead and Mounting Surface Temperature for Soldering Purposes: 260°C Max. for 10 Seconds 

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MARKING DIAGRAM<br>**----- End of picture text -----**<br>


AYWW B10 35CLG ~~c~~ i ~~)~~ A = Assembly Location Y = Year WW = Work Week B1035CL = Device Code G = Pb−Free Package 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 

Publication Order Number: **NRVBD1035CTL/D** 

**1** 

© Semiconductor Components Industries, LLC, 2011 **July, 2019 − Rev. 1** 

**NRVBD1035CTL** 

## **MAXIMUM RATINGS** 

|**MAXIMUM RATINGS**||||
|---|---|---|---|
|**Rating**|**Symbol**|**Value**|**Unit**|
|Peak Repetitive Reverse Voltage<br>Working Peak Reverse Voltage<br>DC Blocking Voltage|VRRM<br>VRWM<br>VR|35|V|
|Average Rectified Forward Current<br>Per Leg<br>(At Rated VR, TC= 115°C)<br>Per Package|IO|5.0<br>10|A|
|Peak Repetitive Forward Current<br>Per Leg<br>(At Rated VR, Square Wave, 20 kHz, TC= 115°C)|IFRM|10|A|
|Non−Repetitive Peak Surge Current<br>Per Package<br>(Surge applied at rated load conditions, halfwave, single phase, 60 Hz)|IFSM|50|A|
|Storage / Operating Case Temperature|Tstg,Tc|−55 to +150|°C|
|Operating Junction Temperature (Note 1)|TJ|−55 to +150|°C|
|Voltage Rate of Change (Rated VR, TJ= 25°C)|dv/dt|10,000|V/�s|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. The heat generated must be less than the thermal conductivity from Junction−to−Ambient: dPD/dTJ < 1/R � JA. 

## **THERMAL CHARACTERISTICS** 

|**THERMAL CHARACTERISTICS**||||
|---|---|---|---|
|Thermal Resistance, Junction−to−Case<br>Per Leg|R�JC|3.0|°C/W|
|Thermal Resistance, Junction−to−Ambient (Note 2)<br>Per Leg|R�JA|137|°C/W|
|**ELECTRICAL CHARACTERISTICS**||||
|Maximum Instantaneous Forward Voltage (Note 3)<br>(See Figure 2)<br>Per Leg<br>IF= 5 Amps, TJ= 25°C<br>IF= 5 Amps, TJ= 100°C<br>IF= 10 Amps, TJ= 25°C<br>IF= 10 Amps, TJ= 100°C|VF|0.47<br>0.41<br>0.56<br>0.55|V|
|Maximum Instantaneous Reverse Current (Note 3)<br>(See Figure 4)<br>Per Leg<br>(VR= 35 V, TJ= 25°C)<br>(VR= 35 V, TJ= 100°C)<br>(VR= 17.5 V, TJ= 25°C)<br>(VR= 17.5 V, TJ= 100°C)|IR|2.0<br>30<br>0.20<br>5.0|mA|



2. Rating applies when using minimum pad size, FR4 PC Board 

3. Pulse Test: Pulse Width ≤ 250 � s, Duty Cycle ≤ 2.0% 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Device**|**Package**|**Shipping**†|
|NRVBD1035CTLT4G|DPAK<br>(Pb−Free)|2500 Units / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**2** 

**NRVBD1035CTL** 

## **TYPICAL CHARACTERISTICS** 

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100 100<br>TJ = 125°C<br>10 TJ = 100°C 10 TJ = 125°C<br>TJ = 25°C<br>1.0 TJ = - 40°C 1.0 TJ = 25°C<br>TJ = 100°C<br>0.1 0.1<br>0.10 0.30 0.50 0.70 0.90 1.10 0.10 0.30 0.50 0.70 0.90 1.10<br>VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS) VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS)<br>Figure 1. Typical Forward Voltage Per Leg Figure 2. Maximum Forward Voltage Per Leg<br>1E+0 1E+0<br>100E-3 100E-3<br>TJ = 125°C TJ = 125°C<br>10E-3 10E-3<br>1E-3 TJ = 100°C 1E-3 TJ = 100°C<br>100E-6 TJ = 25°C 100E-6<br>T J  = 25°C<br>10E-6 10E-6<br>1E-6 1E-6<br>0 10 20 30 35 0 10 20 30 35<br>VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)<br>IF, INSTANTANEOUS FORWARD CURRENT (AMPS) IF, INSTANTANEOUS FORWARD CURRENT (AMPS)<br>, REVERSE CURRENT (AMPS)<br>IR<br>, MAXIMUM REVERSE CURRENT (AMPS)<br>IR<br>**----- End of picture text -----**<br>


**Figure 3. Typical Reverse Current Per Leg** 

**Figure 4. Maximum Reverse Current Per Leg** 

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**3** 

**NRVBD1035CTL** 

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8.0 4.0<br>dc<br>SQUARE WAVE<br>7.0 3.5<br>SQUARE WAVE (50% DUTY CYCLE) dc<br>6.0 (50% DUTY CYCLE) 3.0<br>Ipk/Io = �<br>5.0 2.5<br>Ipk/Io = � Ipk/Io = 5<br>4.0 Ipk/Io = 5 2.0 Ipk/Io = 10<br>3.0 1.5 I pk /I o  = 20<br>Ipk/Io = 10<br>2.0 1.0<br>Ipk/Io = 20<br>1.0 0.5<br>freq = 20 kHz<br>0 0<br>0 20 40 60 80 100 120 140 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0<br>TL, LEAD TEMPERATURE (°C) IO, AVERAGE FORWARD CURRENT (AMPS)<br>Figure 5. Current Derating Per Leg Figure 6. Forward Power Dissipation Per Leg<br>1000 125<br>TJ = 25°C R�JA = 2.43°C/W<br>115<br>R�JA = 25°C/W<br>105<br>R�JA = 48°C/W<br>100 95<br>R�JA = 67.5°C/W<br>85<br>R�JA = 84°C/W<br>75<br>10 65<br>0 5 10 15 20 25 0 5 10 15 20 25 30 35<br>VR, REVERSE VOLTAGE (VOLTS) VR, DC REVERSE VOLTAGE (VOLTS)<br>, AVERAGE FORWARD CURRENT (AMPS)<br>IO PFO, AVERAGE POWER DISSIPATION (WATTS)<br>°<br>C, CAPACITANCE (pF)<br>TJ , DERATED OPERATING TEMPERATURE (   C)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Per Leg** 

**Figure 8. Typical Operating Temperature Derating Per Leg *** 

* Reverse power dissipation and the possibility of thermal runaway must be considered when operating this device under any reverse voltage conditions. Calculations of TJ therefore must include forward and reverse power effects. The allowable operating TJ may be calculated from the equation: TJ = TJmax − r(t)(Pf + Pr) where 

r(t) = thermal impedance under given conditions, Pf = forward power dissipation, and 

Pr = reverse power dissipation 

This graph displays the derated allowable TJ due to reverse bias under DC conditions only and is calculated as TJ = TJmax − r(t)Pr, where r(t) = Rthja. For other power applications further calculations must be performed. 

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**4** 

**NRVBD1035CTL** 

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1.0<br>50%(DUTY CYCLE)<br>20%<br>10%<br>5.0%<br>0.1<br>2.0%<br>1.0%<br>SINGLE PULSE Rtjl(t) = Rtjl • r(t)<br>0.01<br>0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000<br>t, TIME (s)<br>, TRANSIENT THERMAL RESISTANCE (NORMALIZED)<br>r(t)<br>**----- End of picture text -----**<br>


**Figure 9. Thermal Response Junction to Case (Per Leg)** 

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1.0E+00<br>50% (DUTY CYCLE)<br>20%<br>10%<br>1.0E-01<br>5.0%<br>2.0%<br>1.0E-02<br>1.0%<br>1.0E-03<br>SINGLE PULSE<br>Rtjl(t) = Rtjl • r(t)<br>1.0E-04<br>0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000 10000<br>t, TIME (s)<br>, TRANSIENT THERMAL RESISTANCE (NORMALIZED)<br>r(t)<br>**----- End of picture text -----**<br>


**Figure 10. Thermal Response Junction to Ambient (Per Leg)** 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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4 DPAK (SINGLE GAUGE)<br>CASE 369C<br>ISSUE F<br>1 ® [2]<br>DATE 21 JUL 2015<br>3<br>SCALE 1:1<br>NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 Ele 4| Of Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>wat L1 h GF CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 9  CW GENERIC<br>MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW<br>ALYWW XXX<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE a d<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>IC Discrete<br>SOLDERING FOOTPRINT* XXXXXX = Device Code<br>A = Assembly Location<br>6.20 3.00<br>L = Wafer Lot<br>0.244 0.118<br>2.58 Y =  Year<br>0.102 WW = Work Week<br>G = Pb−Free Package<br>5.80 *This information is generic. Please refer<br>0.228 1.60 6.17 to device data sheet for actual part<br>0.063 0.243 marking.<br>Ts.<br>SCALE 3:1 mm<br>inches<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK (SINGLE GAUGE) PAGE 1 OF 1** ~~ee~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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